forked from OSchip/llvm-project
[InstCombine] Add tests for funnel shift with zero operand; NFC
These are additional baseline tests for D54778. llvm-svn: 347414
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@ -152,6 +152,15 @@ define i32 @fshl_op0_undef(i32 %x) {
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ret i32 %r
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}
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define i32 @fshl_op0_zero(i32 %x) {
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; CHECK-LABEL: @fshl_op0_zero(
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; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.fshl.i32(i32 0, i32 [[X:%.*]], i32 7)
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; CHECK-NEXT: ret i32 [[R]]
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;
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%r = call i32 @llvm.fshl.i32(i32 0, i32 %x, i32 7)
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ret i32 %r
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}
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define i33 @fshr_op0_undef(i33 %x) {
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; CHECK-LABEL: @fshr_op0_undef(
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; CHECK-NEXT: [[R:%.*]] = call i33 @llvm.fshr.i33(i33 undef, i33 [[X:%.*]], i33 7)
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@ -161,6 +170,15 @@ define i33 @fshr_op0_undef(i33 %x) {
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ret i33 %r
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}
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define i33 @fshr_op0_zero(i33 %x) {
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; CHECK-LABEL: @fshr_op0_zero(
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; CHECK-NEXT: [[R:%.*]] = call i33 @llvm.fshr.i33(i33 0, i33 [[X:%.*]], i33 7)
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; CHECK-NEXT: ret i33 [[R]]
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;
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%r = call i33 @llvm.fshr.i33(i33 0, i33 %x, i33 7)
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ret i33 %r
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}
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define i32 @fshl_op1_undef(i32 %x) {
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; CHECK-LABEL: @fshl_op1_undef(
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; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.fshl.i32(i32 [[X:%.*]], i32 undef, i32 7)
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@ -170,6 +188,15 @@ define i32 @fshl_op1_undef(i32 %x) {
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ret i32 %r
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}
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define i32 @fshl_op1_zero(i32 %x) {
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; CHECK-LABEL: @fshl_op1_zero(
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; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.fshl.i32(i32 [[X:%.*]], i32 0, i32 7)
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; CHECK-NEXT: ret i32 [[R]]
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;
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%r = call i32 @llvm.fshl.i32(i32 %x, i32 0, i32 7)
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ret i32 %r
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}
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define i33 @fshr_op1_undef(i33 %x) {
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; CHECK-LABEL: @fshr_op1_undef(
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; CHECK-NEXT: [[R:%.*]] = call i33 @llvm.fshr.i33(i33 [[X:%.*]], i33 undef, i33 7)
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@ -179,6 +206,15 @@ define i33 @fshr_op1_undef(i33 %x) {
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ret i33 %r
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}
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define i33 @fshr_op1_zero(i33 %x) {
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; CHECK-LABEL: @fshr_op1_zero(
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; CHECK-NEXT: [[R:%.*]] = call i33 @llvm.fshr.i33(i33 [[X:%.*]], i33 0, i33 7)
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; CHECK-NEXT: ret i33 [[R]]
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;
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%r = call i33 @llvm.fshr.i33(i33 %x, i33 0, i33 7)
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ret i33 %r
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}
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; Only demand bits from one of the operands.
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define i32 @fshl_only_op0_demanded(i32 %x, i32 %y) {
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