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[AArch64] Add support for NEON scalar signed saturating absolute value and 

scalar signed saturating negate instructions.

llvm-svn: 192734
This commit is contained in:
Chad Rosier 2013-10-15 21:19:02 +00:00
parent 9d51708677
commit a70fb7b716
3 changed files with 69 additions and 0 deletions
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7
clang/include/clang/Basic/arm_neon.td
View File

@ -855,4 +855,11 @@ def SCALAR_CMGTZ : SInst<"vcgtz", "ss", "Sl">;
def SCALAR_CMHI : SInst<"vcgt", "sss", "SUl">;
def SCALAR_CMTST : SInst<"vtst", "sss", "SlSUl">;
////////////////////////////////////////////////////////////////////////////////
// Scalar Signed Saturating Absolute Value
def SCALAR_SQABS : SInst<"vqabs", "ss", "ScSsSiSl">;
////////////////////////////////////////////////////////////////////////////////
// Scalar Signed Saturating Negate
def SCALAR_SQNEG : SInst<"vqneg", "ss", "ScSsSiSl">;
}

14
clang/lib/CodeGen/CGBuiltin.cpp
View File

@ -2074,6 +2074,20 @@ static Value *EmitAArch64ScalarBuiltinExpr(CodeGenFunction &CGF,
case AArch64::BI__builtin_neon_vtstd_u64:
Int = Intrinsic::aarch64_neon_vtstd; s = "vtst";
OverloadInt = false; break;
// Scalar Signed Saturating Absolute Value
case AArch64::BI__builtin_neon_vqabsb_s8:
case AArch64::BI__builtin_neon_vqabsh_s16:
case AArch64::BI__builtin_neon_vqabss_s32:
case AArch64::BI__builtin_neon_vqabsd_s64:
Int = Intrinsic::arm_neon_vqabs;
s = "vqabs"; OverloadInt = true; break;
// Scalar Signed Saturating Negate
case AArch64::BI__builtin_neon_vqnegb_s8:
case AArch64::BI__builtin_neon_vqnegh_s16:
case AArch64::BI__builtin_neon_vqnegs_s32:
case AArch64::BI__builtin_neon_vqnegd_s64:
Int = Intrinsic::arm_neon_vqneg;
s = "vqneg"; OverloadInt = true; break;
}
if (!Int)

48
clang/test/CodeGen/aarch64-neon-intrinsics.c
View File

@ -7117,3 +7117,51 @@ uint64_t test_vtstd_u64(uint64_t a, uint64_t b) {
// CHECK: cmtst {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
return (uint64_t)vtstd_u64(a, b);
}
int8_t test_vqabsb_s8(int8_t a) {
// CHECK: test_vqabsb_s8
// CHECK: sqabs {{b[0-9]+}}, {{b[0-9]+}}
return (int8_t)vqabsb_s8(a);
}
int16_t test_vqabsh_s16(int16_t a) {
// CHECK: test_vqabsh_s16
// CHECK: sqabs {{h[0-9]+}}, {{h[0-9]+}}
return (int16_t)vqabsh_s16(a);
}
int32_t test_vqabss_s32(int32_t a) {
// CHECK: test_vqabss_s32
// CHECK: sqabs {{s[0-9]+}}, {{s[0-9]+}}
return (int32_t)vqabss_s32(a);
}
int64_t test_vqabsd_s64(int64_t a) {
// CHECK: test_vqabsd_s64
// CHECK: sqabs {{d[0-9]+}}, {{d[0-9]+}}
return (int64_t)vqabsd_s64(a);
}
int8_t test_vqnegb_s8(int8_t a) {
// CHECK: test_vqnegb_s8
// CHECK: sqneg {{b[0-9]+}}, {{b[0-9]+}}
return (int8_t)vqnegb_s8(a);
}
int16_t test_vqnegh_s16(int16_t a) {
// CHECK: test_vqnegh_s16
// CHECK: sqneg {{h[0-9]+}}, {{h[0-9]+}}
return (int16_t)vqnegh_s16(a);
}
int32_t test_vqnegs_s32(int32_t a) {
// CHECK: test_vqnegs_s32
// CHECK: sqneg {{s[0-9]+}}, {{s[0-9]+}}
return (int32_t)vqnegs_s32(a);
}
int64_t test_vqnegd_s64(int64_t a) {
// CHECK: test_vqnegd_s64
// CHECK: sqneg {{d[0-9]+}}, {{d[0-9]+}}
return (int64_t)vqnegd_s64(a);
}