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Make F16C feature flag imply AVX rather than just checking both at the patterns. 

llvm-svn: 190775
This commit is contained in:
Craig Topper 2013-09-16 04:29:58 +00:00
parent c5d86153ed
commit a6d204ec68
2 changed files with 3 additions and 2 deletions
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3
llvm/lib/Target/X86/X86.td
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@ -122,7 +122,8 @@ def FeatureMOVBE : SubtargetFeature<"movbe", "HasMOVBE", "true",
def FeatureRDRAND : SubtargetFeature<"rdrnd", "HasRDRAND", "true",
"Support RDRAND instruction">;
def FeatureF16C : SubtargetFeature<"f16c", "HasF16C", "true",
"Support 16-bit floating point conversion instructions">;
"Support 16-bit floating point conversion instructions",
[FeatureAVX]>;
def FeatureFSGSBase : SubtargetFeature<"fsgsbase", "HasFSGSBase", "true",
"Support FS/GS Base instructions">;
def FeatureLZCNT : SubtargetFeature<"lzcnt", "HasLZCNT", "true",

2
llvm/lib/Target/X86/X86InstrSSE.td
View File

@ -8010,7 +8010,7 @@ multiclass f16c_ps2ph<RegisterClass RC, X86MemOperand x86memop, Intrinsic Int> {
TA, OpSize, VEX;
}
let Predicates = [HasAVX, HasF16C] in {
let Predicates = [HasF16C] in {
defm VCVTPH2PS : f16c_ph2ps<VR128, f64mem, int_x86_vcvtph2ps_128>;
defm VCVTPH2PSY : f16c_ph2ps<VR256, f128mem, int_x86_vcvtph2ps_256>, VEX_L;
defm VCVTPS2PH : f16c_ps2ph<VR128, f64mem, int_x86_vcvtps2ph_128>;