forked from OSchip/llvm-project
parent
6c0c21954c
commit
a6d0afcb74
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@ -451,9 +451,9 @@ public:
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}
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};
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}
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extern void StartPassTimer(llvm::Pass *);
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extern void StopPassTimer(llvm::Pass *);
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}
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#endif
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@ -1396,7 +1396,7 @@ bool Andersens::Node::intersectsIgnoring(Node *N, unsigned Ignoring) const {
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return Result;
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}
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void dumpToDOUT(SparseBitVector<> *bitmap) {
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static void dumpToDOUT(SparseBitVector<> *bitmap) {
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#ifndef NDEBUG
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raw_os_ostream OS(*DOUT);
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dump(*bitmap, OS);
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@ -817,7 +817,7 @@ bool llvm::CannotBeNegativeZero(const Value *V, unsigned Depth) {
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// indices from Idxs that should be left out when inserting into the resulting
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// struct. To is the result struct built so far, new insertvalue instructions
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// build on that.
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Value *BuildSubAggregate(Value *From, Value* To, const Type *IndexedType,
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static Value *BuildSubAggregate(Value *From, Value* To, const Type *IndexedType,
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SmallVector<unsigned, 10> &Idxs,
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unsigned IdxSkip,
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LLVMContext &Context,
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@ -877,7 +877,7 @@ Value *BuildSubAggregate(Value *From, Value* To, const Type *IndexedType,
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// insertvalue instruction somewhere).
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//
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// All inserted insertvalue instructions are inserted before InsertBefore
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Value *BuildSubAggregate(Value *From, const unsigned *idx_begin,
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static Value *BuildSubAggregate(Value *From, const unsigned *idx_begin,
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const unsigned *idx_end, LLVMContext &Context,
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Instruction *InsertBefore) {
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assert(InsertBefore && "Must have someplace to insert!");
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@ -48,13 +48,14 @@ RewriterOpt("rewriter",
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clEnumValEnd),
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cl::init(local));
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cl::opt<bool>
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static cl::opt<bool>
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ScheduleSpills("schedule-spills",
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cl::desc("Schedule spill code"),
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cl::init(false));
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VirtRegRewriter::~VirtRegRewriter() {}
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namespace {
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/// This class is intended for use with the new spilling framework only. It
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/// rewrites vreg def/uses to use the assigned preg, but does not insert any
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@ -101,8 +102,12 @@ struct VISIBILITY_HIDDEN TrivialRewriter : public VirtRegRewriter {
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};
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}
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// ************************************************************************ //
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namespace {
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/// AvailableSpills - As the local rewriter is scanning and rewriting an MBB
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/// from top down, keep track of which spill slots or remat are available in
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/// each register.
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@ -225,6 +230,8 @@ public:
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std::vector<MachineOperand*> &KillOps);
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};
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}
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// ************************************************************************ //
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// Given a location where a reload of a spilled register or a remat of
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@ -297,6 +304,8 @@ stop:;
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return NewInsertLoc;
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}
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namespace {
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// ReusedOp - For each reused operand, we keep track of a bit of information,
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// in case we need to rollback upon processing a new operand. See comments
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// below.
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@ -396,6 +405,7 @@ public:
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}
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};
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}
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// ****************** //
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// Utility Functions //
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@ -962,6 +972,8 @@ namespace {
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// Local Spiller Implementation //
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// ***************************** //
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namespace {
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class VISIBILITY_HIDDEN LocalRewriter : public VirtRegRewriter {
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MachineRegisterInfo *RegInfo;
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const TargetRegisterInfo *TRI;
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@ -2320,6 +2332,8 @@ private:
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};
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}
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llvm::VirtRegRewriter* llvm::createVirtRegRewriter() {
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switch (RewriterOpt) {
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default: llvm_unreachable("Unreachable!");
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@ -57,6 +57,7 @@ static void runAtExitHandlers() {
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* linking with libc_nonshared.a and -Wl,--export-dynamic doesn't make 'stat'
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* available as an exported symbol, so we have to add it explicitly.
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*/
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namespace {
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class StatSymbols {
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public:
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StatSymbols() {
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@ -73,6 +74,7 @@ public:
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sys::DynamicLibrary::AddSymbol("mknod", (void*)(intptr_t)mknod);
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}
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};
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}
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static StatSymbols initStatSymbols;
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#endif // __linux__
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@ -67,6 +67,6 @@ int sys::AlarmStatus() {
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return 0;
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}
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void Sleep(unsigned n) {
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void sys::Sleep(unsigned n) {
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::sleep(n);
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}
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@ -40,7 +40,7 @@ namespace {
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char Thumb2ITBlockPass::ID = 0;
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}
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ARMCC::CondCodes getPredicate(const MachineInstr *MI,
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static ARMCC::CondCodes getPredicate(const MachineInstr *MI,
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const Thumb2InstrInfo *TII) {
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unsigned Opc = MI->getOpcode();
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if (Opc == ARM::tBcc || Opc == ARM::t2Bcc)
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@ -898,7 +898,7 @@ LowerSTORE(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
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}
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//! Generate the address of a constant pool entry.
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SDValue
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static SDValue
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LowerConstantPool(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
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MVT PtrVT = Op.getValueType();
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ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(Op);
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@ -1550,7 +1550,7 @@ SDValue SPU::get_v2i64_imm(SDNode *N, SelectionDAG &DAG) {
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}
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//! Lower a BUILD_VECTOR instruction creatively:
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SDValue
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static SDValue
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LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) {
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MVT VT = Op.getValueType();
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MVT EltVT = VT.getVectorElementType();
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@ -549,6 +549,8 @@ static SPCC::CondCodes FPCondCCodeToFCC(ISD::CondCode CC) {
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}
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}
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namespace {
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class TargetLoweringObjectFileSparc : public TargetLoweringObjectFileELF {
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public:
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void getSectionFlagsAsString(SectionKind Kind,
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}
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};
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}
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SparcTargetLowering::SparcTargetLowering(TargetMachine &TM)
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: TargetLowering(TM, new TargetLoweringObjectFileSparc()) {
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@ -172,7 +172,7 @@ static void findUsedValues(GlobalVariable *LLVMUsed,
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}
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/// StripSymbolNames - Strip symbol names.
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bool StripSymbolNames(Module &M, bool PreserveDbgInfo) {
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static bool StripSymbolNames(Module &M, bool PreserveDbgInfo) {
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SmallPtrSet<const GlobalValue*, 8> llvmUsedValues;
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findUsedValues(M.getGlobalVariable("llvm.used"), llvmUsedValues);
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@ -201,7 +201,7 @@ bool StripSymbolNames(Module &M, bool PreserveDbgInfo) {
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// StripDebugInfo - Strip debug info in the module if it exists.
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// To do this, we remove llvm.dbg.func.start, llvm.dbg.stoppoint, and
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// llvm.dbg.region.end calls, and any globals they point to if now dead.
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bool StripDebugInfo(Module &M) {
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static bool StripDebugInfo(Module &M) {
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SmallPtrSet<const GlobalValue*, 8> llvmUsedValues;
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findUsedValues(M.getGlobalVariable("llvm.used"), llvmUsedValues);
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@ -760,6 +760,7 @@ void PromoteMem2Reg::RewriteSingleStoreAlloca(AllocaInst *AI,
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}
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}
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namespace {
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/// StoreIndexSearchPredicate - This is a helper predicate used to search by the
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/// first element of a pair.
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@ -770,6 +771,8 @@ struct StoreIndexSearchPredicate {
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}
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};
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}
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/// PromoteSingleBlockAlloca - Many allocas are only used within a single basic
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/// block. If this is the case, avoid traversing the CFG and inserting a lot of
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/// potentially useless PHI nodes by just performing a single linear pass over
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@ -1582,13 +1582,13 @@ void TimingInfo::createTheTimeInfo() {
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}
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/// If TimingInfo is enabled then start pass timer.
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void StartPassTimer(Pass *P) {
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void llvm::StartPassTimer(Pass *P) {
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if (TheTimeInfo)
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TheTimeInfo->passStarted(P);
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}
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/// If TimingInfo is enabled then stop pass timer.
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void StopPassTimer(Pass *P) {
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void llvm::StopPassTimer(Pass *P) {
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if (TheTimeInfo)
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TheTimeInfo->passEnded(P);
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}
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