[mips][fastisel] Conditional moves do not have implicit operands.

Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D19862

llvm-svn: 268730
This commit is contained in:
Daniel Sanders 2016-05-06 12:57:26 +00:00
parent a139f86128
commit a6cda12179
2 changed files with 6 additions and 7 deletions
llvm
lib/Target/Mips
test/CodeGen/Mips/Fast-ISel

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@ -692,11 +692,10 @@ bool MipsFastISel::emitCmp(unsigned ResultReg, const CmpInst *CI) {
emitInst(Mips::ADDiu, RegWithOne).addReg(Mips::ZERO).addImm(1); emitInst(Mips::ADDiu, RegWithOne).addReg(Mips::ZERO).addImm(1);
emitInst(Opc).addReg(LeftReg).addReg(RightReg).addReg( emitInst(Opc).addReg(LeftReg).addReg(RightReg).addReg(
Mips::FCC0, RegState::ImplicitDefine); Mips::FCC0, RegState::ImplicitDefine);
MachineInstrBuilder MI = emitInst(CondMovOpc, ResultReg) emitInst(CondMovOpc, ResultReg)
.addReg(RegWithOne) .addReg(RegWithOne)
.addReg(Mips::FCC0) .addReg(Mips::FCC0)
.addReg(RegWithZero, RegState::Implicit); .addReg(RegWithZero);
MI->tieOperands(0, 3);
break; break;
} }
} }

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@ -1,7 +1,7 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ ; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s ; RUN: -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \ ; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
; RUN: < %s | FileCheck %s ; RUN: -verify-machineinstrs < %s | FileCheck %s
@f1 = common global float 0.000000e+00, align 4 @f1 = common global float 0.000000e+00, align 4
@f2 = common global float 0.000000e+00, align 4 @f2 = common global float 0.000000e+00, align 4