forked from OSchip/llvm-project
For values that are live across basic blocks and need promotion, use ANY_EXTEND
instead of ZERO_EXTEND to eliminate extraneous extensions. This eliminates dead zero extensions on formal arguments and other cases on PPC, implementing the newly tightened up test/Regression/CodeGen/PowerPC/small-arguments.ll test. llvm-svn: 23205
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@ -491,7 +491,7 @@ void SelectionDAGLowering::visitBinary(User &I, unsigned Opcode, bool isShift) {
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SDOperand Op2 = getValue(I.getOperand(1));
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if (isShift)
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Op2 = DAG.getNode(ISD::ZERO_EXTEND, TLI.getShiftAmountTy(), Op2);
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Op2 = DAG.getNode(ISD::ANY_EXTEND, TLI.getShiftAmountTy(), Op2);
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setValue(&I, DAG.getNode(Opcode, Op1.getValueType(), Op1, Op2));
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}
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@ -1025,7 +1025,7 @@ CopyValueToVirtualRegister(SelectionDAGLowering &SDL, Value *V, unsigned Reg) {
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if (MVT::isFloatingPoint(SrcVT))
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Op = DAG.getNode(ISD::FP_EXTEND, DestVT, Op);
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else
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Op = DAG.getNode(ISD::ZERO_EXTEND, DestVT, Op);
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Op = DAG.getNode(ISD::ANY_EXTEND, DestVT, Op);
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return DAG.getCopyToReg(SDL.getRoot(), Reg, Op);
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} else {
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// The src value is expanded into multiple registers.
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@ -1078,14 +1078,9 @@ LowerArguments(BasicBlock *BB, SelectionDAGLowering &SDL,
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if (!AI->use_empty()) {
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SDL.setValue(AI, Args[a]);
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if (0 && IsOnlyUsedInOneBasicBlock(AI) == F.begin()) {
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// Only used in the entry block, no need to copy it to a vreg for
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// other blocks.
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} else {
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SDOperand Copy =
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CopyValueToVirtualRegister(SDL, AI, FuncInfo.ValueMap[AI]);
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UnorderedChains.push_back(Copy);
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}
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SDOperand Copy =
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CopyValueToVirtualRegister(SDL, AI, FuncInfo.ValueMap[AI]);
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UnorderedChains.push_back(Copy);
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}
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} else {
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// Otherwise, if any argument is only accessed in a single basic block,
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