forked from OSchip/llvm-project
Remove temp. option -spiller-check-liveout, it didn't cause any failure nor performance regressions.
llvm-svn: 28029
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78d9ae3f0c
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a656242690
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@ -51,6 +51,7 @@ namespace {
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short NumSuccsLeft; // # of succs not scheduled.
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short NumChainPredsLeft; // # of chain preds not scheduled.
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short NumChainSuccsLeft; // # of chain succs not scheduled.
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bool isStore : 1; // Is a store.
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bool isTwoAddress : 1; // Is a two-address instruction.
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bool isDefNUseOperand : 1; // Is a def&use operand.
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bool isPending : 1; // True once pending.
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@ -63,7 +64,7 @@ namespace {
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SUnit(SDNode *node, unsigned nodenum)
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: Node(node), NumPredsLeft(0), NumSuccsLeft(0),
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NumChainPredsLeft(0), NumChainSuccsLeft(0),
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NumChainPredsLeft(0), NumChainSuccsLeft(0), isStore(false),
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isTwoAddress(false), isDefNUseOperand(false),
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isPending(false), isAvailable(false), isScheduled(false),
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Latency(0), CycleBound(0), Cycle(0), NodeNum(nodenum) {}
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@ -315,9 +316,13 @@ void ScheduleDAGList::BuildSchedUnits() {
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SUnit *SU = &SUnits[su];
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SDNode *MainNode = SU->Node;
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if (MainNode->isTargetOpcode() &&
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TII->isTwoAddrInstr(MainNode->getTargetOpcode()))
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SU->isTwoAddress = true;
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if (MainNode->isTargetOpcode()) {
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unsigned Opc = MainNode->getTargetOpcode();
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if (TII->isTwoAddrInstr(Opc))
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SU->isTwoAddress = true;
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if (TII->isStore(Opc))
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SU->isStore = true;
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}
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// Find all predecessors and successors of the group.
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// Temporarily add N to make code simpler.
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@ -358,9 +363,9 @@ void ScheduleDAGList::BuildSchedUnits() {
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SU->FlaggedNodes.pop_back();
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}
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return;
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DEBUG(for (unsigned su = 0, e = SUnits.size(); su != e; ++su)
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SUnits[su].dumpAll(&DAG));
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return;
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}
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/// EmitSchedule - Emit the machine code in scheduled order.
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@ -735,7 +740,7 @@ namespace {
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const std::vector<SUnit> *SUnits;
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// SethiUllmanNumbers - The SethiUllman number for each node.
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std::vector<int> SethiUllmanNumbers;
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std::vector<unsigned> SethiUllmanNumbers;
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std::priority_queue<SUnit*, std::vector<SUnit*>, ls_rr_sort> Queue;
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public:
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@ -774,7 +779,7 @@ namespace {
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}
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private:
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void CalculatePriorities();
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int CalcNodePriority(const SUnit *SU);
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unsigned CalcNodePriority(const SUnit *SU);
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};
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}
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@ -784,7 +789,7 @@ bool ls_rr_sort::operator()(const SUnit *left, const SUnit *right) const {
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int LBonus = (int)left ->isDefNUseOperand;
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int RBonus = (int)right->isDefNUseOperand;
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// Special tie breaker: if two nodes share a operand, the one that
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// use it as a def&use operand is preferred.
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if (left->isTwoAddress && !right->isTwoAddress) {
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@ -798,6 +803,20 @@ bool ls_rr_sort::operator()(const SUnit *left, const SUnit *right) const {
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RBonus++;
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}
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// Push stores up as much as possible. This really help code like this:
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// load
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// compute
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// store
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// load
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// compute
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// store
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// This would make sure the scheduled code completed all computations and
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// the stores before the next series of computation starts.
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if (!left->isStore && right->isStore)
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LBonus += 2;
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if (left->isStore && !right->isStore)
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RBonus += 2;
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// Priority1 is just the number of live range genned.
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int LPriority1 = left ->NumPredsLeft - LBonus;
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int RPriority1 = right->NumPredsLeft - RBonus;
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@ -819,9 +838,9 @@ bool ls_rr_sort::operator()(const SUnit *left, const SUnit *right) const {
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/// CalcNodePriority - Priority is the Sethi Ullman number.
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/// Smaller number is the higher priority.
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int RegReductionPriorityQueue::CalcNodePriority(const SUnit *SU) {
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int &SethiUllmanNumber = SethiUllmanNumbers[SU->NodeNum];
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if (SethiUllmanNumber != INT_MIN)
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unsigned RegReductionPriorityQueue::CalcNodePriority(const SUnit *SU) {
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unsigned &SethiUllmanNumber = SethiUllmanNumbers[SU->NodeNum];
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if (SethiUllmanNumber != 0)
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return SethiUllmanNumber;
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if (SU->Preds.size() == 0) {
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@ -832,7 +851,7 @@ int RegReductionPriorityQueue::CalcNodePriority(const SUnit *SU) {
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I = SU->Preds.begin(), E = SU->Preds.end(); I != E; ++I) {
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if (I->second) continue; // ignore chain preds.
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SUnit *PredSU = I->first;
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int PredSethiUllman = CalcNodePriority(PredSU);
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unsigned PredSethiUllman = CalcNodePriority(PredSU);
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if (PredSethiUllman > SethiUllmanNumber) {
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SethiUllmanNumber = PredSethiUllman;
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Extra = 0;
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@ -840,10 +859,7 @@ int RegReductionPriorityQueue::CalcNodePriority(const SUnit *SU) {
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Extra++;
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}
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if (SU->Node->getOpcode() != ISD::TokenFactor)
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SethiUllmanNumber += Extra;
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else
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SethiUllmanNumber = (Extra == 1) ? 0 : Extra-1;
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SethiUllmanNumber += Extra;
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}
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return SethiUllmanNumber;
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@ -851,7 +867,7 @@ int RegReductionPriorityQueue::CalcNodePriority(const SUnit *SU) {
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/// CalculatePriorities - Calculate priorities of all scheduling units.
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void RegReductionPriorityQueue::CalculatePriorities() {
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SethiUllmanNumbers.assign(SUnits->size(), INT_MIN);
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SethiUllmanNumbers.assign(SUnits->size(), 0);
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for (unsigned i = 0, e = SUnits->size(); i != e; ++i)
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CalcNodePriority(&(*SUnits)[i]);
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@ -50,10 +50,6 @@ namespace {
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clEnumVal(local, " local spiller"),
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clEnumValEnd),
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cl::init(local));
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// TEMPORARY option to test a fix.
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cl::opt<bool>
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SpillerCheckLiveOut("spiller-check-liveout", cl::Hidden);
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}
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//===----------------------------------------------------------------------===//
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@ -735,7 +731,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) {
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// If we get here, the store is dead, nuke it now.
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assert(!(MR & VirtRegMap::isRef) && "Can't be modref!");
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// Don't nuke it if the value is needed in another block.
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if (!SpillerCheckLiveOut || !(MR & VirtRegMap::isLiveOut)) {
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if (!(MR & VirtRegMap::isLiveOut)) {
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DEBUG(std::cerr << " Killed store:\t" << *MDSI->second);
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MBB.erase(MDSI->second);
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MaybeDeadStores.erase(MDSI);
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