forked from OSchip/llvm-project
[mips][micromips] Fix how values in .gcc_except_table are calculated
When a landing pad is calculated in a program that is compiled for micromips, it will point to an even address. Such an error will cause a segmentation fault, as the instructions in micromips are aligned on odd addresses. This patch sets the last bit of the offset where a landing pad is, to 1, which will effectively be an odd address and point to the instruction exactly. Differential Revision: https://reviews.llvm.org/D52985 llvm-svn: 344591
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@ -165,6 +165,11 @@ public:
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return 0;
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return 0;
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}
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}
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/// Check whether a given symbol has been flagged with MICROMIPS flag.
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virtual bool isMicroMips(const MCSymbol *Sym) const {
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return false;
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}
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/// Handles all target related code padding when starting to write a new
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/// Handles all target related code padding when starting to write a new
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/// basic block to an object file.
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/// basic block to an object file.
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///
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///
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@ -526,6 +526,11 @@ static void AttemptToFoldSymbolOffsetDifference(
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if (Asm->isThumbFunc(&SA))
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if (Asm->isThumbFunc(&SA))
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Addend |= 1;
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Addend |= 1;
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// If symbol is labeled as micromips, we set low-bit to ensure
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// correct offset in .gcc_except_table
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if (Asm->getBackend().isMicroMips(&SA))
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Addend |= 1;
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// Clear the symbol expr pointers to indicate we have folded these
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// Clear the symbol expr pointers to indicate we have folded these
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// operands.
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// operands.
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A = B = nullptr;
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A = B = nullptr;
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@ -569,6 +569,14 @@ bool MipsAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
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}
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}
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}
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}
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bool MipsAsmBackend::isMicroMips(const MCSymbol *Sym) const {
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if (const auto *ElfSym = dyn_cast<const MCSymbolELF>(Sym)) {
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if (ElfSym->getOther() & ELF::STO_MIPS_MICROMIPS)
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return true;
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}
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return false;
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}
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MCAsmBackend *llvm::createMipsAsmBackend(const Target &T,
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MCAsmBackend *llvm::createMipsAsmBackend(const Target &T,
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const MCSubtargetInfo &STI,
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const MCSubtargetInfo &STI,
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const MCRegisterInfo &MRI,
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const MCRegisterInfo &MRI,
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@ -25,6 +25,7 @@ class MCAssembler;
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struct MCFixupKindInfo;
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struct MCFixupKindInfo;
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class MCObjectWriter;
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class MCObjectWriter;
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class MCRegisterInfo;
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class MCRegisterInfo;
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class MCSymbolELF;
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class Target;
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class Target;
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class MipsAsmBackend : public MCAsmBackend {
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class MipsAsmBackend : public MCAsmBackend {
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@ -90,6 +91,7 @@ public:
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bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
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bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
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const MCValue &Target) override;
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const MCValue &Target) override;
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bool isMicroMips(const MCSymbol *Sym) const override;
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}; // class MipsAsmBackend
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}; // class MipsAsmBackend
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} // namespace
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} // namespace
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@ -0,0 +1,37 @@
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; RUN: llc -mtriple=mips-linux-gnu -mcpu=mips32r2 -mattr=+micromips -O3 -filetype=obj < %s | llvm-objdump -s -j .gcc_except_table - | FileCheck %s
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; CHECK: Contents of section .gcc_except_table:
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; CHECK-NEXT: 0000 ff9b1501 0c011100 00110e1f 011f1800
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; CHECK-NEXT: 0010 00010000 00000000
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@_ZTIi = external constant i8*
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define dso_local i32 @main() local_unnamed_addr norecurse personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
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entry:
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%exception.i = tail call i8* @__cxa_allocate_exception(i32 4) nounwind
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%0 = bitcast i8* %exception.i to i32*
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store i32 5, i32* %0, align 16
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invoke void @__cxa_throw(i8* %exception.i, i8* bitcast (i8** @_ZTIi to i8*), i8* null) noreturn
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to label %.noexc unwind label %return
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.noexc:
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unreachable
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return:
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%1 = landingpad { i8*, i32 }
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catch i8* null
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%2 = extractvalue { i8*, i32 } %1, 0
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%3 = tail call i8* @__cxa_begin_catch(i8* %2) nounwind
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tail call void @__cxa_end_catch()
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ret i32 0
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}
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declare i32 @__gxx_personality_v0(...)
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declare i8* @__cxa_begin_catch(i8*) local_unnamed_addr
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declare void @__cxa_end_catch() local_unnamed_addr
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declare i8* @__cxa_allocate_exception(i32) local_unnamed_addr
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declare void @__cxa_throw(i8*, i8*, i8*) local_unnamed_addr
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