forked from OSchip/llvm-project
Switch this instruction selector over to using liveins and liveouts, eliminating
implicit defs on entry to the function. yaay :) llvm-svn: 21184
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1a44855f8f
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@ -729,7 +729,8 @@ void PPC32ISel::LoadArgumentsToVirtualRegs(Function &Fn) {
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MachineFrameInfo *MFI = F->getFrameInfo();
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for (Function::arg_iterator I = Fn.arg_begin(), E = Fn.arg_end(); I != E; ++I) {
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for (Function::arg_iterator I = Fn.arg_begin(), E = Fn.arg_end();
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I != E; ++I) {
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bool ArgLive = !I->use_empty();
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unsigned Reg = ArgLive ? getReg(*I) : 0;
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int FI; // Frame object index
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@ -739,7 +740,7 @@ void PPC32ISel::LoadArgumentsToVirtualRegs(Function &Fn) {
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if (ArgLive) {
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FI = MFI->CreateFixedObject(4, ArgOffset);
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if (GPR_remaining > 0) {
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BuildMI(BB, PPC::IMPLICIT_DEF, 0, GPR[GPR_idx]);
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F->addLiveIn(GPR[GPR_idx]);
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BuildMI(BB, PPC::OR, 2, Reg).addReg(GPR[GPR_idx])
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.addReg(GPR[GPR_idx]);
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} else {
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@ -751,7 +752,7 @@ void PPC32ISel::LoadArgumentsToVirtualRegs(Function &Fn) {
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if (ArgLive) {
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FI = MFI->CreateFixedObject(4, ArgOffset);
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if (GPR_remaining > 0) {
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BuildMI(BB, PPC::IMPLICIT_DEF, 0, GPR[GPR_idx]);
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F->addLiveIn(GPR[GPR_idx]);
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BuildMI(BB, PPC::OR, 2, Reg).addReg(GPR[GPR_idx])
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.addReg(GPR[GPR_idx]);
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} else {
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@ -763,7 +764,7 @@ void PPC32ISel::LoadArgumentsToVirtualRegs(Function &Fn) {
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if (ArgLive) {
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FI = MFI->CreateFixedObject(4, ArgOffset);
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if (GPR_remaining > 0) {
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BuildMI(BB, PPC::IMPLICIT_DEF, 0, GPR[GPR_idx]);
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F->addLiveIn(GPR[GPR_idx]);
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BuildMI(BB, PPC::OR, 2, Reg).addReg(GPR[GPR_idx])
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.addReg(GPR[GPR_idx]);
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} else {
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@ -775,8 +776,8 @@ void PPC32ISel::LoadArgumentsToVirtualRegs(Function &Fn) {
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if (ArgLive) {
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FI = MFI->CreateFixedObject(8, ArgOffset);
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if (GPR_remaining > 1) {
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BuildMI(BB, PPC::IMPLICIT_DEF, 0, GPR[GPR_idx]);
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BuildMI(BB, PPC::IMPLICIT_DEF, 0, GPR[GPR_idx+1]);
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F->addLiveIn(GPR[GPR_idx]);
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F->addLiveIn(GPR[GPR_idx+1]);
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BuildMI(BB, PPC::OR, 2, Reg).addReg(GPR[GPR_idx])
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.addReg(GPR[GPR_idx]);
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BuildMI(BB, PPC::OR, 2, Reg+1).addReg(GPR[GPR_idx+1])
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@ -798,7 +799,7 @@ void PPC32ISel::LoadArgumentsToVirtualRegs(Function &Fn) {
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FI = MFI->CreateFixedObject(4, ArgOffset);
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if (FPR_remaining > 0) {
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BuildMI(BB, PPC::IMPLICIT_DEF, 0, FPR[FPR_idx]);
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F->addLiveIn(FPR[FPR_idx]);
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BuildMI(BB, PPC::FMR, 1, Reg).addReg(FPR[FPR_idx]);
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FPR_remaining--;
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FPR_idx++;
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@ -812,7 +813,7 @@ void PPC32ISel::LoadArgumentsToVirtualRegs(Function &Fn) {
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FI = MFI->CreateFixedObject(8, ArgOffset);
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if (FPR_remaining > 0) {
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BuildMI(BB, PPC::IMPLICIT_DEF, 0, FPR[FPR_idx]);
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F->addLiveIn(FPR[FPR_idx]);
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BuildMI(BB, PPC::FMR, 1, Reg).addReg(FPR[FPR_idx]);
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FPR_remaining--;
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FPR_idx++;
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@ -843,6 +844,23 @@ void PPC32ISel::LoadArgumentsToVirtualRegs(Function &Fn) {
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// llvm.va_start.
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if (Fn.getFunctionType()->isVarArg())
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VarArgsFrameIndex = MFI->CreateFixedObject(4, ArgOffset);
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if (Fn.getReturnType() != Type::VoidTy)
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switch (getClassB(Fn.getReturnType())) {
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case cByte:
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case cShort:
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case cInt:
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F->addLiveOut(PPC::R3);
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break;
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case cLong:
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F->addLiveOut(PPC::R3);
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F->addLiveOut(PPC::R4);
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break;
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case cFP32:
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case cFP64:
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F->addLiveOut(PPC::F1);
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break;
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}
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}
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