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[AVR] Use correct register class for mul instructions 

A number of multiplication instructions (muls, mulsu, fmul, fmuls,
fmulsu) had the wrong register class for an operand. This resulted in
the wrong register being used for the instruction.

Example:

    target datalayout = "e-P1-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8-a:8"
    target triple = "avr-atmel-none"

    define i16 @sliceAppend(i16, i16, i16, i16, i16, i16) addrspace(1) {
      %d = mul i16 %0, %5
      ret i16 %d
    }

The first instruction would be muls r24, r31 before this patch. The r31
should have been r15 if you look at the intermediate forms during
instruction selection / register allocation, but the generated
instruction uses r31. After this patch, an extra movw is inserted to get
%5 in range for muls.

To make sure this bug is fixed everywhere, I checked all instructions
and found that most multiplication instructions suffered from this bug,
which I have fixed with this patch. No other instructions appear to be
affected.

Differential Revision: https://reviews.llvm.org/D74281
This commit is contained in:
Ayke van Laethem 2020-02-24 15:45:43 +01:00
parent bee70bfff0
commit a5424ded37
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GPG Key ID: E97FF5335DFDFDED
1 changed files with 5 additions and 5 deletions
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10
llvm/lib/Target/AVR/AVRInstrInfo.td
View File

@ -555,7 +555,7 @@ Defs = [R1, R0, SREG] in
def MULSRdRr : FMUL2RdRr<0,
(outs),
(ins GPR8:$lhs, GPR8:$rhs),
(ins LD8:$lhs, LD8:$rhs),
"muls\t$lhs, $rhs",
[]>,
Requires<[SupportsMultiplication]>;
@ -563,28 +563,28 @@ Defs = [R1, R0, SREG] in
def MULSURdRr : FMUL2RdRr<1,
(outs),
(ins GPR8:$lhs, GPR8:$rhs),
(ins LD8lo:$lhs, LD8lo:$rhs),
"mulsu\t$lhs, $rhs",
[]>,
Requires<[SupportsMultiplication]>;
def FMUL : FFMULRdRr<0b01,
(outs),
(ins GPR8:$lhs, GPR8:$rhs),
(ins LD8lo:$lhs, LD8lo:$rhs),
"fmul\t$lhs, $rhs",
[]>,
Requires<[SupportsMultiplication]>;
def FMULS : FFMULRdRr<0b10,
(outs),
(ins GPR8:$lhs, GPR8:$rhs),
(ins LD8lo:$lhs, LD8lo:$rhs),
"fmuls\t$lhs, $rhs",
[]>,
Requires<[SupportsMultiplication]>;
def FMULSU : FFMULRdRr<0b11,
(outs),
(ins GPR8:$lhs, GPR8:$rhs),
(ins LD8lo:$lhs, LD8lo:$rhs),
"fmulsu\t$lhs, $rhs",
[]>,
Requires<[SupportsMultiplication]>;