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Revert r367891 - "[InstCombine] combine mul+shl separated by zext" 

This reverts commit 5dbb90bfe1.

As noted in the post-commit thread for r367891, this can create
a multiply that is lowered to a libcall that may not exist.

We need to improve the backend decomposition for integer multiply
before trying to re-land this (if it's still worthwhile after
doing the backend work).

llvm-svn: 369174
This commit is contained in:
Sanjay Patel 2019-08-16 23:36:28 +00:00
parent 16fa8b0970
commit a53ad0e157
2 changed files with 10 additions and 19 deletions
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15
llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
View File

@ -763,25 +763,14 @@ Instruction *InstCombiner::visitShl(BinaryOperator &I) {
unsigned ShAmt = ShAmtAPInt->getZExtValue();
unsigned BitWidth = Ty->getScalarSizeInBits();
// shl (zext X), ShAmt --> zext (shl X, ShAmt)
// This is only valid if X would have zeros shifted out.
Value *X;
if (match(Op0, m_OneUse(m_ZExt(m_Value(X))))) {
unsigned SrcWidth = X->getType()->getScalarSizeInBits();
// shl (zext X), ShAmt --> zext (shl X, ShAmt)
// This is only valid if X would have zeros shifted out.
if (ShAmt < SrcWidth &&
MaskedValueIsZero(X, APInt::getHighBitsSet(SrcWidth, ShAmt), 0, &I))
return new ZExtInst(Builder.CreateShl(X, ShAmt), Ty);
// shl (zext (mul MulOp, C2)), ShAmt --> mul (zext MulOp), (C2 << ShAmt)
// This is valid if the high bits of the wider multiply are shifted out.
Value *MulOp;
const APInt *C2;
if (ShAmt >= (BitWidth - SrcWidth) &&
match(X, m_Mul(m_Value(MulOp), m_APInt(C2)))) {
Value *Zext = Builder.CreateZExt(MulOp, Ty);
Constant *NewMulC = ConstantInt::get(Ty, C2->zext(BitWidth).shl(ShAmt));
return BinaryOperator::CreateMul(Zext, NewMulC);
}
}
// (X >> C) << C --> X & (-1 << C)

14
llvm/test/Transforms/InstCombine/shift.ll
View File

@ -1223,8 +1223,9 @@ define <2 x i64> @shl_zext_splat_vec(<2 x i32> %t) {
define i64 @shl_zext_mul(i32 %t) {
; CHECK-LABEL: @shl_zext_mul(
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[T:%.*]] to i64
; CHECK-NEXT: [[SHL:%.*]] = mul i64 [[TMP1]], 72057589742960640
; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[T:%.*]], 16777215
; CHECK-NEXT: [[EXT:%.*]] = zext i32 [[MUL]] to i64
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i64 [[EXT]], 32
; CHECK-NEXT: ret i64 [[SHL]]
;
%mul = mul i32 %t, 16777215
@ -1235,8 +1236,9 @@ define i64 @shl_zext_mul(i32 %t) {
define <3 x i17> @shl_zext_mul_splat(<3 x i5> %t) {
; CHECK-LABEL: @shl_zext_mul_splat(
; CHECK-NEXT: [[TMP1:%.*]] = zext <3 x i5> [[T:%.*]] to <3 x i17>
; CHECK-NEXT: [[SHL:%.*]] = mul <3 x i17> [[TMP1]], <i17 53248, i17 53248, i17 53248>
; CHECK-NEXT: [[MUL:%.*]] = mul <3 x i5> [[T:%.*]], <i5 13, i5 13, i5 13>
; CHECK-NEXT: [[EXT:%.*]] = zext <3 x i5> [[MUL]] to <3 x i17>
; CHECK-NEXT: [[SHL:%.*]] = shl nuw <3 x i17> [[EXT]], <i17 12, i17 12, i17 12>
; CHECK-NEXT: ret <3 x i17> [[SHL]]
;
%mul = mul <3 x i5> %t, <i5 13, i5 13, i5 13>
@ -1279,8 +1281,8 @@ define i64 @shl_zext_mul_extra_use2(i32 %t) {
; CHECK-LABEL: @shl_zext_mul_extra_use2(
; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[T:%.*]], 16777215
; CHECK-NEXT: call void @use_i32(i32 [[MUL]])
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[T]] to i64
; CHECK-NEXT: [[SHL:%.*]] = mul i64 [[TMP1]], 72057589742960640
; CHECK-NEXT: [[EXT:%.*]] = zext i32 [[MUL]] to i64
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i64 [[EXT]], 32
; CHECK-NEXT: ret i64 [[SHL]]
;
%mul = mul i32 %t, 16777215