forked from OSchip/llvm-project
[AMDGPU] Fix mai hazard VALU to LD/ST
Fixes: SWDEV-251863 Differential Revision: https://reviews.llvm.org/D89079
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@ -1368,7 +1368,7 @@ int GCNHazardRecognizer::checkMAILdStHazards(MachineInstr *MI) {
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Register Reg = Op.getReg();
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Register Reg = Op.getReg();
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const int AccVgprReadLdStWaitStates = 2;
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const int AccVgprReadLdStWaitStates = 2;
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const int VALUWriteAccVgprReadLdStDepVALUWaitStates = 1;
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const int VALUWriteAccVgprRdWrLdStDepVALUWaitStates = 1;
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const int MaxWaitStates = 2;
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const int MaxWaitStates = 2;
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int WaitStatesNeededForUse = AccVgprReadLdStWaitStates -
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int WaitStatesNeededForUse = AccVgprReadLdStWaitStates -
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@ -1378,8 +1378,9 @@ int GCNHazardRecognizer::checkMAILdStHazards(MachineInstr *MI) {
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if (WaitStatesNeeded == MaxWaitStates)
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if (WaitStatesNeeded == MaxWaitStates)
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return WaitStatesNeeded; // Early exit.
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return WaitStatesNeeded; // Early exit.
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auto IsVALUAccVgprReadCheckFn = [Reg, this] (MachineInstr *MI) {
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auto IsVALUAccVgprRdWrCheckFn = [Reg, this](MachineInstr *MI) {
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if (MI->getOpcode() != AMDGPU::V_ACCVGPR_READ_B32)
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if (MI->getOpcode() != AMDGPU::V_ACCVGPR_READ_B32 &&
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MI->getOpcode() != AMDGPU::V_ACCVGPR_WRITE_B32)
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return false;
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return false;
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auto IsVALUFn = [] (MachineInstr *MI) {
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auto IsVALUFn = [] (MachineInstr *MI) {
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return SIInstrInfo::isVALU(*MI) && !SIInstrInfo::isMAI(*MI);
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return SIInstrInfo::isVALU(*MI) && !SIInstrInfo::isMAI(*MI);
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@ -1388,8 +1389,8 @@ int GCNHazardRecognizer::checkMAILdStHazards(MachineInstr *MI) {
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std::numeric_limits<int>::max();
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std::numeric_limits<int>::max();
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};
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};
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WaitStatesNeededForUse = VALUWriteAccVgprReadLdStDepVALUWaitStates -
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WaitStatesNeededForUse = VALUWriteAccVgprRdWrLdStDepVALUWaitStates -
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getWaitStatesSince(IsVALUAccVgprReadCheckFn, MaxWaitStates);
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getWaitStatesSince(IsVALUAccVgprRdWrCheckFn, MaxWaitStates);
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WaitStatesNeeded = std::max(WaitStatesNeeded, WaitStatesNeededForUse);
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WaitStatesNeeded = std::max(WaitStatesNeeded, WaitStatesNeededForUse);
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}
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}
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@ -480,6 +480,20 @@ body: |
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...
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...
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---
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---
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# GCN-LABEL: name: valu_write_vgpr_accvgpr_write_load_1_and_3_depend
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# GCN: V_MOV_B32
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# GCN-NEXT: V_ACCVGPR_WRITE_B32
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# GCN-NEXT: S_NOP 0
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# GCN-NEXT: FLAT_LOAD_DWORD
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name: valu_write_vgpr_accvgpr_write_load_1_and_3_depend
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body: |
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bb.0:
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$vgpr0 = V_MOV_B32_e32 1, implicit $exec
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$agpr0 = V_ACCVGPR_WRITE_B32 killed $vgpr2, implicit $exec
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$vgpr4 = FLAT_LOAD_DWORD $vgpr0_vgpr1, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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...
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---
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# GCN-LABEL: name: valu_write_vgpr_accvgpr_read_load_2_and_3_depend
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# GCN-LABEL: name: valu_write_vgpr_accvgpr_read_load_2_and_3_depend
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# GCN: V_MOV_B32
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# GCN: V_MOV_B32
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# GCN-NEXT: V_ACCVGPR_READ_B32
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# GCN-NEXT: V_ACCVGPR_READ_B32
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