maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[AMDGPU] Fix mai hazard VALU to LD/ST 

Fixes: SWDEV-251863

Differential Revision: https://reviews.llvm.org/D89079
This commit is contained in:
Austin Kerbow 2020-10-08 13:19:34 -07:00
parent d1751d14a6
commit a4f35ab232
2 changed files with 20 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
View File

@ -1368,7 +1368,7 @@ int GCNHazardRecognizer::checkMAILdStHazards(MachineInstr *MI) {
Register Reg = Op.getReg();
const int AccVgprReadLdStWaitStates = 2;
const int VALUWriteAccVgprReadLdStDepVALUWaitStates = 1;
const int VALUWriteAccVgprRdWrLdStDepVALUWaitStates = 1;
const int MaxWaitStates = 2;
int WaitStatesNeededForUse = AccVgprReadLdStWaitStates -
@ -1378,8 +1378,9 @@ int GCNHazardRecognizer::checkMAILdStHazards(MachineInstr *MI) {
if (WaitStatesNeeded == MaxWaitStates)
return WaitStatesNeeded; // Early exit.
auto IsVALUAccVgprReadCheckFn = [Reg, this] (MachineInstr *MI) {
if (MI->getOpcode() != AMDGPU::V_ACCVGPR_READ_B32)
auto IsVALUAccVgprRdWrCheckFn = [Reg, this](MachineInstr *MI) {
if (MI->getOpcode() != AMDGPU::V_ACCVGPR_READ_B32 &&
MI->getOpcode() != AMDGPU::V_ACCVGPR_WRITE_B32)
return false;
auto IsVALUFn = [] (MachineInstr *MI) {
return SIInstrInfo::isVALU(*MI) && !SIInstrInfo::isMAI(*MI);
@ -1388,8 +1389,8 @@ int GCNHazardRecognizer::checkMAILdStHazards(MachineInstr *MI) {
std::numeric_limits<int>::max();
};
WaitStatesNeededForUse = VALUWriteAccVgprReadLdStDepVALUWaitStates -
getWaitStatesSince(IsVALUAccVgprReadCheckFn, MaxWaitStates);
WaitStatesNeededForUse = VALUWriteAccVgprRdWrLdStDepVALUWaitStates -
getWaitStatesSince(IsVALUAccVgprRdWrCheckFn, MaxWaitStates);
WaitStatesNeeded = std::max(WaitStatesNeeded, WaitStatesNeededForUse);
}

14
llvm/test/CodeGen/AMDGPU/mai-hazards.mir
View File

@ -480,6 +480,20 @@ body: |
...
---
# GCN-LABEL: name: valu_write_vgpr_accvgpr_write_load_1_and_3_depend
# GCN: V_MOV_B32
# GCN-NEXT: V_ACCVGPR_WRITE_B32
# GCN-NEXT: S_NOP 0
# GCN-NEXT: FLAT_LOAD_DWORD
name: valu_write_vgpr_accvgpr_write_load_1_and_3_depend
body: |
bb.0:
$vgpr0 = V_MOV_B32_e32 1, implicit $exec
$agpr0 = V_ACCVGPR_WRITE_B32 killed $vgpr2, implicit $exec
$vgpr4 = FLAT_LOAD_DWORD $vgpr0_vgpr1, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
...
---
# GCN-LABEL: name: valu_write_vgpr_accvgpr_read_load_2_and_3_depend
# GCN: V_MOV_B32
# GCN-NEXT: V_ACCVGPR_READ_B32