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Add SchedRW as an Instruction field. 

Don't require instructions to inherit Sched<...>. Sometimes it is more
convenient to say:

  let SchedRW = ... in {
    ...
  }

Which is now possible.

llvm-svn: 177199
This commit is contained in:
Jakob Stoklund Olesen 2013-03-15 22:51:13 +00:00
parent 862884327f
commit a4a361df5b
3 changed files with 14 additions and 6 deletions
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5
llvm/include/llvm/TableGen/Record.h
View File

@ -1559,6 +1559,11 @@ public:
/// ///
Init *getValueInit(StringRef FieldName) const; Init *getValueInit(StringRef FieldName) const;
/// Return true if the named field is unset.
bool isValueUnset(StringRef FieldName) const {
return getValueInit(FieldName) == UnsetInit::get();
}
/// getValueAsString - This method looks up the specified field and returns /// getValueAsString - This method looks up the specified field and returns
/// its value as a string, throwing an exception if the field does not exist /// its value as a string, throwing an exception if the field does not exist
/// or if the value is not a string. /// or if the value is not a string.

3
llvm/include/llvm/Target/Target.td
View File

@ -397,6 +397,9 @@ class Instruction {
InstrItinClass Itinerary = NoItinerary;// Execution steps used for scheduling. InstrItinClass Itinerary = NoItinerary;// Execution steps used for scheduling.
// Scheduling information from TargetSchedule.td.
list<SchedReadWrite> SchedRW;
string Constraints = ""; // OperandConstraint, e.g. $src = $dst. string Constraints = ""; // OperandConstraint, e.g. $src = $dst.
/// DisableEncoding - List of operand names (e.g. "$op1,$op2") that should not /// DisableEncoding - List of operand names (e.g. "$op1,$op2") that should not

12
llvm/utils/TableGen/CodeGenSchedule.cpp
View File

@ -217,7 +217,7 @@ void CodeGenSchedModels::collectSchedRW() {
for (CodeGenTarget::inst_iterator I = Target.inst_begin(), for (CodeGenTarget::inst_iterator I = Target.inst_begin(),
E = Target.inst_end(); I != E; ++I) { E = Target.inst_end(); I != E; ++I) {
Record *SchedDef = (*I)->TheDef; Record *SchedDef = (*I)->TheDef;
if (!SchedDef->isSubClassOf("Sched")) if (SchedDef->isValueUnset("SchedRW"))
continue; continue;
RecVec RWs = SchedDef->getValueAsListOfDefs("SchedRW"); RecVec RWs = SchedDef->getValueAsListOfDefs("SchedRW");
for (RecIter RWI = RWs.begin(), RWE = RWs.end(); RWI != RWE; ++RWI) { for (RecIter RWI = RWs.begin(), RWE = RWs.end(); RWI != RWE; ++RWI) {
@ -529,7 +529,7 @@ void CodeGenSchedModels::collectSchedClasses() {
// instruction definition that inherits from class Sched. // instruction definition that inherits from class Sched.
for (CodeGenTarget::inst_iterator I = Target.inst_begin(), for (CodeGenTarget::inst_iterator I = Target.inst_begin(),
E = Target.inst_end(); I != E; ++I) { E = Target.inst_end(); I != E; ++I) {
if (!(*I)->TheDef->isSubClassOf("Sched")) if ((*I)->TheDef->isValueUnset("SchedRW"))
continue; continue;
IdxVec Writes, Reads; IdxVec Writes, Reads;
findRWs((*I)->TheDef->getValueAsListOfDefs("SchedRW"), Writes, Reads); findRWs((*I)->TheDef->getValueAsListOfDefs("SchedRW"), Writes, Reads);
@ -553,7 +553,7 @@ void CodeGenSchedModels::collectSchedClasses() {
E = Target.inst_end(); I != E; ++I) { E = Target.inst_end(); I != E; ++I) {
Record *SchedDef = (*I)->TheDef; Record *SchedDef = (*I)->TheDef;
std::string InstName = (*I)->TheDef->getName(); std::string InstName = (*I)->TheDef->getName();
if (SchedDef->isSubClassOf("Sched")) { if (!SchedDef->isValueUnset("SchedRW")) {
IdxVec Writes; IdxVec Writes;
IdxVec Reads; IdxVec Reads;
findRWs((*I)->TheDef->getValueAsListOfDefs("SchedRW"), Writes, Reads); findRWs((*I)->TheDef->getValueAsListOfDefs("SchedRW"), Writes, Reads);
@ -584,7 +584,7 @@ void CodeGenSchedModels::collectSchedClasses() {
} }
continue; continue;
} }
if (!SchedDef->isSubClassOf("Sched") if (SchedDef->isValueUnset("SchedRW")
&& (SchedDef->getValueAsDef("Itinerary")->getName() == "NoItinerary")) { && (SchedDef->getValueAsDef("Itinerary")->getName() == "NoItinerary")) {
dbgs() << "No machine model for " << (*I)->TheDef->getName() << '\n'; dbgs() << "No machine model for " << (*I)->TheDef->getName() << '\n';
} }
@ -627,7 +627,7 @@ unsigned CodeGenSchedModels::getSchedClassIdx(
// If this opcode isn't mapped by the subtarget fallback to the instruction // If this opcode isn't mapped by the subtarget fallback to the instruction
// definition's SchedRW or ItinDef values. // definition's SchedRW or ItinDef values.
if (Inst.TheDef->isSubClassOf("Sched")) { if (!Inst.TheDef->isValueUnset("SchedRW")) {
RecVec RWs = Inst.TheDef->getValueAsListOfDefs("SchedRW"); RecVec RWs = Inst.TheDef->getValueAsListOfDefs("SchedRW");
return getSchedClassIdx(RWs); return getSchedClassIdx(RWs);
} }
@ -719,7 +719,7 @@ void CodeGenSchedModels::createInstRWClass(Record *InstRWDef) {
// class because that is the fall-back class for other processors. // class because that is the fall-back class for other processors.
Record *ItinDef = (*I)->getValueAsDef("Itinerary"); Record *ItinDef = (*I)->getValueAsDef("Itinerary");
SCIdx = SchedClassIdxMap.lookup(ItinDef->getName()); SCIdx = SchedClassIdxMap.lookup(ItinDef->getName());
if (!SCIdx && (*I)->isSubClassOf("Sched")) if (!SCIdx && !(*I)->isValueUnset("SchedRW"))
SCIdx = getSchedClassIdx((*I)->getValueAsListOfDefs("SchedRW")); SCIdx = getSchedClassIdx((*I)->getValueAsListOfDefs("SchedRW"));
} }
unsigned CIdx = 0, CEnd = ClassInstrs.size(); unsigned CIdx = 0, CEnd = ClassInstrs.size();