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ELF/AArch64: Fix R_AARCH64_LDST16_ABS_LO12_NC mask 

The relocation R_AARCH64_LDST16_ABS_LO12_NC should set a ld/st
immediate value to bits [11:1] not [11:2].  This patches fixes it
and adds a testcase for regression.

With this fix all the faulty tests on test-suite (clavm, lencod,
and trimaran) pass.

llvm-svn: 288670
This commit is contained in:
Adhemerval Zanella 2016-12-05 14:15:44 +00:00
parent df310646d8
commit a47ba192dc
2 changed files with 7 additions and 3 deletions
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2
lld/ELF/Target.cpp
View File

@ -1381,7 +1381,7 @@ void AArch64TargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
or32le(Loc, (Val & 0x0FF8) << 6);
break;
case R_AARCH64_LDST16_ABS_LO12_NC:
or32le(Loc, (Val & 0x0FFC) << 9);
or32le(Loc, (Val & 0x0FFE) << 9);
break;
case R_AARCH64_LDST8_ABS_LO12_NC:
or32le(Loc, (Val & 0xFFF) << 10);

8
lld/test/ELF/aarch64-relocs.s
View File

@ -141,16 +141,20 @@ foo128:
.section .R_AARCH64_LDST16_ABS_LO12_NC,"ax",@progbits
ldst16:
ldr h17, [x19, :lo12:foo16]
ldrh w1, [x19, :lo12:foo16]
ldrh w2, [x19, :lo12:foo16 + 2]
foo16:
.asciz "foo"
.size mystr, 3
.size mystr, 4
# S = 0x20054, A = 0x4
# R = ((S + A) & 0x0FFC) << 9 = 0xb000
# 0xb000 | 0x7d400271 = 0x7d40b271
# CHECK: Disassembly of section .R_AARCH64_LDST16_ABS_LO12_NC:
# CHECK-NEXT: ldst16:
# CHECK-NEXT: 20054: 71 b2 40 7d ldr h17, [x19, #88]
# CHECK-NEXT: 20054: 71 c2 40 7d ldr h17, [x19, #96]
# CHECK-NEXT: 20058: 61 c2 40 79 ldrh w1, [x19, #96]
# CHECK-NEXT: 2005c: 62 c6 40 79 ldrh w2, [x19, #98]
.section .R_AARCH64_MOVW_UABS,"ax",@progbits
movz1: