forked from OSchip/llvm-project
refactor operand printing to remove hte last of the "mem" modifier hack. The
only remaining modifier is "subreg". llvm-svn: 75516
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9d582d1782
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a479bf1afa
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@ -499,9 +499,7 @@ void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
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case MachineOperand::MO_ConstantPoolIndex:
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case MachineOperand::MO_ConstantPoolIndex:
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case MachineOperand::MO_GlobalAddress:
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case MachineOperand::MO_GlobalAddress:
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case MachineOperand::MO_ExternalSymbol: {
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case MachineOperand::MO_ExternalSymbol: {
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bool isMemOp = Modifier && !strcmp(Modifier, "mem");
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O << '$';
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if (!isMemOp) O << '$';
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printSymbolOperand(MO);
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printSymbolOperand(MO);
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break;
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break;
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}
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}
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@ -545,7 +543,7 @@ void X86ATTAsmPrinter::printLeaMemReference(const MachineInstr *MI, unsigned Op,
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} else {
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} else {
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assert(DispSpec.isGlobal() || DispSpec.isCPI() ||
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assert(DispSpec.isGlobal() || DispSpec.isCPI() ||
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DispSpec.isJTI() || DispSpec.isSymbol());
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DispSpec.isJTI() || DispSpec.isSymbol());
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printOperand(MI, Op+3, "mem");
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printSymbolOperand(MI->getOperand(Op+3));
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}
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}
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if (HasParenPart) {
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if (HasParenPart) {
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@ -661,17 +659,21 @@ bool X86ATTAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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if (ExtraCode && ExtraCode[0]) {
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if (ExtraCode && ExtraCode[0]) {
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if (ExtraCode[1] != 0) return true; // Unknown modifier.
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if (ExtraCode[1] != 0) return true; // Unknown modifier.
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const MachineOperand &MO = MI->getOperand(OpNo);
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switch (ExtraCode[0]) {
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switch (ExtraCode[0]) {
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default: return true; // Unknown modifier.
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default: return true; // Unknown modifier.
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case 'c': // Don't print "$" before a global var name or constant.
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case 'c': // Don't print "$" before a global var name or constant.
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if (MI->getOperand(OpNo).isImm())
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if (MO.isImm())
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O << MI->getOperand(OpNo).getImm();
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O << MO.getImm();
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else if (MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isSymbol())
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printSymbolOperand(MO);
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else
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else
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printOperand(MI, OpNo, "mem");
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printOperand(MI, OpNo);
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return false;
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return false;
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case 'A': // Print '*' before a register (it must be a register)
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case 'A': // Print '*' before a register (it must be a register)
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if (MI->getOperand(OpNo).isReg()) {
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if (MO.isReg()) {
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O << '*';
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O << '*';
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printOperand(MI, OpNo);
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printOperand(MI, OpNo);
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return false;
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return false;
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@ -683,8 +685,8 @@ bool X86ATTAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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case 'w': // Print HImode register
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case 'w': // Print HImode register
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case 'k': // Print SImode register
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case 'k': // Print SImode register
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case 'q': // Print DImode register
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case 'q': // Print DImode register
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if (MI->getOperand(OpNo).isReg())
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if (MO.isReg())
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return printAsmMRegister(MI->getOperand(OpNo), ExtraCode[0]);
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return printAsmMRegister(MO, ExtraCode[0]);
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printOperand(MI, OpNo);
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printOperand(MI, OpNo);
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return false;
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return false;
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@ -692,17 +694,15 @@ bool X86ATTAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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print_pcrel_imm(MI, OpNo);
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print_pcrel_imm(MI, OpNo);
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return false;
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return false;
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case 'n': { // Negate the immediate or print a '-' before the operand.
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case 'n': // Negate the immediate or print a '-' before the operand.
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// Note: this is a temporary solution. It should be handled target
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// Note: this is a temporary solution. It should be handled target
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// independently as part of the 'MC' work.
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// independently as part of the 'MC' work.
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const MachineOperand &MO = MI->getOperand(OpNo);
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if (MO.isImm()) {
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if (MO.isImm()) {
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O << -MO.getImm();
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O << -MO.getImm();
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return false;
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return false;
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}
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}
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O << '-';
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O << '-';
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}
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}
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}
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}
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}
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printOperand(MI, OpNo);
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printOperand(MI, OpNo);
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