refactor operand printing to remove hte last of the "mem" modifier hack. The

only remaining modifier is "subreg".

llvm-svn: 75516
This commit is contained in:
Chris Lattner 2009-07-13 21:48:33 +00:00
parent 9d582d1782
commit a479bf1afa
1 changed files with 13 additions and 13 deletions

View File

@ -499,9 +499,7 @@ void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
case MachineOperand::MO_ConstantPoolIndex: case MachineOperand::MO_ConstantPoolIndex:
case MachineOperand::MO_GlobalAddress: case MachineOperand::MO_GlobalAddress:
case MachineOperand::MO_ExternalSymbol: { case MachineOperand::MO_ExternalSymbol: {
bool isMemOp = Modifier && !strcmp(Modifier, "mem"); O << '$';
if (!isMemOp) O << '$';
printSymbolOperand(MO); printSymbolOperand(MO);
break; break;
} }
@ -545,7 +543,7 @@ void X86ATTAsmPrinter::printLeaMemReference(const MachineInstr *MI, unsigned Op,
} else { } else {
assert(DispSpec.isGlobal() || DispSpec.isCPI() || assert(DispSpec.isGlobal() || DispSpec.isCPI() ||
DispSpec.isJTI() || DispSpec.isSymbol()); DispSpec.isJTI() || DispSpec.isSymbol());
printOperand(MI, Op+3, "mem"); printSymbolOperand(MI->getOperand(Op+3));
} }
if (HasParenPart) { if (HasParenPart) {
@ -661,17 +659,21 @@ bool X86ATTAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
if (ExtraCode && ExtraCode[0]) { if (ExtraCode && ExtraCode[0]) {
if (ExtraCode[1] != 0) return true; // Unknown modifier. if (ExtraCode[1] != 0) return true; // Unknown modifier.
const MachineOperand &MO = MI->getOperand(OpNo);
switch (ExtraCode[0]) { switch (ExtraCode[0]) {
default: return true; // Unknown modifier. default: return true; // Unknown modifier.
case 'c': // Don't print "$" before a global var name or constant. case 'c': // Don't print "$" before a global var name or constant.
if (MI->getOperand(OpNo).isImm()) if (MO.isImm())
O << MI->getOperand(OpNo).getImm(); O << MO.getImm();
else if (MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isSymbol())
printSymbolOperand(MO);
else else
printOperand(MI, OpNo, "mem"); printOperand(MI, OpNo);
return false; return false;
case 'A': // Print '*' before a register (it must be a register) case 'A': // Print '*' before a register (it must be a register)
if (MI->getOperand(OpNo).isReg()) { if (MO.isReg()) {
O << '*'; O << '*';
printOperand(MI, OpNo); printOperand(MI, OpNo);
return false; return false;
@ -683,8 +685,8 @@ bool X86ATTAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
case 'w': // Print HImode register case 'w': // Print HImode register
case 'k': // Print SImode register case 'k': // Print SImode register
case 'q': // Print DImode register case 'q': // Print DImode register
if (MI->getOperand(OpNo).isReg()) if (MO.isReg())
return printAsmMRegister(MI->getOperand(OpNo), ExtraCode[0]); return printAsmMRegister(MO, ExtraCode[0]);
printOperand(MI, OpNo); printOperand(MI, OpNo);
return false; return false;
@ -692,17 +694,15 @@ bool X86ATTAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
print_pcrel_imm(MI, OpNo); print_pcrel_imm(MI, OpNo);
return false; return false;
case 'n': { // Negate the immediate or print a '-' before the operand. case 'n': // Negate the immediate or print a '-' before the operand.
// Note: this is a temporary solution. It should be handled target // Note: this is a temporary solution. It should be handled target
// independently as part of the 'MC' work. // independently as part of the 'MC' work.
const MachineOperand &MO = MI->getOperand(OpNo);
if (MO.isImm()) { if (MO.isImm()) {
O << -MO.getImm(); O << -MO.getImm();
return false; return false;
} }
O << '-'; O << '-';
} }
}
} }
printOperand(MI, OpNo); printOperand(MI, OpNo);