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[MachineScheduler] Inform pass infra of post-ra scheduler's dependencies 

Differential Revision: https://reviews.llvm.org/D91561
This commit is contained in:
Jon Roelofs 2020-11-17 10:54:41 -08:00
parent a200d6cdf0
commit a461e76b6f
1 changed files with 7 additions and 2 deletions
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9
llvm/lib/CodeGen/MachineScheduler.cpp
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@ -240,8 +240,13 @@ char PostMachineScheduler::ID = 0;
char &llvm::PostMachineSchedulerID = PostMachineScheduler::ID;
INITIALIZE_PASS(PostMachineScheduler, "postmisched",
"PostRA Machine Instruction Scheduler", false, false)
INITIALIZE_PASS_BEGIN(PostMachineScheduler, "postmisched",
"PostRA Machine Instruction Scheduler", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
INITIALIZE_PASS_END(PostMachineScheduler, "postmisched",
"PostRA Machine Instruction Scheduler", false, false)
PostMachineScheduler::PostMachineScheduler() : MachineSchedulerBase(ID) {
initializePostMachineSchedulerPass(*PassRegistry::getPassRegistry());