[RISCV] Add MIR tests exposing missed InstAliases

The InstAlias framework cannot match registers against zero_reg, which
RVV uses to encode unmasked operations.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D92228
This commit is contained in:
Fraser Cormack 2020-11-27 14:29:58 +00:00
parent 849e749d7f
commit a44aeab526
1 changed files with 62 additions and 0 deletions

View File

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# RUN: llc -mtriple riscv32 -mattr=+v -start-after riscv-expand-pseudo -o - %s | FileCheck %s
# RUN: llc -mtriple riscv64 -mattr=+v -start-after riscv-expand-pseudo -o - %s | FileCheck %s
# FIXME: These should all use the 'vnot' alias despite some not having mask operands
--- |
define void @vnot_mask_1() {
ret void
}
define void @vnot_mask_2() {
ret void
}
define void @vnot_no_mask_1() {
ret void
}
define void @vnot_no_mask_2() {
ret void
}
...
---
name: vnot_mask_1
body: |
bb.0:
liveins: $v0, $v25
; CHECK-LABEL: vnot_mask_1:
; CHECK: vnot.v v25, v25, v0.t
$v25 = VXOR_VI killed $v25, -1, $v0, implicit $vtype, implicit $vl
...
---
name: vnot_mask_2
body: |
bb.0:
liveins: $v0, $v25
; CHECK-LABEL: vnot_mask_2:
; CHECK: vnot.v v1, v25, v0.t
$v1 = VXOR_VI killed $v25, -1, $v0, implicit $vtype, implicit $vl
...
---
name: vnot_no_mask_1
body: |
bb.0:
liveins: $v25
; CHECK-LABEL: vnot_no_mask_1:
; CHECK: vxor.vi v25, v25, -1
$v25 = VXOR_VI killed $v25, -1, $noreg, implicit $vtype, implicit $vl
...
---
name: vnot_no_mask_2
body: |
bb.0:
liveins: $v25
; CHECK-LABEL: vnot_no_mask_2:
; CHECK: vxor.vi v1, v25, -1
$v1 = VXOR_VI killed $v25, -1, $noreg, implicit $vtype, implicit $vl
...