maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Revert "[NFC] Remove 'br i1 undef' from SROA tests" 

Transforms/SROA/vector-promotion-different-size.ll causes errors.

This reverts commit c1b610307d.
This commit is contained in:
Kazushi (Jam) Marukawa 2022-06-13 12:32:25 +09:00
parent 1ad01f4f7c
commit a43c55dcd7
17 changed files with 256 additions and 271 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
llvm/test/Transforms/SROA/address-spaces.ll
View File

@ -52,7 +52,8 @@ define void @test_address_space_0_1(<2 x i64>* %a, i16 addrspace(1)* %b) {
%struct.struct_test_27.0.13 = type { i32, float, i64, i8, [4 x i32] } %struct.struct_test_27.0.13 = type { i32, float, i64, i8, [4 x i32] }
define void @copy_struct([5 x i64] %in.coerce, i8 addrspace(1)* align 4 %ptr) { ; Function Attrs: nounwind
define void @copy_struct([5 x i64] %in.coerce) {
; CHECK-LABEL: @copy_struct( ; CHECK-LABEL: @copy_struct(
; CHECK-NOT: memcpy ; CHECK-NOT: memcpy
for.end: for.end:
@ -61,7 +62,7 @@ for.end:
store [5 x i64] %in.coerce, [5 x i64]* %0, align 8 store [5 x i64] %in.coerce, [5 x i64]* %0, align 8
%scevgep9 = getelementptr %struct.struct_test_27.0.13, %struct.struct_test_27.0.13* %in, i32 0, i32 4, i32 0 %scevgep9 = getelementptr %struct.struct_test_27.0.13, %struct.struct_test_27.0.13* %in, i32 0, i32 4, i32 0
%scevgep910 = bitcast i32* %scevgep9 to i8* %scevgep910 = bitcast i32* %scevgep9 to i8*
call void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)* align 4 %ptr, i8* align 4 %scevgep910, i32 16, i1 false) call void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)* align 4 undef, i8* align 4 %scevgep910, i32 16, i1 false)
ret void ret void
} }

28
llvm/test/Transforms/SROA/addrspacecast.ll
View File

@ -256,10 +256,10 @@ define void @select_addrspacecast(i1 %a, i1 %b) {
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%c = alloca i64, align 8 %c = alloca i64, align 8
%p.0.c = select i1 %a, i64* %c, i64* %c %p.0.c = select i1 undef, i64* %c, i64* %c
%asc = addrspacecast i64* %p.0.c to i64 addrspace(1)* %asc = addrspacecast i64* %p.0.c to i64 addrspace(1)*
%cond.in = select i1 %b, i64 addrspace(1)* %asc, i64 addrspace(1)* %asc %cond.in = select i1 undef, i64 addrspace(1)* %asc, i64 addrspace(1)* %asc
%cond = load i64, i64 addrspace(1)* %cond.in, align 8 %cond = load i64, i64 addrspace(1)* %cond.in, align 8
ret void ret void
} }
@ -268,15 +268,15 @@ define void @select_addrspacecast_const_op(i1 %a, i1 %b) {
; CHECK-LABEL: @select_addrspacecast_const_op( ; CHECK-LABEL: @select_addrspacecast_const_op(
; CHECK-NEXT: [[C:%.*]] = alloca i64, align 8 ; CHECK-NEXT: [[C:%.*]] = alloca i64, align 8
; CHECK-NEXT: [[C_0_ASC_SROA_CAST:%.*]] = addrspacecast i64* [[C]] to i64 addrspace(1)* ; CHECK-NEXT: [[C_0_ASC_SROA_CAST:%.*]] = addrspacecast i64* [[C]] to i64 addrspace(1)*
; CHECK-NEXT: [[COND_IN:%.*]] = select i1 [[B:%.*]], i64 addrspace(1)* [[C_0_ASC_SROA_CAST]], i64 addrspace(1)* null ; CHECK-NEXT: [[COND_IN:%.*]] = select i1 undef, i64 addrspace(1)* [[C_0_ASC_SROA_CAST]], i64 addrspace(1)* null
; CHECK-NEXT: [[COND:%.*]] = load i64, i64 addrspace(1)* [[COND_IN]], align 8 ; CHECK-NEXT: [[COND:%.*]] = load i64, i64 addrspace(1)* [[COND_IN]], align 8
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%c = alloca i64, align 8 %c = alloca i64, align 8
%p.0.c = select i1 %a, i64* %c, i64* %c %p.0.c = select i1 undef, i64* %c, i64* %c
%asc = addrspacecast i64* %p.0.c to i64 addrspace(1)* %asc = addrspacecast i64* %p.0.c to i64 addrspace(1)*
%cond.in = select i1 %b, i64 addrspace(1)* %asc, i64 addrspace(1)* null %cond.in = select i1 undef, i64 addrspace(1)* %asc, i64 addrspace(1)* null
%cond = load i64, i64 addrspace(1)* %cond.in, align 8 %cond = load i64, i64 addrspace(1)* %cond.in, align 8
ret void ret void
} }
@ -288,14 +288,14 @@ define void @select_addrspacecast_const_op(i1 %a, i1 %b) {
define void @select_addrspacecast_gv(i1 %a, i1 %b) { define void @select_addrspacecast_gv(i1 %a, i1 %b) {
; CHECK-LABEL: @select_addrspacecast_gv( ; CHECK-LABEL: @select_addrspacecast_gv(
; CHECK-NEXT: [[COND_SROA_SPECULATE_LOAD_FALSE:%.*]] = load i64, i64 addrspace(1)* @gv, align 8 ; CHECK-NEXT: [[COND_SROA_SPECULATE_LOAD_FALSE:%.*]] = load i64, i64 addrspace(1)* @gv, align 8
; CHECK-NEXT: [[COND_SROA_SPECULATED:%.*]] = select i1 [[B:%.*]], i64 undef, i64 [[COND_SROA_SPECULATE_LOAD_FALSE]] ; CHECK-NEXT: [[COND_SROA_SPECULATED:%.*]] = select i1 undef, i64 undef, i64 [[COND_SROA_SPECULATE_LOAD_FALSE]]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%c = alloca i64, align 8 %c = alloca i64, align 8
%p.0.c = select i1 %a, i64* %c, i64* %c %p.0.c = select i1 undef, i64* %c, i64* %c
%asc = addrspacecast i64* %p.0.c to i64 addrspace(1)* %asc = addrspacecast i64* %p.0.c to i64 addrspace(1)*
%cond.in = select i1 %b, i64 addrspace(1)* %asc, i64 addrspace(1)* @gv %cond.in = select i1 undef, i64 addrspace(1)* %asc, i64 addrspace(1)* @gv
%cond = load i64, i64 addrspace(1)* %cond.in, align 8 %cond = load i64, i64 addrspace(1)* %cond.in, align 8
ret void ret void
} }
@ -303,21 +303,21 @@ define void @select_addrspacecast_gv(i1 %a, i1 %b) {
define void @select_addrspacecast_gv_constexpr(i1 %a, i1 %b) { define void @select_addrspacecast_gv_constexpr(i1 %a, i1 %b) {
; CHECK-LABEL: @select_addrspacecast_gv_constexpr( ; CHECK-LABEL: @select_addrspacecast_gv_constexpr(
; CHECK-NEXT: [[COND_SROA_SPECULATE_LOAD_FALSE:%.*]] = load i64, i64 addrspace(2)* addrspacecast (i64 addrspace(1)* @gv to i64 addrspace(2)*), align 8 ; CHECK-NEXT: [[COND_SROA_SPECULATE_LOAD_FALSE:%.*]] = load i64, i64 addrspace(2)* addrspacecast (i64 addrspace(1)* @gv to i64 addrspace(2)*), align 8
; CHECK-NEXT: [[COND_SROA_SPECULATED:%.*]] = select i1 [[B:%.*]], i64 undef, i64 [[COND_SROA_SPECULATE_LOAD_FALSE]] ; CHECK-NEXT: [[COND_SROA_SPECULATED:%.*]] = select i1 undef, i64 undef, i64 [[COND_SROA_SPECULATE_LOAD_FALSE]]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%c = alloca i64, align 8 %c = alloca i64, align 8
%p.0.c = select i1 %a, i64* %c, i64* %c %p.0.c = select i1 undef, i64* %c, i64* %c
%asc = addrspacecast i64* %p.0.c to i64 addrspace(2)* %asc = addrspacecast i64* %p.0.c to i64 addrspace(2)*
%cond.in = select i1 %b, i64 addrspace(2)* %asc, i64 addrspace(2)* addrspacecast (i64 addrspace(1)* @gv to i64 addrspace(2)*) %cond.in = select i1 undef, i64 addrspace(2)* %asc, i64 addrspace(2)* addrspacecast (i64 addrspace(1)* @gv to i64 addrspace(2)*)
%cond = load i64, i64 addrspace(2)* %cond.in, align 8 %cond = load i64, i64 addrspace(2)* %cond.in, align 8
ret void ret void
} }
define i8 @select_addrspacecast_i8(i1 %c) { define i8 @select_addrspacecast_i8() {
; CHECK-LABEL: @select_addrspacecast_i8( ; CHECK-LABEL: @select_addrspacecast_i8(
; CHECK-NEXT: [[RET_SROA_SPECULATED:%.*]] = select i1 [[C:%.*]], i8 undef, i8 undef ; CHECK-NEXT: [[RET_SROA_SPECULATED:%.*]] = select i1 undef, i8 undef, i8 undef
; CHECK-NEXT: ret i8 [[RET_SROA_SPECULATED]] ; CHECK-NEXT: ret i8 [[RET_SROA_SPECULATED]]
; ;
%a = alloca i8 %a = alloca i8
@ -326,7 +326,7 @@ define i8 @select_addrspacecast_i8(i1 %c) {
%a.ptr = addrspacecast i8* %a to i8 addrspace(1)* %a.ptr = addrspacecast i8* %a to i8 addrspace(1)*
%b.ptr = addrspacecast i8* %b to i8 addrspace(1)* %b.ptr = addrspacecast i8* %b to i8 addrspace(1)*
%ptr = select i1 %c, i8 addrspace(1)* %a.ptr, i8 addrspace(1)* %b.ptr %ptr = select i1 undef, i8 addrspace(1)* %a.ptr, i8 addrspace(1)* %b.ptr
%ret = load i8, i8 addrspace(1)* %ptr %ret = load i8, i8 addrspace(1)* %ptr
ret i8 %ret ret i8 %ret
} }

4
llvm/test/Transforms/SROA/alloca-address-space.ll
View File

@ -54,14 +54,14 @@ define void @test_address_space_0_1(<2 x i64> addrspace(2)* %a, i16 addrspace(1)
; CHECK-LABEL: @copy_struct( ; CHECK-LABEL: @copy_struct(
; CHECK-NOT: memcpy ; CHECK-NOT: memcpy
define void @copy_struct([5 x i64] %in.coerce, i8 addrspace(1)* align 4 %ptr) { define void @copy_struct([5 x i64] %in.coerce) {
for.end: for.end:
%in = alloca %struct.struct_test_27.0.13, align 8, addrspace(2) %in = alloca %struct.struct_test_27.0.13, align 8, addrspace(2)
%0 = bitcast %struct.struct_test_27.0.13 addrspace(2)* %in to [5 x i64] addrspace(2)* %0 = bitcast %struct.struct_test_27.0.13 addrspace(2)* %in to [5 x i64] addrspace(2)*
store [5 x i64] %in.coerce, [5 x i64] addrspace(2)* %0, align 8 store [5 x i64] %in.coerce, [5 x i64] addrspace(2)* %0, align 8
%scevgep9 = getelementptr %struct.struct_test_27.0.13, %struct.struct_test_27.0.13 addrspace(2)* %in, i32 0, i32 4, i32 0 %scevgep9 = getelementptr %struct.struct_test_27.0.13, %struct.struct_test_27.0.13 addrspace(2)* %in, i32 0, i32 4, i32 0
%scevgep910 = bitcast i32 addrspace(2)* %scevgep9 to i8 addrspace(2)* %scevgep910 = bitcast i32 addrspace(2)* %scevgep9 to i8 addrspace(2)*
call void @llvm.memcpy.p1i8.p2i8.i32(i8 addrspace(1)* align 4 %ptr, i8 addrspace(2)* align 4 %scevgep910, i32 16, i1 false) call void @llvm.memcpy.p1i8.p2i8.i32(i8 addrspace(1)* align 4 undef, i8 addrspace(2)* align 4 %scevgep910, i32 16, i1 false)
ret void ret void
} }

5
llvm/test/Transforms/SROA/assume.ll
View File

@ -1,6 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=sroa -S | FileCheck %s ; RUN: opt < %s -passes=sroa -S | FileCheck %s
source_filename = "tmp.cpp"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu" target triple = "x86_64-unknown-linux-gnu"
@ -10,7 +11,7 @@ target triple = "x86_64-unknown-linux-gnu"
%class.ao = type { %class.ai } %class.ao = type { %class.ai }
%class.ai = type { i32, i32 } %class.ai = type { i32, i32 }
define void @_ZN2bg2baIiEC2ES_(i64 %v) { define linkonce_odr dso_local void @_ZN2bg2baIiEC2ES_() unnamed_addr align 2 {
; CHECK-LABEL: @_ZN2bg2baIiEC2ES_( ; CHECK-LABEL: @_ZN2bg2baIiEC2ES_(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: call void @llvm.assume(i1 true) [ "ignore"(%struct.bi* undef) ] ; CHECK-NEXT: call void @llvm.assume(i1 true) [ "ignore"(%struct.bi* undef) ]
@ -18,7 +19,7 @@ define void @_ZN2bg2baIiEC2ES_(i64 %v) {
; ;
entry: entry:
%y = alloca i64, align 8 %y = alloca i64, align 8
store i64 %v, i64* %y, align 8 store i64 undef, i64* %y, align 8
%0 = bitcast i64* %y to %struct.n.2* %0 = bitcast i64* %y to %struct.n.2*
%1 = bitcast %struct.n.2* %0 to %struct.bi* %1 = bitcast %struct.n.2* %0 to %struct.bi*
call void @llvm.assume(i1 true) [ "nonnull"(%struct.bi* %1) ] call void @llvm.assume(i1 true) [ "nonnull"(%struct.bi* %1) ]

132
llvm/test/Transforms/SROA/basictest-opaque-ptrs.ll
View File

@ -515,7 +515,7 @@ define %S2 @test8(%S2* %arg) {
; CHECK-NEXT: [[S2_NEXT_S1:%.*]] = load ptr, ptr [[S2_NEXT_S1_PTR]], align 8, !tbaa [[TBAA3]] ; CHECK-NEXT: [[S2_NEXT_S1:%.*]] = load ptr, ptr [[S2_NEXT_S1_PTR]], align 8, !tbaa [[TBAA3]]
; CHECK-NEXT: [[S2_NEXT_NEXT_PTR:%.*]] = getelementptr [[S2]], ptr [[S2_NEXT]], i64 0, i32 1 ; CHECK-NEXT: [[S2_NEXT_NEXT_PTR:%.*]] = getelementptr [[S2]], ptr [[S2_NEXT]], i64 0, i32 1
; CHECK-NEXT: [[S2_NEXT_NEXT:%.*]] = load ptr, ptr [[S2_NEXT_NEXT_PTR]], align 8, !tbaa [[TBAA7]] ; CHECK-NEXT: [[S2_NEXT_NEXT:%.*]] = load ptr, ptr [[S2_NEXT_NEXT_PTR]], align 8, !tbaa [[TBAA7]]
; CHECK-NEXT: [[RESULT1:%.*]] = insertvalue [[S2]] poison, ptr [[S2_NEXT_S1]], 0 ; CHECK-NEXT: [[RESULT1:%.*]] = insertvalue [[S2]] undef, ptr [[S2_NEXT_S1]], 0
; CHECK-NEXT: [[RESULT2:%.*]] = insertvalue [[S2]] [[RESULT1]], ptr [[S2_NEXT_NEXT]], 1 ; CHECK-NEXT: [[RESULT2:%.*]] = insertvalue [[S2]] [[RESULT1]], ptr [[S2_NEXT_NEXT]], 1
; CHECK-NEXT: ret [[S2]] [[RESULT2]] ; CHECK-NEXT: ret [[S2]] [[RESULT2]]
; ;
@ -535,7 +535,7 @@ entry:
store %S2* %s2.next.next, %S2** %new.next.ptr, !tbaa !9 store %S2* %s2.next.next, %S2** %new.next.ptr, !tbaa !9
%new.s1 = load %S1*, %S1** %new.s1.ptr %new.s1 = load %S1*, %S1** %new.s1.ptr
%result1 = insertvalue %S2 poison, %S1* %new.s1, 0 %result1 = insertvalue %S2 undef, %S1* %new.s1, 0
%new.next = load %S2*, %S2** %new.next.ptr %new.next = load %S2*, %S2** %new.next.ptr
%result2 = insertvalue %S2 %result1, %S2* %new.next, 1 %result2 = insertvalue %S2 %result1, %S2* %new.next, 1
ret %S2 %result2 ret %S2 %result2
@ -594,10 +594,10 @@ entry:
ret %S2* %s2ptr ret %S2* %s2ptr
} }
define i32 @test11(i1 %c) { define i32 @test11() {
; CHECK-LABEL: @test11( ; CHECK-LABEL: @test11(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[C:%.*]], label [[GOOD:%.*]], label [[BAD:%.*]] ; CHECK-NEXT: br i1 undef, label [[GOOD:%.*]], label [[BAD:%.*]]
; CHECK: good: ; CHECK: good:
; CHECK-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
; CHECK: bad: ; CHECK: bad:
@ -606,7 +606,7 @@ define i32 @test11(i1 %c) {
entry: entry:
%X = alloca i32 %X = alloca i32
br i1 %c, label %good, label %bad br i1 undef, label %good, label %bad
good: good:
%Y = getelementptr i32, i32* %X, i64 0 %Y = getelementptr i32, i32* %X, i64 0
@ -855,7 +855,7 @@ entry:
%opaque = type opaque %opaque = type opaque
define i64 @test19(%opaque* %x) { define i32 @test19(%opaque* %x) {
; This input will cause us to try to compute a natural GEP when rewriting ; This input will cause us to try to compute a natural GEP when rewriting
; pointers in such a way that we try to GEP through the opaque type. Previously, ; pointers in such a way that we try to GEP through the opaque type. Previously,
; a check for an unsized type was missing and this crashed. Ensure it behaves ; a check for an unsized type was missing and this crashed. Ensure it behaves
@ -866,7 +866,7 @@ define i64 @test19(%opaque* %x) {
; CHECK-NEXT: [[A_SROA_0_0_COPYLOAD:%.*]] = load i64, ptr [[CAST1]], align 1 ; CHECK-NEXT: [[A_SROA_0_0_COPYLOAD:%.*]] = load i64, ptr [[CAST1]], align 1
; CHECK-NEXT: [[A_SROA_2_0_CAST1_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr [[CAST1]], i64 8 ; CHECK-NEXT: [[A_SROA_2_0_CAST1_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr [[CAST1]], i64 8
; CHECK-NEXT: [[A_SROA_2_0_COPYLOAD:%.*]] = load ptr, ptr [[A_SROA_2_0_CAST1_SROA_IDX]], align 1 ; CHECK-NEXT: [[A_SROA_2_0_COPYLOAD:%.*]] = load ptr, ptr [[A_SROA_2_0_CAST1_SROA_IDX]], align 1
; CHECK-NEXT: ret i64 [[A_SROA_0_0_COPYLOAD]] ; CHECK-NEXT: ret i32 undef
; ;
entry: entry:
@ -876,12 +876,12 @@ entry:
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %cast2, i8* %cast1, i32 16, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %cast2, i8* %cast1, i32 16, i1 false)
%gep = getelementptr inbounds { i64, i8* }, { i64, i8* }* %a, i32 0, i32 0 %gep = getelementptr inbounds { i64, i8* }, { i64, i8* }* %a, i32 0, i32 0
%val = load i64, i64* %gep %val = load i64, i64* %gep
ret i64 %val ret i32 undef
} }
declare void @llvm.memcpy.p0i8.p1i8.i32(i8* nocapture, i8 addrspace(1)* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p1i8.i32(i8* nocapture, i8 addrspace(1)* nocapture, i32, i32, i1) nounwind
define i64 @test19_addrspacecast(%opaque* %x) { define i32 @test19_addrspacecast(%opaque* %x) {
; This input will cause us to try to compute a natural GEP when rewriting ; This input will cause us to try to compute a natural GEP when rewriting
; pointers in such a way that we try to GEP through the opaque type. Previously, ; pointers in such a way that we try to GEP through the opaque type. Previously,
; a check for an unsized type was missing and this crashed. Ensure it behaves ; a check for an unsized type was missing and this crashed. Ensure it behaves
@ -892,7 +892,7 @@ define i64 @test19_addrspacecast(%opaque* %x) {
; CHECK-NEXT: [[A_SROA_0_0_COPYLOAD:%.*]] = load i64, ptr addrspace(1) [[CAST1]], align 1 ; CHECK-NEXT: [[A_SROA_0_0_COPYLOAD:%.*]] = load i64, ptr addrspace(1) [[CAST1]], align 1
; CHECK-NEXT: [[A_SROA_2_0_CAST1_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[CAST1]], i16 8 ; CHECK-NEXT: [[A_SROA_2_0_CAST1_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[CAST1]], i16 8
; CHECK-NEXT: [[A_SROA_2_0_COPYLOAD:%.*]] = load ptr, ptr addrspace(1) [[A_SROA_2_0_CAST1_SROA_IDX]], align 1 ; CHECK-NEXT: [[A_SROA_2_0_COPYLOAD:%.*]] = load ptr, ptr addrspace(1) [[A_SROA_2_0_CAST1_SROA_IDX]], align 1
; CHECK-NEXT: ret i64 [[A_SROA_0_0_COPYLOAD]] ; CHECK-NEXT: ret i32 undef
; ;
entry: entry:
@ -902,7 +902,7 @@ entry:
call void @llvm.memcpy.p0i8.p1i8.i32(i8* %cast2, i8 addrspace(1)* %cast1, i32 16, i32 1, i1 false) call void @llvm.memcpy.p0i8.p1i8.i32(i8* %cast2, i8 addrspace(1)* %cast1, i32 16, i32 1, i1 false)
%gep = getelementptr inbounds { i64, i8* }, { i64, i8* }* %a, i32 0, i32 0 %gep = getelementptr inbounds { i64, i8* }, { i64, i8* }* %a, i32 0, i32 0
%val = load i64, i64* %gep %val = load i64, i64* %gep
ret i64 %val ret i32 undef
} }
define i32 @test20() { define i32 @test20() {
@ -983,13 +983,13 @@ entry:
ret void ret void
} }
define void @PR13916.2(i1 %c) { define void @PR13916.2() {
; Check whether we continue to handle them correctly when they start off with ; Check whether we continue to handle them correctly when they start off with
; different pointer value chains, but during rewriting we coalesce them into the ; different pointer value chains, but during rewriting we coalesce them into the
; same value. ; same value.
; CHECK-LABEL: @PR13916.2( ; CHECK-LABEL: @PR13916.2(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; CHECK: if.then: ; CHECK: if.then:
; CHECK-NEXT: br label [[IF_END]] ; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end: ; CHECK: if.end:
@ -998,7 +998,7 @@ define void @PR13916.2(i1 %c) {
entry: entry:
%a = alloca %PR13916.struct, align 1 %a = alloca %PR13916.struct, align 1
br i1 %c, label %if.then, label %if.end br i1 undef, label %if.then, label %if.end
if.then: if.then:
%tmp0 = bitcast %PR13916.struct* %a to i8* %tmp0 = bitcast %PR13916.struct* %a to i8*
@ -1012,41 +1012,41 @@ if.end:
ret void ret void
} }
define void @PR13990(i1 %c1, i1 %c2, i1 %c3, i1 %c4, i8* %ptr) { define void @PR13990() {
; Ensure we can handle cases where processing one alloca causes the other ; Ensure we can handle cases where processing one alloca causes the other
; alloca to become dead and get deleted. This might crash or fail under ; alloca to become dead and get deleted. This might crash or fail under
; Valgrind if we regress. ; Valgrind if we regress.
; CHECK-LABEL: @PR13990( ; CHECK-LABEL: @PR13990(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[C1:%.*]], label [[BB1:%.*]], label [[BB2:%.*]] ; CHECK-NEXT: br i1 undef, label [[BB1:%.*]], label [[BB2:%.*]]
; CHECK: bb1: ; CHECK: bb1:
; CHECK-NEXT: br i1 [[C2:%.*]], label [[BB2]], label [[BB3:%.*]] ; CHECK-NEXT: br i1 undef, label [[BB2]], label [[BB3:%.*]]
; CHECK: bb2: ; CHECK: bb2:
; CHECK-NEXT: br i1 [[C4:%.*]], label [[BB3]], label [[BB4:%.*]] ; CHECK-NEXT: br i1 undef, label [[BB3]], label [[BB4:%.*]]
; CHECK: bb3: ; CHECK: bb3:
; CHECK-NEXT: ret void ; CHECK-NEXT: unreachable
; CHECK: bb4: ; CHECK: bb4:
; CHECK-NEXT: ret void ; CHECK-NEXT: unreachable
; ;
entry: entry:
%tmp1 = alloca i8* %tmp1 = alloca i8*
%tmp2 = alloca i8* %tmp2 = alloca i8*
br i1 %c1, label %bb1, label %bb2 br i1 undef, label %bb1, label %bb2
bb1: bb1:
store i8* %ptr, i8** %tmp2 store i8* undef, i8** %tmp2
br i1 %c2, label %bb2, label %bb3 br i1 undef, label %bb2, label %bb3
bb2: bb2:
%tmp50 = select i1 %c3, i8** %tmp2, i8** %tmp1 %tmp50 = select i1 undef, i8** %tmp2, i8** %tmp1
br i1 %c4, label %bb3, label %bb4 br i1 undef, label %bb3, label %bb4
bb3: bb3:
ret void unreachable
bb4: bb4:
ret void unreachable
} }
define double @PR13969(double %x) { define double @PR13969(double %x) {
@ -1075,14 +1075,14 @@ entry:
%PR14034.struct = type { { {} }, i32, %PR14034.list } %PR14034.struct = type { { {} }, i32, %PR14034.list }
%PR14034.list = type { %PR14034.list*, %PR14034.list* } %PR14034.list = type { %PR14034.list*, %PR14034.list* }
define void @PR14034(%PR14034.list* %ptr, %PR14034.struct* %ptr2) { define void @PR14034() {
; This test case tries to form GEPs into the empty leading struct members, and ; This test case tries to form GEPs into the empty leading struct members, and
; subsequently crashed (under valgrind) before we fixed the PR. The important ; subsequently crashed (under valgrind) before we fixed the PR. The important
; thing is to handle empty structs gracefully. ; thing is to handle empty structs gracefully.
; CHECK-LABEL: @PR14034( ; CHECK-LABEL: @PR14034(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[A_SROA_0:%.*]] = alloca [12 x i8], align 8 ; CHECK-NEXT: [[A_SROA_0:%.*]] = alloca [12 x i8], align 8
; CHECK-NEXT: [[CAST0:%.*]] = bitcast ptr [[PTR2:%.*]] to ptr ; CHECK-NEXT: [[CAST0:%.*]] = bitcast ptr undef to ptr
; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 1 [[CAST0]], ptr align 8 [[A_SROA_0]], i32 12, i1 false) ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 1 [[CAST0]], ptr align 8 [[A_SROA_0]], i32 12, i1 false)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
@ -1091,8 +1091,8 @@ entry:
%a = alloca %PR14034.struct %a = alloca %PR14034.struct
%list = getelementptr %PR14034.struct, %PR14034.struct* %a, i32 0, i32 2 %list = getelementptr %PR14034.struct, %PR14034.struct* %a, i32 0, i32 2
%prev = getelementptr %PR14034.list, %PR14034.list* %list, i32 0, i32 1 %prev = getelementptr %PR14034.list, %PR14034.list* %list, i32 0, i32 1
store %PR14034.list* %ptr, %PR14034.list** %prev store %PR14034.list* undef, %PR14034.list** %prev
%cast0 = bitcast %PR14034.struct* %ptr2 to i8* %cast0 = bitcast %PR14034.struct* undef to i8*
%cast1 = bitcast %PR14034.struct* %a to i8* %cast1 = bitcast %PR14034.struct* %a to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %cast0, i8* %cast1, i32 12, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %cast0, i8* %cast1, i32 12, i1 false)
ret void ret void
@ -1103,17 +1103,17 @@ define i32 @test22(i32 %x) {
; types involving wrapper aggregates and zero-length aggregate members. ; types involving wrapper aggregates and zero-length aggregate members.
; CHECK-LABEL: @test22( ; CHECK-LABEL: @test22(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[WRAP1:%.*]] = insertvalue [1 x { i32 }] poison, i32 [[X:%.*]], 0, 0 ; CHECK-NEXT: [[WRAP1:%.*]] = insertvalue [1 x { i32 }] undef, i32 [[X:%.*]], 0, 0
; CHECK-NEXT: [[WRAP1_FCA_0_0_EXTRACT:%.*]] = extractvalue [1 x { i32 }] [[WRAP1]], 0, 0 ; CHECK-NEXT: [[WRAP1_FCA_0_0_EXTRACT:%.*]] = extractvalue [1 x { i32 }] [[WRAP1]], 0, 0
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32 [[WRAP1_FCA_0_0_EXTRACT]] to float ; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32 [[WRAP1_FCA_0_0_EXTRACT]] to float
; CHECK-NEXT: [[LOAD1_FCA_0_0_0_INSERT:%.*]] = insertvalue { [1 x { float }] } poison, float [[TMP0]], 0, 0, 0 ; CHECK-NEXT: [[LOAD1_FCA_0_0_0_INSERT:%.*]] = insertvalue { [1 x { float }] } poison, float [[TMP0]], 0, 0, 0
; CHECK-NEXT: [[UNWRAP1:%.*]] = extractvalue { [1 x { float }] } [[LOAD1_FCA_0_0_0_INSERT]], 0, 0 ; CHECK-NEXT: [[UNWRAP1:%.*]] = extractvalue { [1 x { float }] } [[LOAD1_FCA_0_0_0_INSERT]], 0, 0
; CHECK-NEXT: [[WRAP2:%.*]] = insertvalue { {}, { float }, [0 x i8] } poison, { float } [[UNWRAP1]], 1 ; CHECK-NEXT: [[WRAP2:%.*]] = insertvalue { {}, { float }, [0 x i8] } undef, { float } [[UNWRAP1]], 1
; CHECK-NEXT: [[WRAP2_FCA_1_0_EXTRACT:%.*]] = extractvalue { {}, { float }, [0 x i8] } [[WRAP2]], 1, 0 ; CHECK-NEXT: [[WRAP2_FCA_1_0_EXTRACT:%.*]] = extractvalue { {}, { float }, [0 x i8] } [[WRAP2]], 1, 0
; CHECK-NEXT: [[TMP1:%.*]] = bitcast float [[WRAP2_FCA_1_0_EXTRACT]] to <4 x i8> ; CHECK-NEXT: [[TMP1:%.*]] = bitcast float [[WRAP2_FCA_1_0_EXTRACT]] to <4 x i8>
; CHECK-NEXT: [[VALCAST1:%.*]] = bitcast <4 x i8> [[TMP1]] to i32 ; CHECK-NEXT: [[VALCAST1:%.*]] = bitcast <4 x i8> [[TMP1]] to i32
; CHECK-NEXT: [[WRAP3:%.*]] = insertvalue [1 x [1 x i32]] poison, i32 [[VALCAST1]], 0, 0 ; CHECK-NEXT: [[WRAP3:%.*]] = insertvalue [1 x [1 x i32]] undef, i32 [[VALCAST1]], 0, 0
; CHECK-NEXT: [[WRAP4:%.*]] = insertvalue { [1 x [1 x i32]], {} } poison, [1 x [1 x i32]] [[WRAP3]], 0 ; CHECK-NEXT: [[WRAP4:%.*]] = insertvalue { [1 x [1 x i32]], {} } undef, [1 x [1 x i32]] [[WRAP3]], 0
; CHECK-NEXT: [[WRAP4_FCA_0_0_0_EXTRACT:%.*]] = extractvalue { [1 x [1 x i32]], {} } [[WRAP4]], 0, 0, 0 ; CHECK-NEXT: [[WRAP4_FCA_0_0_0_EXTRACT:%.*]] = extractvalue { [1 x [1 x i32]], {} } [[WRAP4]], 0, 0, 0
; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 [[WRAP4_FCA_0_0_0_EXTRACT]] to <4 x i8> ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 [[WRAP4_FCA_0_0_0_EXTRACT]] to <4 x i8>
; CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i8> [[TMP2]] to float ; CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i8> [[TMP2]] to float
@ -1128,7 +1128,7 @@ entry:
%a2 = alloca { {}, { float }, [0 x i8] } %a2 = alloca { {}, { float }, [0 x i8] }
%a3 = alloca { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } } %a3 = alloca { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } }
%wrap1 = insertvalue [1 x { i32 }] poison, i32 %x, 0, 0 %wrap1 = insertvalue [1 x { i32 }] undef, i32 %x, 0, 0
%gep1 = getelementptr { { [1 x { i32 }] } }, { { [1 x { i32 }] } }* %a1, i32 0, i32 0, i32 0 %gep1 = getelementptr { { [1 x { i32 }] } }, { { [1 x { i32 }] } }* %a1, i32 0, i32 0, i32 0
store [1 x { i32 }] %wrap1, [1 x { i32 }]* %gep1 store [1 x { i32 }] %wrap1, [1 x { i32 }]* %gep1
@ -1137,7 +1137,7 @@ entry:
%load1 = load { [1 x { float }] }, { [1 x { float }] }* %ptrcast1 %load1 = load { [1 x { float }] }, { [1 x { float }] }* %ptrcast1
%unwrap1 = extractvalue { [1 x { float }] } %load1, 0, 0 %unwrap1 = extractvalue { [1 x { float }] } %load1, 0, 0
%wrap2 = insertvalue { {}, { float }, [0 x i8] } poison, { float } %unwrap1, 1 %wrap2 = insertvalue { {}, { float }, [0 x i8] } undef, { float } %unwrap1, 1
store { {}, { float }, [0 x i8] } %wrap2, { {}, { float }, [0 x i8] }* %a2 store { {}, { float }, [0 x i8] } %wrap2, { {}, { float }, [0 x i8] }* %a2
%gep3 = getelementptr { {}, { float }, [0 x i8] }, { {}, { float }, [0 x i8] }* %a2, i32 0, i32 1, i32 0 %gep3 = getelementptr { {}, { float }, [0 x i8] }, { {}, { float }, [0 x i8] }* %a2, i32 0, i32 1, i32 0
@ -1145,8 +1145,8 @@ entry:
%load3 = load <4 x i8>, <4 x i8>* %ptrcast2 %load3 = load <4 x i8>, <4 x i8>* %ptrcast2
%valcast1 = bitcast <4 x i8> %load3 to i32 %valcast1 = bitcast <4 x i8> %load3 to i32
%wrap3 = insertvalue [1 x [1 x i32]] poison, i32 %valcast1, 0, 0 %wrap3 = insertvalue [1 x [1 x i32]] undef, i32 %valcast1, 0, 0
%wrap4 = insertvalue { [1 x [1 x i32]], {} } poison, [1 x [1 x i32]] %wrap3, 0 %wrap4 = insertvalue { [1 x [1 x i32]], {} } undef, [1 x [1 x i32]] %wrap3, 0
%gep4 = getelementptr { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } }, { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } }* %a3, i32 0, i32 1 %gep4 = getelementptr { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } }, { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } }* %a3, i32 0, i32 1
%ptrcast3 = bitcast { [0 x double], [1 x [1 x <4 x i8>]], {} }* %gep4 to { [1 x [1 x i32]], {} }* %ptrcast3 = bitcast { [0 x double], [1 x [1 x <4 x i8>]], {} }* %gep4 to { [1 x [1 x i32]], {} }*
store { [1 x [1 x i32]], {} } %wrap4, { [1 x [1 x i32]], {} }* %ptrcast3 store { [1 x [1 x i32]], {} } %wrap4, { [1 x [1 x i32]], {} }* %ptrcast3
@ -1531,20 +1531,20 @@ end:
ret void ret void
} }
define i64 @PR15805(i1 %a, i1 %b) { define void @PR15805(i1 %a, i1 %b) {
; CHECK-LABEL: @PR15805( ; CHECK-LABEL: @PR15805(
; CHECK-NEXT: [[COND_SROA_SPECULATED:%.*]] = select i1 [[B:%.*]], i64 undef, i64 undef ; CHECK-NEXT: [[COND_SROA_SPECULATED:%.*]] = select i1 undef, i64 undef, i64 undef
; CHECK-NEXT: ret i64 [[COND_SROA_SPECULATED]] ; CHECK-NEXT: ret void
; ;
%c = alloca i64, align 8 %c = alloca i64, align 8
%p.0.c = select i1 %a, i64* %c, i64* %c %p.0.c = select i1 undef, i64* %c, i64* %c
%cond.in = select i1 %b, i64* %p.0.c, i64* %c %cond.in = select i1 undef, i64* %p.0.c, i64* %c
%cond = load i64, i64* %cond.in, align 8 %cond = load i64, i64* %cond.in, align 8
ret i64 %cond ret void
} }
define void @PR15805.1(i1 %a, i1 %b, i1 %c1) { define void @PR15805.1(i1 %a, i1 %b) {
; Same as the normal PR15805, but rigged to place the use before the def inside ; Same as the normal PR15805, but rigged to place the use before the def inside
; of looping unreachable code. This helps ensure that we aren't sensitive to the ; of looping unreachable code. This helps ensure that we aren't sensitive to the
; order in which the uses of the alloca are visited. ; order in which the uses of the alloca are visited.
@ -1552,8 +1552,8 @@ define void @PR15805.1(i1 %a, i1 %b, i1 %c1) {
; CHECK-LABEL: @PR15805.1( ; CHECK-LABEL: @PR15805.1(
; CHECK-NEXT: br label [[EXIT:%.*]] ; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: loop: ; CHECK: loop:
; CHECK-NEXT: [[COND_SROA_SPECULATED:%.*]] = select i1 [[A:%.*]], i64 undef, i64 undef ; CHECK-NEXT: [[COND_SROA_SPECULATED:%.*]] = select i1 undef, i64 undef, i64 undef
; CHECK-NEXT: br i1 [[C1:%.*]], label [[LOOP:%.*]], label [[EXIT]] ; CHECK-NEXT: br i1 undef, label [[LOOP:%.*]], label [[EXIT]]
; CHECK: exit: ; CHECK: exit:
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
@ -1562,16 +1562,16 @@ define void @PR15805.1(i1 %a, i1 %b, i1 %c1) {
br label %exit br label %exit
loop: loop:
%cond.in = select i1 %a, i64* %c, i64* %p.0.c %cond.in = select i1 undef, i64* %c, i64* %p.0.c
%p.0.c = select i1 %b, i64* %c, i64* %c %p.0.c = select i1 undef, i64* %c, i64* %c
%cond = load i64, i64* %cond.in, align 8 %cond = load i64, i64* %cond.in, align 8
br i1 %c1, label %loop, label %exit br i1 undef, label %loop, label %exit
exit: exit:
ret void ret void
} }
define i8 @PR16651.1(i8* %a) { define void @PR16651.1(i8* %a) {
; This test case caused a crash due to the volatile memcpy in combination with ; This test case caused a crash due to the volatile memcpy in combination with
; lowering to integer loads and stores of a width other than that of the original ; lowering to integer loads and stores of a width other than that of the original
; memcpy. ; memcpy.
@ -1589,8 +1589,8 @@ define i8 @PR16651.1(i8* %a) {
; CHECK-NEXT: [[B_SROA_2_0_A_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 3 ; CHECK-NEXT: [[B_SROA_2_0_A_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 3
; CHECK-NEXT: [[B_SROA_2_0_COPYLOAD:%.*]] = load volatile i8, ptr [[B_SROA_2_0_A_SROA_IDX]], align 1 ; CHECK-NEXT: [[B_SROA_2_0_COPYLOAD:%.*]] = load volatile i8, ptr [[B_SROA_2_0_A_SROA_IDX]], align 1
; CHECK-NEXT: store volatile i8 [[B_SROA_2_0_COPYLOAD]], ptr [[B_SROA_2]], align 1 ; CHECK-NEXT: store volatile i8 [[B_SROA_2_0_COPYLOAD]], ptr [[B_SROA_2]], align 1
; CHECK-NEXT: [[B_SROA_1_0_B_SROA_1_2_V:%.*]] = load i8, ptr [[B_SROA_1]], align 2 ; CHECK-NEXT: [[B_SROA_1_0_B_SROA_1_2_:%.*]] = load i8, ptr [[B_SROA_1]], align 2
; CHECK-NEXT: ret i8 [[B_SROA_1_0_B_SROA_1_2_V]] ; CHECK-NEXT: unreachable
; ;
entry: entry:
@ -1598,11 +1598,11 @@ entry:
%b.cast = bitcast i32* %b to i8* %b.cast = bitcast i32* %b to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %b.cast, i8* align 4 %a, i32 4, i1 true) call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %b.cast, i8* align 4 %a, i32 4, i1 true)
%b.gep = getelementptr inbounds i8, i8* %b.cast, i32 2 %b.gep = getelementptr inbounds i8, i8* %b.cast, i32 2
%v = load i8, i8* %b.gep, align 2 load i8, i8* %b.gep, align 2
ret i8 %v unreachable
} }
define float @PR16651.2(<2 x float> %val, i1 %c1) { define void @PR16651.2() {
; This test case caused a crash due to failing to promote given a select that ; This test case caused a crash due to failing to promote given a select that
; can't be speculated. It shouldn't be promoted, but we missed that fact when ; can't be speculated. It shouldn't be promoted, but we missed that fact when
; analyzing whether we could form a vector promotion because that code didn't ; analyzing whether we could form a vector promotion because that code didn't
@ -1611,20 +1611,20 @@ define float @PR16651.2(<2 x float> %val, i1 %c1) {
; CHECK-LABEL: @PR16651.2( ; CHECK-LABEL: @PR16651.2(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[TV1_SROA_0:%.*]] = alloca <2 x float>, align 8 ; CHECK-NEXT: [[TV1_SROA_0:%.*]] = alloca <2 x float>, align 8
; CHECK-NEXT: store <2 x float> [[VAL:%.*]], ptr [[TV1_SROA_0]], align 8 ; CHECK-NEXT: store <2 x float> undef, ptr [[TV1_SROA_0]], align 8
; CHECK-NEXT: [[COND105_IN_I_I:%.*]] = select i1 [[C1:%.*]], ptr null, ptr [[TV1_SROA_0]] ; CHECK-NEXT: [[COND105_IN_I_I:%.*]] = select i1 undef, ptr null, ptr [[TV1_SROA_0]]
; CHECK-NEXT: [[COND105_I_I:%.*]] = load float, ptr [[COND105_IN_I_I]], align 8 ; CHECK-NEXT: [[COND105_I_I:%.*]] = load float, ptr [[COND105_IN_I_I]], align 8
; CHECK-NEXT: ret float [[COND105_I_I]] ; CHECK-NEXT: ret void
; ;
entry: entry:
%tv1 = alloca { <2 x float>, <2 x float> }, align 8 %tv1 = alloca { <2 x float>, <2 x float> }, align 8
%0 = getelementptr { <2 x float>, <2 x float> }, { <2 x float>, <2 x float> }* %tv1, i64 0, i32 1 %0 = getelementptr { <2 x float>, <2 x float> }, { <2 x float>, <2 x float> }* %tv1, i64 0, i32 1
store <2 x float> %val, <2 x float>* %0, align 8 store <2 x float> undef, <2 x float>* %0, align 8
%1 = getelementptr inbounds { <2 x float>, <2 x float> }, { <2 x float>, <2 x float> }* %tv1, i64 0, i32 1, i64 0 %1 = getelementptr inbounds { <2 x float>, <2 x float> }, { <2 x float>, <2 x float> }* %tv1, i64 0, i32 1, i64 0
%cond105.in.i.i = select i1 %c1, float* null, float* %1 %cond105.in.i.i = select i1 undef, float* null, float* %1
%cond105.i.i = load float, float* %cond105.in.i.i, align 8 %cond105.i.i = load float, float* %cond105.in.i.i, align 8
ret float %cond105.i.i ret void
} }
define void @test23(i32 %x) { define void @test23(i32 %x) {
@ -1643,7 +1643,7 @@ entry:
ret void ret void
} }
define void @PR18615(i8* %ptr) { define void @PR18615() {
; CHECK-LABEL: @PR18615( ; CHECK-LABEL: @PR18615(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
@ -1651,7 +1651,7 @@ define void @PR18615(i8* %ptr) {
entry: entry:
%f = alloca i8 %f = alloca i8
%gep = getelementptr i8, i8* %f, i64 -1 %gep = getelementptr i8, i8* %f, i64 -1
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %ptr, i8* %gep, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* undef, i8* %gep, i32 1, i1 false)
ret void ret void
} }
@ -2025,7 +2025,7 @@ entry:
declare void @llvm.lifetime.start.isVoid.i64.p0i8(i64, [10 x float]* nocapture) declare void @llvm.lifetime.start.isVoid.i64.p0i8(i64, [10 x float]* nocapture)
declare void @llvm.lifetime.end.isVoid.i64.p0i8(i64, [10 x float]* nocapture) declare void @llvm.lifetime.end.isVoid.i64.p0i8(i64, [10 x float]* nocapture)
@array = dso_local global [10 x float] zeroinitializer, align 4 @array = dso_local global [10 x float] undef, align 4
define void @test29(i32 %num, i32 %tid) { define void @test29(i32 %num, i32 %tid) {
; CHECK-LABEL: @test29( ; CHECK-LABEL: @test29(

105
llvm/test/Transforms/SROA/basictest.ll
View File

@ -580,7 +580,7 @@ define %S2 @test8(%S2* %arg) {
; CHECK-NEXT: [[S2_NEXT_S1:%.*]] = load %S1*, %S1** [[S2_NEXT_S1_PTR]], align 8, !tbaa [[TBAA3]] ; CHECK-NEXT: [[S2_NEXT_S1:%.*]] = load %S1*, %S1** [[S2_NEXT_S1_PTR]], align 8, !tbaa [[TBAA3]]
; CHECK-NEXT: [[S2_NEXT_NEXT_PTR:%.*]] = getelementptr [[S2]], %S2* [[S2_NEXT]], i64 0, i32 1 ; CHECK-NEXT: [[S2_NEXT_NEXT_PTR:%.*]] = getelementptr [[S2]], %S2* [[S2_NEXT]], i64 0, i32 1
; CHECK-NEXT: [[S2_NEXT_NEXT:%.*]] = load %S2*, %S2** [[S2_NEXT_NEXT_PTR]], align 8, !tbaa [[TBAA7]] ; CHECK-NEXT: [[S2_NEXT_NEXT:%.*]] = load %S2*, %S2** [[S2_NEXT_NEXT_PTR]], align 8, !tbaa [[TBAA7]]
; CHECK-NEXT: [[RESULT1:%.*]] = insertvalue [[S2]] poison, %S1* [[S2_NEXT_S1]], 0 ; CHECK-NEXT: [[RESULT1:%.*]] = insertvalue [[S2]] undef, %S1* [[S2_NEXT_S1]], 0
; CHECK-NEXT: [[RESULT2:%.*]] = insertvalue [[S2]] [[RESULT1]], %S2* [[S2_NEXT_NEXT]], 1 ; CHECK-NEXT: [[RESULT2:%.*]] = insertvalue [[S2]] [[RESULT1]], %S2* [[S2_NEXT_NEXT]], 1
; CHECK-NEXT: ret [[S2]] [[RESULT2]] ; CHECK-NEXT: ret [[S2]] [[RESULT2]]
; ;
@ -600,7 +600,7 @@ entry:
store %S2* %s2.next.next, %S2** %new.next.ptr, !tbaa !9 store %S2* %s2.next.next, %S2** %new.next.ptr, !tbaa !9
%new.s1 = load %S1*, %S1** %new.s1.ptr %new.s1 = load %S1*, %S1** %new.s1.ptr
%result1 = insertvalue %S2 poison, %S1* %new.s1, 0 %result1 = insertvalue %S2 undef, %S1* %new.s1, 0
%new.next = load %S2*, %S2** %new.next.ptr %new.next = load %S2*, %S2** %new.next.ptr
%result2 = insertvalue %S2 %result1, %S2* %new.next, 1 %result2 = insertvalue %S2 %result1, %S2* %new.next, 1
ret %S2 %result2 ret %S2 %result2
@ -659,10 +659,10 @@ entry:
ret %S2* %s2ptr ret %S2* %s2ptr
} }
define i32 @test11(i1 %c1) { define i32 @test11() {
; CHECK-LABEL: @test11( ; CHECK-LABEL: @test11(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[C1:%.*]], label [[GOOD:%.*]], label [[BAD:%.*]] ; CHECK-NEXT: br i1 undef, label [[GOOD:%.*]], label [[BAD:%.*]]
; CHECK: good: ; CHECK: good:
; CHECK-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
; CHECK: bad: ; CHECK: bad:
@ -671,7 +671,7 @@ define i32 @test11(i1 %c1) {
entry: entry:
%X = alloca i32 %X = alloca i32
br i1 %c1, label %good, label %bad br i1 undef, label %good, label %bad
good: good:
%Y = getelementptr i32, i32* %X, i64 0 %Y = getelementptr i32, i32* %X, i64 0
@ -929,7 +929,7 @@ entry:
%opaque = type opaque %opaque = type opaque
define i64 @test19(%opaque* %x) { define i32 @test19(%opaque* %x) {
; This input will cause us to try to compute a natural GEP when rewriting ; This input will cause us to try to compute a natural GEP when rewriting
; pointers in such a way that we try to GEP through the opaque type. Previously, ; pointers in such a way that we try to GEP through the opaque type. Previously,
; a check for an unsized type was missing and this crashed. Ensure it behaves ; a check for an unsized type was missing and this crashed. Ensure it behaves
@ -942,7 +942,7 @@ define i64 @test19(%opaque* %x) {
; CHECK-NEXT: [[A_SROA_2_0_CAST1_SROA_IDX:%.*]] = getelementptr inbounds i8, i8* [[CAST1]], i64 8 ; CHECK-NEXT: [[A_SROA_2_0_CAST1_SROA_IDX:%.*]] = getelementptr inbounds i8, i8* [[CAST1]], i64 8
; CHECK-NEXT: [[A_SROA_2_0_CAST1_SROA_CAST:%.*]] = bitcast i8* [[A_SROA_2_0_CAST1_SROA_IDX]] to i8** ; CHECK-NEXT: [[A_SROA_2_0_CAST1_SROA_CAST:%.*]] = bitcast i8* [[A_SROA_2_0_CAST1_SROA_IDX]] to i8**
; CHECK-NEXT: [[A_SROA_2_0_COPYLOAD:%.*]] = load i8*, i8** [[A_SROA_2_0_CAST1_SROA_CAST]], align 1 ; CHECK-NEXT: [[A_SROA_2_0_COPYLOAD:%.*]] = load i8*, i8** [[A_SROA_2_0_CAST1_SROA_CAST]], align 1
; CHECK-NEXT: ret i64 [[A_SROA_0_0_COPYLOAD]] ; CHECK-NEXT: ret i32 undef
; ;
entry: entry:
@ -952,12 +952,12 @@ entry:
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %cast2, i8* %cast1, i32 16, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %cast2, i8* %cast1, i32 16, i1 false)
%gep = getelementptr inbounds { i64, i8* }, { i64, i8* }* %a, i32 0, i32 0 %gep = getelementptr inbounds { i64, i8* }, { i64, i8* }* %a, i32 0, i32 0
%val = load i64, i64* %gep %val = load i64, i64* %gep
ret i64 %val ret i32 undef
} }
declare void @llvm.memcpy.p0i8.p1i8.i32(i8* nocapture, i8 addrspace(1)* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p1i8.i32(i8* nocapture, i8 addrspace(1)* nocapture, i32, i32, i1) nounwind
define i64 @test19_addrspacecast(%opaque* %x) { define i32 @test19_addrspacecast(%opaque* %x) {
; This input will cause us to try to compute a natural GEP when rewriting ; This input will cause us to try to compute a natural GEP when rewriting
; pointers in such a way that we try to GEP through the opaque type. Previously, ; pointers in such a way that we try to GEP through the opaque type. Previously,
; a check for an unsized type was missing and this crashed. Ensure it behaves ; a check for an unsized type was missing and this crashed. Ensure it behaves
@ -970,7 +970,7 @@ define i64 @test19_addrspacecast(%opaque* %x) {
; CHECK-NEXT: [[A_SROA_2_0_CAST1_SROA_IDX:%.*]] = getelementptr inbounds i8, i8 addrspace(1)* [[CAST1]], i16 8 ; CHECK-NEXT: [[A_SROA_2_0_CAST1_SROA_IDX:%.*]] = getelementptr inbounds i8, i8 addrspace(1)* [[CAST1]], i16 8
; CHECK-NEXT: [[A_SROA_2_0_CAST1_SROA_CAST:%.*]] = bitcast i8 addrspace(1)* [[A_SROA_2_0_CAST1_SROA_IDX]] to i8* addrspace(1)* ; CHECK-NEXT: [[A_SROA_2_0_CAST1_SROA_CAST:%.*]] = bitcast i8 addrspace(1)* [[A_SROA_2_0_CAST1_SROA_IDX]] to i8* addrspace(1)*
; CHECK-NEXT: [[A_SROA_2_0_COPYLOAD:%.*]] = load i8*, i8* addrspace(1)* [[A_SROA_2_0_CAST1_SROA_CAST]], align 1 ; CHECK-NEXT: [[A_SROA_2_0_COPYLOAD:%.*]] = load i8*, i8* addrspace(1)* [[A_SROA_2_0_CAST1_SROA_CAST]], align 1
; CHECK-NEXT: ret i64 [[A_SROA_0_0_COPYLOAD]] ; CHECK-NEXT: ret i32 undef
; ;
entry: entry:
@ -980,7 +980,7 @@ entry:
call void @llvm.memcpy.p0i8.p1i8.i32(i8* %cast2, i8 addrspace(1)* %cast1, i32 16, i32 1, i1 false) call void @llvm.memcpy.p0i8.p1i8.i32(i8* %cast2, i8 addrspace(1)* %cast1, i32 16, i32 1, i1 false)
%gep = getelementptr inbounds { i64, i8* }, { i64, i8* }* %a, i32 0, i32 0 %gep = getelementptr inbounds { i64, i8* }, { i64, i8* }* %a, i32 0, i32 0
%val = load i64, i64* %gep %val = load i64, i64* %gep
ret i64 %val ret i32 undef
} }
define i32 @test20() { define i32 @test20() {
@ -1061,13 +1061,13 @@ entry:
ret void ret void
} }
define void @PR13916.2(i1 %c1) { define void @PR13916.2() {
; Check whether we continue to handle them correctly when they start off with ; Check whether we continue to handle them correctly when they start off with
; different pointer value chains, but during rewriting we coalesce them into the ; different pointer value chains, but during rewriting we coalesce them into the
; same value. ; same value.
; CHECK-LABEL: @PR13916.2( ; CHECK-LABEL: @PR13916.2(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[C1:%.*]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; CHECK: if.then: ; CHECK: if.then:
; CHECK-NEXT: br label [[IF_END]] ; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end: ; CHECK: if.end:
@ -1076,7 +1076,7 @@ define void @PR13916.2(i1 %c1) {
entry: entry:
%a = alloca %PR13916.struct, align 1 %a = alloca %PR13916.struct, align 1
br i1 %c1, label %if.then, label %if.end br i1 undef, label %if.then, label %if.end
if.then: if.then:
%tmp0 = bitcast %PR13916.struct* %a to i8* %tmp0 = bitcast %PR13916.struct* %a to i8*
@ -1090,17 +1090,17 @@ if.end:
ret void ret void
} }
define void @PR13990(i1 %c1, i1 %c2, i1 %c3, i1 %c4, i8* %ptr) { define void @PR13990() {
; Ensure we can handle cases where processing one alloca causes the other ; Ensure we can handle cases where processing one alloca causes the other
; alloca to become dead and get deleted. This might crash or fail under ; alloca to become dead and get deleted. This might crash or fail under
; Valgrind if we regress. ; Valgrind if we regress.
; CHECK-LABEL: @PR13990( ; CHECK-LABEL: @PR13990(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[C1:%.*]], label [[BB1:%.*]], label [[BB2:%.*]] ; CHECK-NEXT: br i1 undef, label [[BB1:%.*]], label [[BB2:%.*]]
; CHECK: bb1: ; CHECK: bb1:
; CHECK-NEXT: br i1 [[C2:%.*]], label [[BB2]], label [[BB3:%.*]] ; CHECK-NEXT: br i1 undef, label [[BB2]], label [[BB3:%.*]]
; CHECK: bb2: ; CHECK: bb2:
; CHECK-NEXT: br i1 [[C4:%.*]], label [[BB3]], label [[BB4:%.*]] ; CHECK-NEXT: br i1 undef, label [[BB3]], label [[BB4:%.*]]
; CHECK: bb3: ; CHECK: bb3:
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; CHECK: bb4: ; CHECK: bb4:
@ -1110,15 +1110,15 @@ define void @PR13990(i1 %c1, i1 %c2, i1 %c3, i1 %c4, i8* %ptr) {
entry: entry:
%tmp1 = alloca i8* %tmp1 = alloca i8*
%tmp2 = alloca i8* %tmp2 = alloca i8*
br i1 %c1, label %bb1, label %bb2 br i1 undef, label %bb1, label %bb2
bb1: bb1:
store i8* %ptr, i8** %tmp2 store i8* undef, i8** %tmp2
br i1 %c2, label %bb2, label %bb3 br i1 undef, label %bb2, label %bb3
bb2: bb2:
%tmp50 = select i1 %c3, i8** %tmp2, i8** %tmp1 %tmp50 = select i1 undef, i8** %tmp2, i8** %tmp1
br i1 %c4, label %bb3, label %bb4 br i1 undef, label %bb3, label %bb4
bb3: bb3:
unreachable unreachable
@ -1153,16 +1153,15 @@ entry:
%PR14034.struct = type { { {} }, i32, %PR14034.list } %PR14034.struct = type { { {} }, i32, %PR14034.list }
%PR14034.list = type { %PR14034.list*, %PR14034.list* } %PR14034.list = type { %PR14034.list*, %PR14034.list* }
define void @PR14034(%PR14034.list* %ptr, %PR14034.struct* %ptr2) { define void @PR14034() {
; This test case tries to form GEPs into the empty leading struct members, and ; This test case tries to form GEPs into the empty leading struct members, and
; subsequently crashed (under valgrind) before we fixed the PR. The important ; subsequently crashed (under valgrind) before we fixed the PR. The important
; thing is to handle empty structs gracefully. ; thing is to handle empty structs gracefully.
; CHECK-LABEL: @PR14034( ; CHECK-LABEL: @PR14034(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[A_SROA_0:%.*]] = alloca [12 x i8], align 8 ; CHECK-NEXT: [[A_SROA_0:%.*]] = alloca [12 x i8], align 8
; CHECK-NEXT: [[A_SROA_0_0_CAST0_SROA_CAST:%.*]] = bitcast %PR14034.struct* [[PTR2:%.*]] to i8*
; CHECK-NEXT: [[A_SROA_0_0_CAST1_SROA_IDX:%.*]] = getelementptr inbounds [12 x i8], [12 x i8]* [[A_SROA_0]], i64 0, i64 0 ; CHECK-NEXT: [[A_SROA_0_0_CAST1_SROA_IDX:%.*]] = getelementptr inbounds [12 x i8], [12 x i8]* [[A_SROA_0]], i64 0, i64 0
; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 [[A_SROA_0_0_CAST0_SROA_CAST]], i8* align 8 [[A_SROA_0_0_CAST1_SROA_IDX]], i32 12, i1 false) ; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 undef, i8* align 8 [[A_SROA_0_0_CAST1_SROA_IDX]], i32 12, i1 false)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
@ -1170,8 +1169,8 @@ entry:
%a = alloca %PR14034.struct %a = alloca %PR14034.struct
%list = getelementptr %PR14034.struct, %PR14034.struct* %a, i32 0, i32 2 %list = getelementptr %PR14034.struct, %PR14034.struct* %a, i32 0, i32 2
%prev = getelementptr %PR14034.list, %PR14034.list* %list, i32 0, i32 1 %prev = getelementptr %PR14034.list, %PR14034.list* %list, i32 0, i32 1
store %PR14034.list* %ptr, %PR14034.list** %prev store %PR14034.list* undef, %PR14034.list** %prev
%cast0 = bitcast %PR14034.struct* %ptr2 to i8* %cast0 = bitcast %PR14034.struct* undef to i8*
%cast1 = bitcast %PR14034.struct* %a to i8* %cast1 = bitcast %PR14034.struct* %a to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %cast0, i8* %cast1, i32 12, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %cast0, i8* %cast1, i32 12, i1 false)
ret void ret void
@ -1182,17 +1181,17 @@ define i32 @test22(i32 %x) {
; types involving wrapper aggregates and zero-length aggregate members. ; types involving wrapper aggregates and zero-length aggregate members.
; CHECK-LABEL: @test22( ; CHECK-LABEL: @test22(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[WRAP1:%.*]] = insertvalue [1 x { i32 }] poison, i32 [[X:%.*]], 0, 0 ; CHECK-NEXT: [[WRAP1:%.*]] = insertvalue [1 x { i32 }] undef, i32 [[X:%.*]], 0, 0
; CHECK-NEXT: [[WRAP1_FCA_0_0_EXTRACT:%.*]] = extractvalue [1 x { i32 }] [[WRAP1]], 0, 0 ; CHECK-NEXT: [[WRAP1_FCA_0_0_EXTRACT:%.*]] = extractvalue [1 x { i32 }] [[WRAP1]], 0, 0
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32 [[WRAP1_FCA_0_0_EXTRACT]] to float ; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32 [[WRAP1_FCA_0_0_EXTRACT]] to float
; CHECK-NEXT: [[LOAD1_FCA_0_0_0_INSERT:%.*]] = insertvalue { [1 x { float }] } poison, float [[TMP0]], 0, 0, 0 ; CHECK-NEXT: [[LOAD1_FCA_0_0_0_INSERT:%.*]] = insertvalue { [1 x { float }] } poison, float [[TMP0]], 0, 0, 0
; CHECK-NEXT: [[UNWRAP1:%.*]] = extractvalue { [1 x { float }] } [[LOAD1_FCA_0_0_0_INSERT]], 0, 0 ; CHECK-NEXT: [[UNWRAP1:%.*]] = extractvalue { [1 x { float }] } [[LOAD1_FCA_0_0_0_INSERT]], 0, 0
; CHECK-NEXT: [[WRAP2:%.*]] = insertvalue { {}, { float }, [0 x i8] } poison, { float } [[UNWRAP1]], 1 ; CHECK-NEXT: [[WRAP2:%.*]] = insertvalue { {}, { float }, [0 x i8] } undef, { float } [[UNWRAP1]], 1
; CHECK-NEXT: [[WRAP2_FCA_1_0_EXTRACT:%.*]] = extractvalue { {}, { float }, [0 x i8] } [[WRAP2]], 1, 0 ; CHECK-NEXT: [[WRAP2_FCA_1_0_EXTRACT:%.*]] = extractvalue { {}, { float }, [0 x i8] } [[WRAP2]], 1, 0
; CHECK-NEXT: [[TMP1:%.*]] = bitcast float [[WRAP2_FCA_1_0_EXTRACT]] to <4 x i8> ; CHECK-NEXT: [[TMP1:%.*]] = bitcast float [[WRAP2_FCA_1_0_EXTRACT]] to <4 x i8>
; CHECK-NEXT: [[VALCAST1:%.*]] = bitcast <4 x i8> [[TMP1]] to i32 ; CHECK-NEXT: [[VALCAST1:%.*]] = bitcast <4 x i8> [[TMP1]] to i32
; CHECK-NEXT: [[WRAP3:%.*]] = insertvalue [1 x [1 x i32]] poison, i32 [[VALCAST1]], 0, 0 ; CHECK-NEXT: [[WRAP3:%.*]] = insertvalue [1 x [1 x i32]] undef, i32 [[VALCAST1]], 0, 0
; CHECK-NEXT: [[WRAP4:%.*]] = insertvalue { [1 x [1 x i32]], {} } poison, [1 x [1 x i32]] [[WRAP3]], 0 ; CHECK-NEXT: [[WRAP4:%.*]] = insertvalue { [1 x [1 x i32]], {} } undef, [1 x [1 x i32]] [[WRAP3]], 0
; CHECK-NEXT: [[WRAP4_FCA_0_0_0_EXTRACT:%.*]] = extractvalue { [1 x [1 x i32]], {} } [[WRAP4]], 0, 0, 0 ; CHECK-NEXT: [[WRAP4_FCA_0_0_0_EXTRACT:%.*]] = extractvalue { [1 x [1 x i32]], {} } [[WRAP4]], 0, 0, 0
; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 [[WRAP4_FCA_0_0_0_EXTRACT]] to <4 x i8> ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 [[WRAP4_FCA_0_0_0_EXTRACT]] to <4 x i8>
; CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i8> [[TMP2]] to float ; CHECK-NEXT: [[TMP3:%.*]] = bitcast <4 x i8> [[TMP2]] to float
@ -1207,7 +1206,7 @@ entry:
%a2 = alloca { {}, { float }, [0 x i8] } %a2 = alloca { {}, { float }, [0 x i8] }
%a3 = alloca { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } } %a3 = alloca { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } }
%wrap1 = insertvalue [1 x { i32 }] poison, i32 %x, 0, 0 %wrap1 = insertvalue [1 x { i32 }] undef, i32 %x, 0, 0
%gep1 = getelementptr { { [1 x { i32 }] } }, { { [1 x { i32 }] } }* %a1, i32 0, i32 0, i32 0 %gep1 = getelementptr { { [1 x { i32 }] } }, { { [1 x { i32 }] } }* %a1, i32 0, i32 0, i32 0
store [1 x { i32 }] %wrap1, [1 x { i32 }]* %gep1 store [1 x { i32 }] %wrap1, [1 x { i32 }]* %gep1
@ -1216,7 +1215,7 @@ entry:
%load1 = load { [1 x { float }] }, { [1 x { float }] }* %ptrcast1 %load1 = load { [1 x { float }] }, { [1 x { float }] }* %ptrcast1
%unwrap1 = extractvalue { [1 x { float }] } %load1, 0, 0 %unwrap1 = extractvalue { [1 x { float }] } %load1, 0, 0
%wrap2 = insertvalue { {}, { float }, [0 x i8] } poison, { float } %unwrap1, 1 %wrap2 = insertvalue { {}, { float }, [0 x i8] } undef, { float } %unwrap1, 1
store { {}, { float }, [0 x i8] } %wrap2, { {}, { float }, [0 x i8] }* %a2 store { {}, { float }, [0 x i8] } %wrap2, { {}, { float }, [0 x i8] }* %a2
%gep3 = getelementptr { {}, { float }, [0 x i8] }, { {}, { float }, [0 x i8] }* %a2, i32 0, i32 1, i32 0 %gep3 = getelementptr { {}, { float }, [0 x i8] }, { {}, { float }, [0 x i8] }* %a2, i32 0, i32 1, i32 0
@ -1224,8 +1223,8 @@ entry:
%load3 = load <4 x i8>, <4 x i8>* %ptrcast2 %load3 = load <4 x i8>, <4 x i8>* %ptrcast2
%valcast1 = bitcast <4 x i8> %load3 to i32 %valcast1 = bitcast <4 x i8> %load3 to i32
%wrap3 = insertvalue [1 x [1 x i32]] poison, i32 %valcast1, 0, 0 %wrap3 = insertvalue [1 x [1 x i32]] undef, i32 %valcast1, 0, 0
%wrap4 = insertvalue { [1 x [1 x i32]], {} } poison, [1 x [1 x i32]] %wrap3, 0 %wrap4 = insertvalue { [1 x [1 x i32]], {} } undef, [1 x [1 x i32]] %wrap3, 0
%gep4 = getelementptr { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } }, { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } }* %a3, i32 0, i32 1 %gep4 = getelementptr { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } }, { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } }* %a3, i32 0, i32 1
%ptrcast3 = bitcast { [0 x double], [1 x [1 x <4 x i8>]], {} }* %gep4 to { [1 x [1 x i32]], {} }* %ptrcast3 = bitcast { [0 x double], [1 x [1 x <4 x i8>]], {} }* %gep4 to { [1 x [1 x i32]], {} }*
store { [1 x [1 x i32]], {} } %wrap4, { [1 x [1 x i32]], {} }* %ptrcast3 store { [1 x [1 x i32]], {} } %wrap4, { [1 x [1 x i32]], {} }* %ptrcast3
@ -1621,18 +1620,18 @@ end:
define void @PR15805(i1 %a, i1 %b) { define void @PR15805(i1 %a, i1 %b) {
; CHECK-LABEL: @PR15805( ; CHECK-LABEL: @PR15805(
; CHECK-NEXT: [[COND_SROA_SPECULATED:%.*]] = select i1 [[B:%.*]], i64 undef, i64 undef ; CHECK-NEXT: [[COND_SROA_SPECULATED:%.*]] = select i1 undef, i64 undef, i64 undef
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%c = alloca i64, align 8 %c = alloca i64, align 8
%p.0.c = select i1 %a, i64* %c, i64* %c %p.0.c = select i1 undef, i64* %c, i64* %c
%cond.in = select i1 %b, i64* %p.0.c, i64* %c %cond.in = select i1 undef, i64* %p.0.c, i64* %c
%cond = load i64, i64* %cond.in, align 8 %cond = load i64, i64* %cond.in, align 8
ret void ret void
} }
define void @PR15805.1(i1 %a, i1 %b, i1 %c2) { define void @PR15805.1(i1 %a, i1 %b) {
; Same as the normal PR15805, but rigged to place the use before the def inside ; Same as the normal PR15805, but rigged to place the use before the def inside
; of looping unreachable code. This helps ensure that we aren't sensitive to the ; of looping unreachable code. This helps ensure that we aren't sensitive to the
; order in which the uses of the alloca are visited. ; order in which the uses of the alloca are visited.
@ -1640,8 +1639,8 @@ define void @PR15805.1(i1 %a, i1 %b, i1 %c2) {
; CHECK-LABEL: @PR15805.1( ; CHECK-LABEL: @PR15805.1(
; CHECK-NEXT: br label [[EXIT:%.*]] ; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: loop: ; CHECK: loop:
; CHECK-NEXT: [[COND_SROA_SPECULATED:%.*]] = select i1 [[A:%.*]], i64 undef, i64 undef ; CHECK-NEXT: [[COND_SROA_SPECULATED:%.*]] = select i1 undef, i64 undef, i64 undef
; CHECK-NEXT: br i1 [[C2:%.*]], label [[LOOP:%.*]], label [[EXIT]] ; CHECK-NEXT: br i1 undef, label [[LOOP:%.*]], label [[EXIT]]
; CHECK: exit: ; CHECK: exit:
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
@ -1650,10 +1649,10 @@ define void @PR15805.1(i1 %a, i1 %b, i1 %c2) {
br label %exit br label %exit
loop: loop:
%cond.in = select i1 %a, i64* %c, i64* %p.0.c %cond.in = select i1 undef, i64* %c, i64* %p.0.c
%p.0.c = select i1 %b, i64* %c, i64* %c %p.0.c = select i1 undef, i64* %c, i64* %c
%cond = load i64, i64* %cond.in, align 8 %cond = load i64, i64* %cond.in, align 8
br i1 %c2, label %loop, label %exit br i1 undef, label %loop, label %exit
exit: exit:
ret void ret void
@ -1691,7 +1690,7 @@ entry:
unreachable unreachable
} }
define void @PR16651.2(<2 x float> %val, i1 %c1) { define void @PR16651.2() {
; This test case caused a crash due to failing to promote given a select that ; This test case caused a crash due to failing to promote given a select that
; can't be speculated. It shouldn't be promoted, but we missed that fact when ; can't be speculated. It shouldn't be promoted, but we missed that fact when
; analyzing whether we could form a vector promotion because that code didn't ; analyzing whether we could form a vector promotion because that code didn't
@ -1700,9 +1699,9 @@ define void @PR16651.2(<2 x float> %val, i1 %c1) {
; CHECK-LABEL: @PR16651.2( ; CHECK-LABEL: @PR16651.2(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[TV1_SROA_0:%.*]] = alloca <2 x float>, align 8 ; CHECK-NEXT: [[TV1_SROA_0:%.*]] = alloca <2 x float>, align 8
; CHECK-NEXT: store <2 x float> [[VAL:%.*]], <2 x float>* [[TV1_SROA_0]], align 8 ; CHECK-NEXT: store <2 x float> undef, <2 x float>* [[TV1_SROA_0]], align 8
; CHECK-NEXT: [[TV1_SROA_0_0__SROA_IDX:%.*]] = getelementptr inbounds <2 x float>, <2 x float>* [[TV1_SROA_0]], i64 0, i32 0 ; CHECK-NEXT: [[TV1_SROA_0_0__SROA_IDX:%.*]] = getelementptr inbounds <2 x float>, <2 x float>* [[TV1_SROA_0]], i64 0, i32 0
; CHECK-NEXT: [[COND105_IN_I_I:%.*]] = select i1 [[C1:%.*]], float* null, float* [[TV1_SROA_0_0__SROA_IDX]] ; CHECK-NEXT: [[COND105_IN_I_I:%.*]] = select i1 undef, float* null, float* [[TV1_SROA_0_0__SROA_IDX]]
; CHECK-NEXT: [[COND105_I_I:%.*]] = load float, float* [[COND105_IN_I_I]], align 8 ; CHECK-NEXT: [[COND105_I_I:%.*]] = load float, float* [[COND105_IN_I_I]], align 8
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
@ -1710,9 +1709,9 @@ define void @PR16651.2(<2 x float> %val, i1 %c1) {
entry: entry:
%tv1 = alloca { <2 x float>, <2 x float> }, align 8 %tv1 = alloca { <2 x float>, <2 x float> }, align 8
%0 = getelementptr { <2 x float>, <2 x float> }, { <2 x float>, <2 x float> }* %tv1, i64 0, i32 1 %0 = getelementptr { <2 x float>, <2 x float> }, { <2 x float>, <2 x float> }* %tv1, i64 0, i32 1
store <2 x float> %val, <2 x float>* %0, align 8 store <2 x float> undef, <2 x float>* %0, align 8
%1 = getelementptr inbounds { <2 x float>, <2 x float> }, { <2 x float>, <2 x float> }* %tv1, i64 0, i32 1, i64 0 %1 = getelementptr inbounds { <2 x float>, <2 x float> }, { <2 x float>, <2 x float> }* %tv1, i64 0, i32 1, i64 0
%cond105.in.i.i = select i1 %c1, float* null, float* %1 %cond105.in.i.i = select i1 undef, float* null, float* %1
%cond105.i.i = load float, float* %cond105.in.i.i, align 8 %cond105.i.i = load float, float* %cond105.in.i.i, align 8
ret void ret void
} }
@ -1733,7 +1732,7 @@ entry:
ret void ret void
} }
define void @PR18615(i8* %ptr) { define void @PR18615() {
; CHECK-LABEL: @PR18615( ; CHECK-LABEL: @PR18615(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
@ -1741,7 +1740,7 @@ define void @PR18615(i8* %ptr) {
entry: entry:
%f = alloca i8 %f = alloca i8
%gep = getelementptr i8, i8* %f, i64 -1 %gep = getelementptr i8, i8* %f, i64 -1
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %ptr, i8* %gep, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* undef, i8* %gep, i32 1, i1 false)
ret void ret void
} }
@ -2119,7 +2118,7 @@ entry:
declare void @llvm.lifetime.start.isVoid.i64.p0i8(i64, [10 x float]* nocapture) declare void @llvm.lifetime.start.isVoid.i64.p0i8(i64, [10 x float]* nocapture)
declare void @llvm.lifetime.end.isVoid.i64.p0i8(i64, [10 x float]* nocapture) declare void @llvm.lifetime.end.isVoid.i64.p0i8(i64, [10 x float]* nocapture)
@array = dso_local global [10 x float] zeroinitializer, align 4 @array = dso_local global [10 x float] undef, align 4
define void @test29(i32 %num, i32 %tid) { define void @test29(i32 %num, i32 %tid) {
; CHECK-LABEL: @test29( ; CHECK-LABEL: @test29(

11
llvm/test/Transforms/SROA/dbg-single-piece.ll
View File

@ -1,4 +1,3 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes=sroa %s -S | FileCheck %s ; RUN: opt -passes=sroa %s -S | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
@ -6,20 +5,18 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
declare void @llvm.dbg.declare(metadata, metadata, metadata) #0 declare void @llvm.dbg.declare(metadata, metadata, metadata) #0
define void @_ZL18findInsertLocationPN4llvm17MachineBasicBlockENS_9SlotIndexERNS_13LiveIntervalsE() { define void @_ZL18findInsertLocationPN4llvm17MachineBasicBlockENS_9SlotIndexERNS_13LiveIntervalsE() {
; CHECK-LABEL: @_ZL18findInsertLocationPN4llvm17MachineBasicBlockENS_9SlotIndexERNS_13LiveIntervalsE(
; CHECK-NEXT: entry:
; CHECK-NEXT: call void @llvm.dbg.value(metadata %foo* poison, metadata [[META3:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64)), !dbg [[DBG8:![0-9]+]]
; CHECK-NEXT: ret void
;
entry: entry:
%retval = alloca %foo, align 8 %retval = alloca %foo, align 8
call void @llvm.dbg.declare(metadata %foo* %retval, metadata !1, metadata !7), !dbg !8 call void @llvm.dbg.declare(metadata %foo* %retval, metadata !1, metadata !7), !dbg !8
; Checks that SROA still inserts a bit_piece expression, even if it produces only one piece ; Checks that SROA still inserts a bit_piece expression, even if it produces only one piece
; (as long as that piece is smaller than the whole thing) ; (as long as that piece is smaller than the whole thing)
; CHECK-NOT: call void @llvm.dbg.value
; CHECK: call void @llvm.dbg.value(metadata %foo* undef, {{.*}}, metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64)), !dbg
; CHECK-NOT: call void @llvm.dbg.value
%0 = bitcast %foo* %retval to i8* %0 = bitcast %foo* %retval to i8*
%1 = getelementptr inbounds i8, i8* %0, i64 8 %1 = getelementptr inbounds i8, i8* %0, i64 8
%2 = bitcast i8* %1 to %foo** %2 = bitcast i8* %1 to %foo**
store %foo* poison, %foo** %2, align 8 store %foo* undef, %foo** %2, align 8
ret void ret void
} }

13
llvm/test/Transforms/SROA/dead-inst.ll
View File

@ -1,4 +1,3 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; SROA fails to rewrite allocs but does rewrite some phis and delete ; SROA fails to rewrite allocs but does rewrite some phis and delete
; dead instructions. Ensure that this invalidates analyses required ; dead instructions. Ensure that this invalidates analyses required
; for other passes. ; for other passes.
@ -18,14 +17,14 @@ target triple = "powerpc64le-grtev4-linux-gnu"
declare void @D(%class.b* sret(%class.b), %class.b* dereferenceable(32)) local_unnamed_addr declare void @D(%class.b* sret(%class.b), %class.b* dereferenceable(32)) local_unnamed_addr
; Function Attrs: nounwind ; Function Attrs: nounwind
define void @H(%class.b* noalias nocapture readnone, [2 x i64], i8* %ptr, i32 signext %v, i64 %l, i64 %idx, %class.b* nonnull dereferenceable(32) %ptr2) { define hidden fastcc void @H(%class.b* noalias nocapture readnone, [2 x i64]) unnamed_addr {
%3 = alloca %class.b, align 8 %3 = alloca %class.b, align 8
%.sroa.0 = alloca i64, align 8 %.sroa.0 = alloca i64, align 8
store i64 0, i64* %.sroa.0, align 8 store i64 0, i64* %.sroa.0, align 8
%4 = extractvalue [2 x i64] %1, 1 %4 = extractvalue [2 x i64] %1, 1
switch i64 %4, label %6 [ switch i64 %4, label %6 [
i64 4, label %foo i64 4, label %foo
i64 5, label %5 i64 5, label %5
] ]
; <label>:5: ; <label>:5:
@ -52,7 +51,7 @@ define void @H(%class.b* noalias nocapture readnone, [2 x i64], i8* %ptr, i32 si
br i1 %17, label %18, label %a.exit br i1 %17, label %18, label %a.exit
; <label>:18: ; <label>:18:
%19 = tail call i8* @memchr(i8* %ptr, i32 signext %v, i64 %l) %19 = tail call i8* @memchr(i8* undef, i32 signext undef, i64 undef)
%20 = icmp eq i8* %19, null %20 = icmp eq i8* %19, null
%21 = sext i1 %20 to i64 %21 = sext i1 %20 to i64
br label %a.exit br label %a.exit
@ -67,7 +66,7 @@ a.exit:
br i1 %26, label %G.exit, label %27 br i1 %26, label %G.exit, label %27
; <label>:27: ; <label>:27:
%28 = getelementptr inbounds i8, i8* %23, i64 %idx %28 = getelementptr inbounds i8, i8* %23, i64 undef
%29 = icmp eq i8* %28, null %29 = icmp eq i8* %28, null
br i1 %29, label %30, label %31 br i1 %29, label %30, label %31
@ -75,7 +74,7 @@ a.exit:
unreachable unreachable
; <label>:31: ; <label>:31:
call void @D(%class.b* nonnull sret(%class.b) %3, %class.b* nonnull dereferenceable(32) %ptr2) call void @D(%class.b* nonnull sret(%class.b) %3, %class.b* nonnull dereferenceable(32) undef)
br label %G.exit br label %G.exit
G.exit: G.exit:

4
llvm/test/Transforms/SROA/fca.ll
View File

@ -1,7 +1,7 @@
; RUN: opt < %s -passes=sroa -S | FileCheck %s ; RUN: opt < %s -passes=sroa -S | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64" target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64"
define { i32, i32 } @test0(i32 %x, i32 %y, { i32, i32 } %v) { define { i32, i32 } @test0(i32 %x, i32 %y) {
; CHECK-LABEL: @test0( ; CHECK-LABEL: @test0(
; CHECK-NOT: alloca ; CHECK-NOT: alloca
; CHECK: insertvalue { i32, i32 } ; CHECK: insertvalue { i32, i32 }
@ -11,7 +11,7 @@ define { i32, i32 } @test0(i32 %x, i32 %y, { i32, i32 } %v) {
entry: entry:
%a = alloca { i32, i32 } %a = alloca { i32, i32 }
store { i32, i32 } %v, { i32, i32 }* %a store { i32, i32 } undef, { i32, i32 }* %a
%gep1 = getelementptr inbounds { i32, i32 }, { i32, i32 }* %a, i32 0, i32 0 %gep1 = getelementptr inbounds { i32, i32 }, { i32, i32 }* %a, i32 0, i32 0
store i32 %x, i32* %gep1 store i32 %x, i32* %gep1

66
llvm/test/Transforms/SROA/phi-and-select.ll
View File

@ -265,10 +265,10 @@ entry:
ret i32 %result ret i32 %result
} }
define i32 @test7(i1 %c1) { define i32 @test7() {
; CHECK-LABEL: @test7( ; CHECK-LABEL: @test7(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[C1:%.*]], label [[GOOD:%.*]], label [[BAD:%.*]] ; CHECK-NEXT: br i1 undef, label [[GOOD:%.*]], label [[BAD:%.*]]
; CHECK: good: ; CHECK: good:
; CHECK-NEXT: br label [[EXIT:%.*]] ; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: bad: ; CHECK: bad:
@ -281,7 +281,7 @@ define i32 @test7(i1 %c1) {
entry: entry:
%X = alloca i32 %X = alloca i32
br i1 %c1, label %good, label %bad br i1 undef, label %good, label %bad
good: good:
%Y1 = getelementptr i32, i32* %X, i64 0 %Y1 = getelementptr i32, i32* %X, i64 0
@ -422,7 +422,7 @@ entry:
ret float %loaded ret float %loaded
} }
define i32 @test12(i32 %x, i32* %p, i1 %c1) { define i32 @test12(i32 %x, i32* %p) {
; Ensure we don't crash or fail to nuke dead selects of allocas if no load is ; Ensure we don't crash or fail to nuke dead selects of allocas if no load is
; never found. ; never found.
; CHECK-LABEL: @test12( ; CHECK-LABEL: @test12(
@ -433,19 +433,19 @@ define i32 @test12(i32 %x, i32* %p, i1 %c1) {
entry: entry:
%a = alloca i32 %a = alloca i32
store i32 %x, i32* %a store i32 %x, i32* %a
%dead = select i1 %c1, i32* %a, i32* %p %dead = select i1 undef, i32* %a, i32* %p
%load = load i32, i32* %a %load = load i32, i32* %a
ret i32 %load ret i32 %load
} }
define i32 @test13(i32 %x, i32* %p, i1 %c1) { define i32 @test13(i32 %x, i32* %p) {
; Ensure we don't crash or fail to nuke dead phis of allocas if no load is ever ; Ensure we don't crash or fail to nuke dead phis of allocas if no load is ever
; found. ; found.
; CHECK-LABEL: @test13( ; CHECK-LABEL: @test13(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop: ; CHECK: loop:
; CHECK-NEXT: br i1 [[C1:%.*]], label [[LOOP]], label [[EXIT:%.*]] ; CHECK-NEXT: br i1 undef, label [[LOOP]], label [[EXIT:%.*]]
; CHECK: exit: ; CHECK: exit:
; CHECK-NEXT: ret i32 [[X:%.*]] ; CHECK-NEXT: ret i32 [[X:%.*]]
; ;
@ -457,7 +457,7 @@ entry:
loop: loop:
%phi = phi i32* [ %p, %entry ], [ %a, %loop ] %phi = phi i32* [ %p, %entry ], [ %a, %loop ]
br i1 %c1, label %loop, label %exit br i1 undef, label %loop, label %exit
exit: exit:
%load = load i32, i32* %a %load = load i32, i32* %a
@ -514,39 +514,39 @@ exit:
ret i32 %result ret i32 %result
} }
define void @PR13905(i1 %c1, i1 %c2, i1 %c3) { define i32 @PR13905() {
; Check a pattern where we have a chain of dead phi nodes to ensure they are ; Check a pattern where we have a chain of dead phi nodes to ensure they are
; deleted and promotion can proceed. ; deleted and promotion can proceed.
; CHECK-LABEL: @PR13905( ; CHECK-LABEL: @PR13905(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[C1:%.*]], label [[LOOP1:%.*]], label [[EXIT:%.*]] ; CHECK-NEXT: br i1 undef, label [[LOOP1:%.*]], label [[EXIT:%.*]]
; CHECK: loop1: ; CHECK: loop1:
; CHECK-NEXT: br i1 [[C2:%.*]], label [[LOOP1]], label [[LOOP2:%.*]] ; CHECK-NEXT: br i1 undef, label [[LOOP1]], label [[LOOP2:%.*]]
; CHECK: loop2: ; CHECK: loop2:
; CHECK-NEXT: br i1 [[C3:%.*]], label [[LOOP1]], label [[EXIT]] ; CHECK-NEXT: br i1 undef, label [[LOOP1]], label [[EXIT]]
; CHECK: exit: ; CHECK: exit:
; CHECK-NEXT: [[PHI2:%.*]] = phi i32* [ poison, [[LOOP2]] ], [ null, [[ENTRY:%.*]] ] ; CHECK-NEXT: [[PHI2:%.*]] = phi i32* [ poison, [[LOOP2]] ], [ null, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret i32 undef
; ;
entry: entry:
%h = alloca i32 %h = alloca i32
store i32 0, i32* %h store i32 0, i32* %h
br i1 %c1, label %loop1, label %exit br i1 undef, label %loop1, label %exit
loop1: loop1:
%phi1 = phi i32* [ null, %entry ], [ %h, %loop1 ], [ %h, %loop2 ] %phi1 = phi i32* [ null, %entry ], [ %h, %loop1 ], [ %h, %loop2 ]
br i1 %c2, label %loop1, label %loop2 br i1 undef, label %loop1, label %loop2
loop2: loop2:
br i1 %c3, label %loop1, label %exit br i1 undef, label %loop1, label %exit
exit: exit:
%phi2 = phi i32* [ %phi1, %loop2 ], [ null, %entry ] %phi2 = phi i32* [ %phi1, %loop2 ], [ null, %entry ]
ret void ret i32 undef
} }
define i32 @PR13906(i1 %c1, i1 %c2) { define i32 @PR13906() {
; Another pattern which can lead to crashes due to failing to clear out dead ; Another pattern which can lead to crashes due to failing to clear out dead
; PHI nodes or select nodes. This triggers subtly differently from the above ; PHI nodes or select nodes. This triggers subtly differently from the above
; cases because the PHI node is (recursively) alive, but the select is dead. ; cases because the PHI node is (recursively) alive, but the select is dead.
@ -554,7 +554,7 @@ define i32 @PR13906(i1 %c1, i1 %c2) {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[FOR_COND:%.*]] ; CHECK-NEXT: br label [[FOR_COND:%.*]]
; CHECK: for.cond: ; CHECK: for.cond:
; CHECK-NEXT: br i1 [[C1:%.*]], label [[IF_THEN:%.*]], label [[FOR_COND]] ; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[FOR_COND]]
; CHECK: if.then: ; CHECK: if.then:
; CHECK-NEXT: br label [[FOR_COND]] ; CHECK-NEXT: br label [[FOR_COND]]
; ;
@ -565,11 +565,11 @@ entry:
br label %for.cond br label %for.cond
for.cond: for.cond:
%d.0 = phi i32* [ poison, %entry ], [ %c, %if.then ], [ %d.0, %for.cond ] %d.0 = phi i32* [ undef, %entry ], [ %c, %if.then ], [ %d.0, %for.cond ]
br i1 %c1, label %if.then, label %for.cond br i1 undef, label %if.then, label %for.cond
if.then: if.then:
%tmpcast.d.0 = select i1 %c2, i32* %c, i32* %d.0 %tmpcast.d.0 = select i1 undef, i32* %c, i32* %d.0
br label %for.cond br label %for.cond
} }
@ -749,43 +749,43 @@ merge:
; when the incoming pointer is itself from a PHI node. We would previously ; when the incoming pointer is itself from a PHI node. We would previously
; insert a bitcast instruction *before* a PHI, producing an invalid module; ; insert a bitcast instruction *before* a PHI, producing an invalid module;
; make sure we insert *after* the first non-PHI instruction. ; make sure we insert *after* the first non-PHI instruction.
define void @PR20822(i1 %c1, i1 %c2, %struct.S* %ptr) { define void @PR20822() {
; CHECK-LABEL: @PR20822( ; CHECK-LABEL: @PR20822(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[F_SROA_0:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[F_SROA_0:%.*]] = alloca i32, align 4
; CHECK-NEXT: br i1 [[C1:%.*]], label [[IF_END:%.*]], label [[FOR_COND:%.*]] ; CHECK-NEXT: br i1 undef, label [[IF_END:%.*]], label [[FOR_COND:%.*]]
; CHECK: for.cond: ; CHECK: for.cond:
; CHECK-NEXT: br label [[IF_END]] ; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end: ; CHECK: if.end:
; CHECK-NEXT: [[TMP0:%.*]] = phi i32 [ poison, [[ENTRY:%.*]] ], [ poison, [[FOR_COND]] ] ; CHECK-NEXT: [[TMP0:%.*]] = phi i32 [ undef, [[ENTRY:%.*]] ], [ undef, [[FOR_COND]] ]
; CHECK-NEXT: [[F_SROA_0_0_F2_SROA_CAST1:%.*]] = bitcast i32* [[F_SROA_0]] to %struct.S* ; CHECK-NEXT: [[F_SROA_0_0_F2_SROA_CAST1:%.*]] = bitcast i32* [[F_SROA_0]] to %struct.S*
; CHECK-NEXT: br i1 [[C2:%.*]], label [[IF_THEN5:%.*]], label [[IF_THEN2:%.*]] ; CHECK-NEXT: br i1 undef, label [[IF_THEN5:%.*]], label [[IF_THEN2:%.*]]
; CHECK: if.then2: ; CHECK: if.then2:
; CHECK-NEXT: br label [[IF_THEN5]] ; CHECK-NEXT: br label [[IF_THEN5]]
; CHECK: if.then5: ; CHECK: if.then5:
; CHECK-NEXT: [[F1:%.*]] = phi %struct.S* [ [[PTR:%.*]], [[IF_THEN2]] ], [ [[F_SROA_0_0_F2_SROA_CAST1]], [[IF_END]] ] ; CHECK-NEXT: [[F1:%.*]] = phi %struct.S* [ undef, [[IF_THEN2]] ], [ [[F_SROA_0_0_F2_SROA_CAST1]], [[IF_END]] ]
; CHECK-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[F1]], i32 0, i32 0 ; CHECK-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[F1]], i32 0, i32 0
; CHECK-NEXT: store i32 0, i32* [[DOTFCA_0_GEP]], align 4 ; CHECK-NEXT: store i32 undef, i32* [[DOTFCA_0_GEP]], align 4
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
entry: entry:
%f = alloca %struct.S, align 4 %f = alloca %struct.S, align 4
br i1 %c1, label %if.end, label %for.cond br i1 undef, label %if.end, label %for.cond
for.cond: ; preds = %for.cond, %entry for.cond: ; preds = %for.cond, %entry
br label %if.end br label %if.end
if.end: ; preds = %for.cond, %entry if.end: ; preds = %for.cond, %entry
%f2 = phi %struct.S* [ %f, %entry ], [ %f, %for.cond ] %f2 = phi %struct.S* [ %f, %entry ], [ %f, %for.cond ]
phi i32 [ poison, %entry ], [ poison, %for.cond ] phi i32 [ undef, %entry ], [ undef, %for.cond ]
br i1 %c2, label %if.then5, label %if.then2 br i1 undef, label %if.then5, label %if.then2
if.then2: ; preds = %if.end if.then2: ; preds = %if.end
br label %if.then5 br label %if.then5
if.then5: ; preds = %if.then2, %if.end if.then5: ; preds = %if.then2, %if.end
%f1 = phi %struct.S* [ %ptr, %if.then2 ], [ %f2, %if.end ] %f1 = phi %struct.S* [ undef, %if.then2 ], [ %f2, %if.end ]
store %struct.S zeroinitializer, %struct.S* %f1, align 4 store %struct.S undef, %struct.S* %f1, align 4
ret void ret void
} }

47
llvm/test/Transforms/SROA/phi-gep.ll
View File

@ -61,15 +61,15 @@ end:
ret i32 %load ret i32 %load
} }
define i32 @test_sroa_phi_gep_poison(i1 %cond) { define i32 @test_sroa_phi_gep_undef(i1 %cond) {
; CHECK-LABEL: @test_sroa_phi_gep_poison( ; CHECK-LABEL: @test_sroa_phi_gep_undef(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[A:%.*]] = alloca [[PAIR:%.*]], align 4 ; CHECK-NEXT: [[A:%.*]] = alloca [[PAIR:%.*]], align 4
; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_THEN:%.*]], label [[END:%.*]] ; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_THEN:%.*]], label [[END:%.*]]
; CHECK: if.then: ; CHECK: if.then:
; CHECK-NEXT: br label [[END]] ; CHECK-NEXT: br label [[END]]
; CHECK: end: ; CHECK: end:
; CHECK-NEXT: [[PHI:%.*]] = phi %pair* [ [[A]], [[ENTRY:%.*]] ], [ poison, [[IF_THEN]] ] ; CHECK-NEXT: [[PHI:%.*]] = phi %pair* [ [[A]], [[ENTRY:%.*]] ], [ undef, [[IF_THEN]] ]
; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [[PAIR]], %pair* [[PHI]], i32 0, i32 1 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [[PAIR]], %pair* [[PHI]], i32 0, i32 1
; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* [[GEP]], align 4 ; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* [[GEP]], align 4
; CHECK-NEXT: ret i32 [[LOAD]] ; CHECK-NEXT: ret i32 [[LOAD]]
@ -82,7 +82,7 @@ if.then:
br label %end br label %end
end: end:
%phi = phi %pair* [ %a, %entry], [ poison, %if.then ] %phi = phi %pair* [ %a, %entry], [ undef, %if.then ]
%gep = getelementptr inbounds %pair, %pair* %phi, i32 0, i32 1 %gep = getelementptr inbounds %pair, %pair* %phi, i32 0, i32 1
%load = load i32, i32* %gep, align 4 %load = load i32, i32* %gep, align 4
ret i32 %load ret i32 %load
@ -312,15 +312,15 @@ end:
ret i32 %load ret i32 %load
} }
define void @test_sroa_gep_phi_select_other_block(i1 %c1, i1 %c2, %pair* %ptr) { define void @test_sroa_gep_phi_select_other_block() {
; CHECK-LABEL: @test_sroa_gep_phi_select_other_block( ; CHECK-LABEL: @test_sroa_gep_phi_select_other_block(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [[PAIR:%.*]], align 8 ; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [[PAIR:%.*]], align 8
; CHECK-NEXT: br label [[WHILE_BODY:%.*]] ; CHECK-NEXT: br label [[WHILE_BODY:%.*]]
; CHECK: while.body: ; CHECK: while.body:
; CHECK-NEXT: [[PHI:%.*]] = phi %pair* [ [[ALLOCA]], [[ENTRY:%.*]] ], [ [[SELECT:%.*]], [[WHILE_BODY]] ] ; CHECK-NEXT: [[PHI:%.*]] = phi %pair* [ [[ALLOCA]], [[ENTRY:%.*]] ], [ [[SELECT:%.*]], [[WHILE_BODY]] ]
; CHECK-NEXT: [[SELECT]] = select i1 [[C1:%.*]], %pair* [[PHI]], %pair* [[PTR:%.*]] ; CHECK-NEXT: [[SELECT]] = select i1 undef, %pair* [[PHI]], %pair* undef
; CHECK-NEXT: br i1 [[C2:%.*]], label [[EXIT:%.*]], label [[WHILE_BODY]] ; CHECK-NEXT: br i1 undef, label [[EXIT:%.*]], label [[WHILE_BODY]]
; CHECK: exit: ; CHECK: exit:
; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [[PAIR]], %pair* [[PHI]], i64 1 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [[PAIR]], %pair* [[PHI]], i64 1
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
@ -331,28 +331,27 @@ entry:
while.body: while.body:
%phi = phi %pair* [ %alloca, %entry ], [ %select, %while.body ] %phi = phi %pair* [ %alloca, %entry ], [ %select, %while.body ]
%select = select i1 %c1, %pair* %phi, %pair* %ptr %select = select i1 undef, %pair* %phi, %pair* undef
br i1 %c2, label %exit, label %while.body br i1 undef, label %exit, label %while.body
exit: exit:
%gep = getelementptr inbounds %pair, %pair* %phi, i64 1 %gep = getelementptr inbounds %pair, %pair* %phi, i64 1
unreachable unreachable
} }
define void @test_sroa_gep_phi_select_same_block(i1 %c1, i1 %c2, %pair* %ptr) { define void @test_sroa_gep_phi_select_same_block() {
; CHECK-LABEL: @test_sroa_gep_phi_select_same_block( ; CHECK-LABEL: @test_sroa_gep_phi_select_same_block(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [[PAIR:%.*]], align 8 ; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [[PAIR:%.*]], align 8
; CHECK-NEXT: br label [[WHILE_BODY:%.*]] ; CHECK-NEXT: br label [[WHILE_BODY:%.*]]
; CHECK: while.body: ; CHECK: while.body:
; CHECK-NEXT: [[PHI:%.*]] = phi %pair* [ [[ALLOCA]], [[ENTRY:%.*]] ], [ [[SELECT:%.*]], [[WHILE_BODY]] ] ; CHECK-NEXT: [[PHI:%.*]] = phi %pair* [ [[ALLOCA]], [[ENTRY:%.*]] ], [ [[SELECT:%.*]], [[WHILE_BODY]] ]
; CHECK-NEXT: [[SELECT]] = select i1 [[C1:%.*]], %pair* [[PHI]], %pair* [[PTR:%.*]] ; CHECK-NEXT: [[SELECT]] = select i1 undef, %pair* [[PHI]], %pair* undef
; CHECK-NEXT: [[PHI_SROA_GEP:%.*]] = getelementptr inbounds [[PAIR]], %pair* [[PHI]], i64 1 ; CHECK-NEXT: [[PHI_SROA_GEP:%.*]] = getelementptr inbounds [[PAIR]], %pair* [[PHI]], i64 1
; CHECK-NEXT: [[PTR_SROA_GEP:%.*]] = getelementptr inbounds [[PAIR]], %pair* [[PTR]], i64 1 ; CHECK-NEXT: [[SELECT_SROA_SEL:%.*]] = select i1 undef, %pair* [[PHI_SROA_GEP]], %pair* poison
; CHECK-NEXT: [[SELECT_SROA_SEL:%.*]] = select i1 [[C1]], %pair* [[PHI_SROA_GEP]], %pair* [[PTR_SROA_GEP]] ; CHECK-NEXT: br i1 undef, label [[EXIT:%.*]], label [[WHILE_BODY]]
; CHECK-NEXT: br i1 [[C2:%.*]], label [[EXIT:%.*]], label [[WHILE_BODY]]
; CHECK: exit: ; CHECK: exit:
; CHECK-NEXT: ret void ; CHECK-NEXT: unreachable
; ;
entry: entry:
%alloca = alloca %pair, align 8 %alloca = alloca %pair, align 8
@ -360,12 +359,12 @@ entry:
while.body: while.body:
%phi = phi %pair* [ %alloca, %entry ], [ %select, %while.body ] %phi = phi %pair* [ %alloca, %entry ], [ %select, %while.body ]
%select = select i1 %c1, %pair* %phi, %pair* %ptr %select = select i1 undef, %pair* %phi, %pair* undef
%gep = getelementptr inbounds %pair, %pair* %select, i64 1 %gep = getelementptr inbounds %pair, %pair* %select, i64 1
br i1 %c2, label %exit, label %while.body br i1 undef, label %exit, label %while.body
exit: exit:
ret void unreachable
} }
define i32 @test_sroa_gep_cast_phi_gep(i1 %cond) { define i32 @test_sroa_gep_cast_phi_gep(i1 %cond) {
@ -417,7 +416,7 @@ end:
ret i32 %load ret i32 %load
} }
define void @unreachable_term(i1 %c1) { define void @unreachable_term() {
; CHECK-LABEL: @unreachable_term( ; CHECK-LABEL: @unreachable_term(
; CHECK-NEXT: [[A_SROA_0:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[A_SROA_0:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[A_SROA_0_0_A_SROA_CAST1:%.*]] = bitcast i32* [[A_SROA_0]] to [3 x i32]* ; CHECK-NEXT: [[A_SROA_0_0_A_SROA_CAST1:%.*]] = bitcast i32* [[A_SROA_0]] to [3 x i32]*
@ -428,7 +427,7 @@ define void @unreachable_term(i1 %c1) {
; CHECK-NEXT: [[PHI:%.*]] = phi [3 x i32]* [ [[A_SROA_0_0_A_SROA_CAST1]], [[BB1:%.*]] ], [ null, [[BB1_I]] ] ; CHECK-NEXT: [[PHI:%.*]] = phi [3 x i32]* [ [[A_SROA_0_0_A_SROA_CAST1]], [[BB1:%.*]] ], [ null, [[BB1_I]] ]
; CHECK-NEXT: [[GEP:%.*]] = getelementptr [3 x i32], [3 x i32]* [[PHI]], i64 0, i64 0 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr [3 x i32], [3 x i32]* [[PHI]], i64 0, i64 0
; CHECK-NEXT: store i32 0, i32* [[GEP]], align 1 ; CHECK-NEXT: store i32 0, i32* [[GEP]], align 1
; CHECK-NEXT: br i1 [[C1:%.*]], label [[BB1_I]], label [[EXIT:%.*]] ; CHECK-NEXT: br i1 undef, label [[BB1_I]], label [[EXIT:%.*]]
; CHECK: exit: ; CHECK: exit:
; CHECK-NEXT: br label [[BB2:%.*]] ; CHECK-NEXT: br label [[BB2:%.*]]
; CHECK: bb2: ; CHECK: bb2:
@ -444,7 +443,7 @@ bb1.i:
%phi = phi [3 x i32]* [ %a, %bb1 ], [ null, %bb1.i ] %phi = phi [3 x i32]* [ %a, %bb1 ], [ null, %bb1.i ]
%gep = getelementptr [3 x i32], [3 x i32]* %phi, i64 0, i64 0 %gep = getelementptr [3 x i32], [3 x i32]* %phi, i64 0, i64 0
store i32 0, i32* %gep, align 1 store i32 0, i32* %gep, align 1
br i1 %c1, label %bb1.i, label %exit br i1 undef, label %bb1.i, label %exit
exit: exit:
br label %bb2 br label %bb2
@ -453,12 +452,12 @@ bb2:
ret void ret void
} }
define void @constant_value_phi(i1 %c1) { define void @constant_value_phi() {
; CHECK-LABEL: @constant_value_phi( ; CHECK-LABEL: @constant_value_phi(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LAND_LHS_TRUE_I:%.*]] ; CHECK-NEXT: br label [[LAND_LHS_TRUE_I:%.*]]
; CHECK: land.lhs.true.i: ; CHECK: land.lhs.true.i:
; CHECK-NEXT: br i1 [[C1:%.*]], label [[COND_END_I:%.*]], label [[COND_END_I]] ; CHECK-NEXT: br i1 undef, label [[COND_END_I:%.*]], label [[COND_END_I]]
; CHECK: cond.end.i: ; CHECK: cond.end.i:
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; ;
@ -469,7 +468,7 @@ entry:
br label %land.lhs.true.i br label %land.lhs.true.i
land.lhs.true.i: ; preds = %entry land.lhs.true.i: ; preds = %entry
br i1 %c1, label %cond.end.i, label %cond.end.i br i1 undef, label %cond.end.i, label %cond.end.i
cond.end.i: ; preds = %land.lhs.true.i, %land.lhs.true.i cond.end.i: ; preds = %land.lhs.true.i, %land.lhs.true.i
%.pre-phi1 = phi i16* [ %cast, %land.lhs.true.i ], [ %cast, %land.lhs.true.i ] %.pre-phi1 = phi i16* [ %cast, %land.lhs.true.i ], [ %cast, %land.lhs.true.i ]

34
llvm/test/Transforms/SROA/phi-with-duplicate-pred.ll
View File

@ -6,10 +6,10 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f3
declare void @maybe_writes() declare void @maybe_writes()
define void @f2(i1 %c1) { define void @f2() {
; CHECK-LABEL: @f2( ; CHECK-LABEL: @f2(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[C1:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then: ; CHECK: if.then:
; CHECK-NEXT: br label [[CLEANUP:%.*]] ; CHECK-NEXT: br label [[CLEANUP:%.*]]
; CHECK: cleanup: ; CHECK: cleanup:
@ -28,7 +28,7 @@ define void @f2(i1 %c1) {
; ;
entry: entry:
%e = alloca i16, align 1 %e = alloca i16, align 1
br i1 %c1, label %if.then, label %if.else br i1 undef, label %if.then, label %if.else
if.then: ; preds = %entry if.then: ; preds = %entry
br label %cleanup br label %cleanup
@ -51,11 +51,11 @@ cleanup7: ; preds = %cleanup
ret void ret void
} }
define void @f3(i1 %c1) { define void @f3() {
; CHECK-LABEL: @f3( ; CHECK-LABEL: @f3(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[E:%.*]] = alloca i16, align 1 ; CHECK-NEXT: [[E:%.*]] = alloca i16, align 1
; CHECK-NEXT: br i1 [[C1:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then: ; CHECK: if.then:
; CHECK-NEXT: br label [[CLEANUP:%.*]] ; CHECK-NEXT: br label [[CLEANUP:%.*]]
; CHECK: cleanup: ; CHECK: cleanup:
@ -76,7 +76,7 @@ define void @f3(i1 %c1) {
; ;
entry: entry:
%e = alloca i16, align 1 %e = alloca i16, align 1
br i1 %c1, label %if.then, label %if.else br i1 undef, label %if.then, label %if.else
if.then: ; preds = %entry if.then: ; preds = %entry
br label %cleanup br label %cleanup
@ -102,11 +102,11 @@ cleanup7: ; preds = %cleanup
ret void ret void
} }
define void @f4(i1 %c1) { define void @f4() {
; CHECK-LABEL: @f4( ; CHECK-LABEL: @f4(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[E:%.*]] = alloca i16, align 1 ; CHECK-NEXT: [[E:%.*]] = alloca i16, align 1
; CHECK-NEXT: br i1 [[C1:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then: ; CHECK: if.then:
; CHECK-NEXT: br label [[CLEANUP:%.*]] ; CHECK-NEXT: br label [[CLEANUP:%.*]]
; CHECK: cleanup: ; CHECK: cleanup:
@ -128,7 +128,7 @@ define void @f4(i1 %c1) {
; ;
entry: entry:
%e = alloca i16, align 1 %e = alloca i16, align 1
br i1 %c1, label %if.then, label %if.else br i1 undef, label %if.then, label %if.else
if.then: ; preds = %entry if.then: ; preds = %entry
br label %cleanup br label %cleanup
@ -155,11 +155,11 @@ cleanup7: ; preds = %cleanup
ret void ret void
} }
define void @f5(i1 %c1, i1 %c2) { define void @f5() {
; CHECK-LABEL: @f5( ; CHECK-LABEL: @f5(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[E:%.*]] = alloca i16, align 1 ; CHECK-NEXT: [[E:%.*]] = alloca i16, align 1
; CHECK-NEXT: br i1 [[C1:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then: ; CHECK: if.then:
; CHECK-NEXT: br label [[CLEANUP:%.*]] ; CHECK-NEXT: br label [[CLEANUP:%.*]]
; CHECK: cleanup: ; CHECK: cleanup:
@ -171,7 +171,7 @@ define void @f5(i1 %c1, i1 %c2) {
; CHECK-NEXT: br label [[LBL1]] ; CHECK-NEXT: br label [[LBL1]]
; CHECK: lbl1: ; CHECK: lbl1:
; CHECK-NEXT: [[G_0:%.*]] = phi i16* [ @a, [[CLEANUP]] ], [ @a, [[CLEANUP]] ], [ [[E]], [[IF_ELSE]] ] ; CHECK-NEXT: [[G_0:%.*]] = phi i16* [ @a, [[CLEANUP]] ], [ @a, [[CLEANUP]] ], [ [[E]], [[IF_ELSE]] ]
; CHECK-NEXT: br i1 [[C2:%.*]], label [[FINAL:%.*]], label [[CLEANUP7]] ; CHECK-NEXT: br i1 undef, label [[FINAL:%.*]], label [[CLEANUP7]]
; CHECK: final: ; CHECK: final:
; CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* [[G_0]], align 1 ; CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* [[G_0]], align 1
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
@ -180,7 +180,7 @@ define void @f5(i1 %c1, i1 %c2) {
; ;
entry: entry:
%e = alloca i16, align 1 %e = alloca i16, align 1
br i1 %c1, label %if.then, label %if.else br i1 undef, label %if.then, label %if.else
if.then: ; preds = %entry if.then: ; preds = %entry
br label %cleanup br label %cleanup
@ -196,7 +196,7 @@ if.else: ; preds = %entry
lbl1: ; preds = %if.else, %cleanup, %cleanup lbl1: ; preds = %if.else, %cleanup, %cleanup
%g.0 = phi i16* [ @a, %cleanup ], [ @a, %cleanup ], [ %e, %if.else ] %g.0 = phi i16* [ @a, %cleanup ], [ @a, %cleanup ], [ %e, %if.else ]
br i1 %c2, label %final, label %cleanup7 br i1 undef, label %final, label %cleanup7
final: final:
%0 = load i16, i16* %g.0, align 1 %0 = load i16, i16* %g.0, align 1
@ -206,11 +206,11 @@ cleanup7: ; preds = %cleanup
ret void ret void
} }
define void @f6(i1 %c1) { define void @f6() {
; CHECK-LABEL: @f6( ; CHECK-LABEL: @f6(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[E:%.*]] = alloca i16, align 1 ; CHECK-NEXT: [[E:%.*]] = alloca i16, align 1
; CHECK-NEXT: br i1 [[C1:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then: ; CHECK: if.then:
; CHECK-NEXT: br label [[CLEANUP:%.*]] ; CHECK-NEXT: br label [[CLEANUP:%.*]]
; CHECK: cleanup: ; CHECK: cleanup:
@ -234,7 +234,7 @@ define void @f6(i1 %c1) {
; ;
entry: entry:
%e = alloca i16, align 1 %e = alloca i16, align 1
br i1 %c1, label %if.then, label %if.else br i1 undef, label %if.then, label %if.else
if.then: ; preds = %entry if.then: ; preds = %entry
br label %cleanup br label %cleanup

6
llvm/test/Transforms/SROA/select-gep.ll
View File

@ -79,8 +79,8 @@ bb:
ret i32 %add ret i32 %add
} }
define i32 @test_sroa_select_gep_poison(i1 %cond) { define i32 @test_sroa_select_gep_undef(i1 %cond) {
; CHECK-LABEL: @test_sroa_select_gep_poison( ; CHECK-LABEL: @test_sroa_select_gep_undef(
; CHECK-NEXT: bb: ; CHECK-NEXT: bb:
; CHECK-NEXT: [[A_SROA_0:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[A_SROA_0:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[SELECT_SROA_SEL:%.*]] = select i1 [[COND:%.*]], i32* [[A_SROA_0]], i32* poison ; CHECK-NEXT: [[SELECT_SROA_SEL:%.*]] = select i1 [[COND:%.*]], i32* [[A_SROA_0]], i32* poison
@ -89,7 +89,7 @@ define i32 @test_sroa_select_gep_poison(i1 %cond) {
; ;
bb: bb:
%a = alloca %pair, align 4 %a = alloca %pair, align 4
%select = select i1 %cond, %pair* %a, %pair* poison %select = select i1 %cond, %pair* %a, %pair* undef
%gep = getelementptr inbounds %pair, %pair* %select, i32 0, i32 1 %gep = getelementptr inbounds %pair, %pair* %select, i32 0, i32 1
%load = load i32, i32* %gep, align 4 %load = load i32, i32* %gep, align 4
ret i32 %load ret i32 %load

4
llvm/test/Transforms/SROA/select-load.ll
View File

@ -11,7 +11,7 @@ define <2 x i16> @test_load_bitcast_select(i1 %cond1, i1 %cond2) {
; CHECK-NEXT: [[TMP0:%.*]] = bitcast half 0xHFFFF to i16 ; CHECK-NEXT: [[TMP0:%.*]] = bitcast half 0xHFFFF to i16
; CHECK-NEXT: [[TMP1:%.*]] = bitcast half 0xH0000 to i16 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast half 0xH0000 to i16
; CHECK-NEXT: [[LD1_SROA_SPECULATED:%.*]] = select i1 [[COND1:%.*]], i16 [[TMP0]], i16 [[TMP1]] ; CHECK-NEXT: [[LD1_SROA_SPECULATED:%.*]] = select i1 [[COND1:%.*]], i16 [[TMP0]], i16 [[TMP1]]
; CHECK-NEXT: [[V1:%.*]] = insertelement <2 x i16> poison, i16 [[LD1_SROA_SPECULATED]], i32 0 ; CHECK-NEXT: [[V1:%.*]] = insertelement <2 x i16> undef, i16 [[LD1_SROA_SPECULATED]], i32 0
; CHECK-NEXT: [[TMP2:%.*]] = bitcast half 0xHFFFF to i16 ; CHECK-NEXT: [[TMP2:%.*]] = bitcast half 0xHFFFF to i16
; CHECK-NEXT: [[TMP3:%.*]] = bitcast half 0xH0000 to i16 ; CHECK-NEXT: [[TMP3:%.*]] = bitcast half 0xH0000 to i16
; CHECK-NEXT: [[LD2_SROA_SPECULATED:%.*]] = select i1 [[COND2:%.*]], i16 [[TMP2]], i16 [[TMP3]] ; CHECK-NEXT: [[LD2_SROA_SPECULATED:%.*]] = select i1 [[COND2:%.*]], i16 [[TMP2]], i16 [[TMP3]]
@ -28,7 +28,7 @@ entry:
%sel1 = select i1 %cond1, %st.half* %true.cast, %st.half* %false.cast %sel1 = select i1 %cond1, %st.half* %true.cast, %st.half* %false.cast
%cast1 = bitcast %st.half* %sel1 to i16* %cast1 = bitcast %st.half* %sel1 to i16*
%ld1 = load i16, i16* %cast1, align 2 %ld1 = load i16, i16* %cast1, align 2
%v1 = insertelement <2 x i16> poison, i16 %ld1, i32 0 %v1 = insertelement <2 x i16> undef, i16 %ld1, i32 0
%sel2 = select i1 %cond2, %st.half* %true.cast, %st.half* %false.cast %sel2 = select i1 %cond2, %st.half* %true.cast, %st.half* %false.cast
%cast2 = bitcast %st.half* %sel2 to i16* %cast2 = bitcast %st.half* %sel2 to i16*
%ld2 = load i16, i16* %cast2, align 2 %ld2 = load i16, i16* %cast2, align 2

41
llvm/test/Transforms/SROA/vector-promotion-different-size.ll
View File

@ -1,35 +1,24 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=sroa -S | FileCheck %s ; RUN: opt < %s -passes=sroa -S | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64" target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64"
define <4 x i1> @vector_bitcast() { define <4 x i1> @vector_bitcast() {
; CHECK-LABEL: @vector_bitcast( ; CHECK-LABEL: @vector_bitcast
; CHECK-NEXT: [[A:%.*]] = alloca <3 x i1>, align 1 ; CHECK: alloca <3 x i1>
; CHECK-NEXT: store <3 x i1> <i1 true, i1 false, i1 true>, <3 x i1>* [[A]], align 1
; CHECK-NEXT: [[A_0_CAST_SROA_CAST:%.*]] = bitcast <3 x i1>* [[A]] to <4 x i1>*
; CHECK-NEXT: [[A_0_VEC:%.*]] = load <4 x i1>, <4 x i1>* [[A_0_CAST_SROA_CAST]], align 1
; CHECK-NEXT: ret <4 x i1> [[A_0_VEC]]
;
%a = alloca <3 x i1> %a = alloca <3 x i1>
store <3 x i1> <i1 1,i1 0,i1 1>, <3 x i1>* %a store <3 x i1> <i1 1,i1 0,i1 1>, <3 x i1>* %a
%cast = bitcast <3 x i1>* %a to <4 x i1>* %cast = bitcast <3 x i1>* %a to <4 x i1>*
%vec = load <4 x i1>, <4 x i1>* %cast %vec = load <4 x i1>, <4 x i1>* %cast
ret <4 x i1> %vec ret <4 x i1> %vec
} }
define void @vector_bitcast_2(<32 x i16> %v) { define void @vector_bitcast_2() {
; CHECK-LABEL: @vector_bitcast_2( ; CHECK-LABEL: @vector_bitcast_2
; CHECK-NEXT: %"sum$1.host2" = alloca <32 x i16>, align 64 ; CHECK: alloca <32 x i16>
; CHECK-NEXT: store <32 x i16> [[V:%.*]], <32 x i16>* %"sum$1.host2", align 64
; CHECK-NEXT: %"sum$1.host2.0.bc.sroa_cast" = bitcast <32 x i16>* %"sum$1.host2" to <64 x i16>*
; CHECK-NEXT: %"sum$1.host2.0.bcl" = load <64 x i16>, <64 x i16>* %"sum$1.host2.0.bc.sroa_cast", align 64
; CHECK-NEXT: ret void
;
%"sum$1.host2" = alloca <32 x i16> %"sum$1.host2" = alloca <32 x i16>
store <32 x i16> %v, <32 x i16>* %"sum$1.host2" store <32 x i16> undef, <32 x i16>* %"sum$1.host2"
%bc = bitcast <32 x i16>* %"sum$1.host2" to <64 x i16>* %bc = bitcast <32 x i16>* %"sum$1.host2" to <64 x i16>*
%bcl = load <64 x i16>, <64 x i16>* %bc %bcl = load <64 x i16>, <64 x i16>* %bc
ret void ret void
} }

12
llvm/test/Transforms/SROA/vector-promotion.ll
View File

@ -407,10 +407,10 @@ entry:
ret <4 x float> %ret ret <4 x float> %ret
} }
define i32 @PR14212(<3 x i8> %val) { define i32 @PR14212() {
; CHECK-LABEL: @PR14212( ; CHECK-LABEL: @PR14212(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast <3 x i8> [[VAL:%.*]] to i24 ; CHECK-NEXT: [[TMP0:%.*]] = bitcast <3 x i8> undef to i24
; CHECK-NEXT: [[RETVAL_SROA_2_0_INSERT_EXT:%.*]] = zext i8 undef to i32 ; CHECK-NEXT: [[RETVAL_SROA_2_0_INSERT_EXT:%.*]] = zext i8 undef to i32
; CHECK-NEXT: [[RETVAL_SROA_2_0_INSERT_SHIFT:%.*]] = shl i32 [[RETVAL_SROA_2_0_INSERT_EXT]], 24 ; CHECK-NEXT: [[RETVAL_SROA_2_0_INSERT_SHIFT:%.*]] = shl i32 [[RETVAL_SROA_2_0_INSERT_EXT]], 24
; CHECK-NEXT: [[RETVAL_SROA_2_0_INSERT_MASK:%.*]] = and i32 undef, 16777215 ; CHECK-NEXT: [[RETVAL_SROA_2_0_INSERT_MASK:%.*]] = and i32 undef, 16777215
@ -425,7 +425,7 @@ define i32 @PR14212(<3 x i8> %val) {
entry: entry:
%retval = alloca <3 x i8>, align 4 %retval = alloca <3 x i8>, align 4
store <3 x i8> %val, <3 x i8>* %retval, align 4 store <3 x i8> undef, <3 x i8>* %retval, align 4
%cast = bitcast <3 x i8>* %retval to i32* %cast = bitcast <3 x i8>* %retval to i32*
%load = load i32, i32* %cast, align 4 %load = load i32, i32* %cast, align 4
ret i32 %load ret i32 %load
@ -612,15 +612,15 @@ entry:
ret <2 x float> %result ret <2 x float> %result
} }
define <4 x float> @test12(<4 x i32> %val) { define <4 x float> @test12() {
; CHECK-LABEL: @test12( ; CHECK-LABEL: @test12(
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VAL:%.*]] to <4 x float> ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> undef to <4 x float>
; CHECK-NEXT: ret <4 x float> [[TMP1]] ; CHECK-NEXT: ret <4 x float> [[TMP1]]
; ;
%a = alloca <3 x i32>, align 16 %a = alloca <3 x i32>, align 16
%cast1 = bitcast <3 x i32>* %a to <4 x i32>* %cast1 = bitcast <3 x i32>* %a to <4 x i32>*
store <4 x i32> %val, <4 x i32>* %cast1, align 16 store <4 x i32> undef, <4 x i32>* %cast1, align 16
%cast2 = bitcast <3 x i32>* %a to <3 x float>* %cast2 = bitcast <3 x i32>* %a to <3 x float>*
%cast3 = bitcast <3 x float>* %cast2 to <4 x float>* %cast3 = bitcast <3 x float>* %cast2 to <4 x float>*

10
llvm/test/Transforms/SROA/vectors-of-pointers.ll
View File

@ -5,21 +5,21 @@
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.8.0" target triple = "x86_64-apple-macosx10.8.0"
define void @foo(i1 %c1, i1 %c2) { define void @foo() {
entry: entry:
%Args.i = alloca <2 x i32*>, align 16 %Args.i = alloca <2 x i32*>, align 16
br i1 %c1, label %bb0.exit158, label %if.then.i.i.i.i.i138 br i1 undef, label %bb0.exit158, label %if.then.i.i.i.i.i138
if.then.i.i.i.i.i138: if.then.i.i.i.i.i138:
ret void unreachable
bb0.exit158: bb0.exit158:
br i1 %c2, label %bb0.exit257, label %if.then.i.i.i.i.i237 br i1 undef, label %bb0.exit257, label %if.then.i.i.i.i.i237
if.then.i.i.i.i.i237: if.then.i.i.i.i.i237:
unreachable unreachable
bb0.exit257: bb0.exit257:
%0 = load <2 x i32*>, <2 x i32*>* %Args.i, align 16 %0 = load <2 x i32*>, <2 x i32*>* %Args.i, align 16
ret void unreachable
} }