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@ -1,11 +1,19 @@
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// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
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// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK1
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// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefixes=CHECK1,CHECK1-NORMAL
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// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
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// RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
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// RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefixes=CHECK2,CHECK2-NORMAL
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// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -fopenmp-version=45 -o - | FileCheck %s --check-prefix=CHECK3
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// RUN: %clang_cc1 -verify -fopenmp -fopenmp-enable-irbuilder -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefixes=CHECK1,CHECK1-IRBUILDER
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// RUN: %clang_cc1 -fopenmp -fopenmp-enable-irbuilder -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
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// RUN: %clang_cc1 -fopenmp -fopenmp-enable-irbuilder -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefixes=CHECK2,CHECK2-IRBUILDER
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// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -fopenmp-version=45 -o - | FileCheck %s --check-prefixes=CHECK3,CHECK3-NORMAL
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// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -fopenmp-version=45 -o %t %s
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// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
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// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefixes=CHECK4,CHECK4-NORMAL
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// RUN: %clang_cc1 -verify -fopenmp -fopenmp-enable-irbuilder -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -fopenmp-version=45 -o - | FileCheck %s --check-prefixes=CHECK3,CHECK3-IRBUILDER
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// RUN: %clang_cc1 -fopenmp -fopenmp-enable-irbuilder -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -fopenmp-version=45 -o %t %s
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// RUN: %clang_cc1 -fopenmp -fopenmp-enable-irbuilder -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefixes=CHECK4,CHECK4-IRBUILDER
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// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK5
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// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
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@ -128,7 +136,7 @@ void foo_simd(int low, int up) {
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// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
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// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
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// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
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// CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
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// CHECK1-NORMAL-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
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// CHECK1-NEXT: store float* [[A]], float** [[A_ADDR]], align 8
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// CHECK1-NEXT: store float* [[B]], float** [[B_ADDR]], align 8
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// CHECK1-NEXT: store float* [[C]], float** [[C_ADDR]], align 8
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@ -137,9 +145,12 @@ void foo_simd(int low, int up) {
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// CHECK1-NEXT: store i32 4571423, i32* [[DOTOMP_UB]], align 4
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// CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
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// CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
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// CHECK1-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 66, i32 0, i32 4571423, i32 1, i32 1)
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// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
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// CHECK1-IRBUILDER-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP0]], i32 66, i32 0, i32 4571423, i32 1, i32 1)
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// CHECK1-NORMAL-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 66, i32 0, i32 4571423, i32 1, i32 1)
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// CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
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// CHECK1: omp.dispatch.cond:
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// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
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// CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
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// CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0
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// CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
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@ -157,6 +168,7 @@ void foo_simd(int low, int up) {
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// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP5]], 7
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// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 32000000, [[MUL]]
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// CHECK1-NEXT: store i32 [[SUB]], i32* [[I]], align 4
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// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
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// CHECK1-NEXT: call void @__kmpc_ordered(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
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// CHECK1-NEXT: [[TMP6:%.*]] = load float*, float** [[B_ADDR]], align 8
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// CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4
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@ -188,6 +200,7 @@ void foo_simd(int low, int up) {
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// CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
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// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], 1
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// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
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// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
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// CHECK1-NEXT: call void @__kmpc_dispatch_fini_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
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// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
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// CHECK1: omp.inner.for.end:
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@ -195,7 +208,9 @@ void foo_simd(int low, int up) {
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// CHECK1: omp.dispatch.inc:
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// CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
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// CHECK1: omp.dispatch.end:
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// CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP0]])
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// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
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// CHECK1-IRBUILDER-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP0]])
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// CHECK1-NORMAL-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP0]])
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// CHECK1-NEXT: ret void
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//
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//
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@ -213,7 +228,7 @@ void foo_simd(int low, int up) {
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// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
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// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
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// CHECK1-NEXT: [[I:%.*]] = alloca i64, align 8
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// CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
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// CHECK1-NORMAL-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
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// CHECK1-NEXT: store float* [[A]], float** [[A_ADDR]], align 8
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// CHECK1-NEXT: store float* [[B]], float** [[B_ADDR]], align 8
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// CHECK1-NEXT: store float* [[C]], float** [[C_ADDR]], align 8
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@ -222,9 +237,11 @@ void foo_simd(int low, int up) {
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// CHECK1-NEXT: store i64 16908287, i64* [[DOTOMP_UB]], align 8
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// CHECK1-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
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// CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
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// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB6:[0-9]+]])
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// CHECK1-NEXT: call void @__kmpc_dispatch_init_8u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1073741891, i64 0, i64 16908287, i64 1, i64 1)
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// CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
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// CHECK1: omp.dispatch.cond:
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// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB6]])
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// CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_dispatch_next_8u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]])
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// CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0
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// CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
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@ -243,6 +260,7 @@ void foo_simd(int low, int up) {
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// CHECK1-NEXT: [[MUL:%.*]] = mul i64 [[TMP5]], 127
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// CHECK1-NEXT: [[ADD1:%.*]] = add i64 131071, [[MUL]]
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// CHECK1-NEXT: store i64 [[ADD1]], i64* [[I]], align 8
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// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
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// CHECK1-NEXT: call void @__kmpc_ordered(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
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// CHECK1-NEXT: [[TMP6:%.*]] = load float*, float** [[B_ADDR]], align 8
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// CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[I]], align 8
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@ -270,6 +288,7 @@ void foo_simd(int low, int up) {
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// CHECK1-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
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// CHECK1-NEXT: [[ADD7:%.*]] = add i64 [[TMP17]], 1
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// CHECK1-NEXT: store i64 [[ADD7]], i64* [[DOTOMP_IV]], align 8
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// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB6]])
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// CHECK1-NEXT: call void @__kmpc_dispatch_fini_8u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
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// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
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// CHECK1: omp.inner.for.end:
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@ -277,7 +296,9 @@ void foo_simd(int low, int up) {
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// CHECK1: omp.dispatch.inc:
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// CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
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// CHECK1: omp.dispatch.end:
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// CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
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// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
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// CHECK1-IRBUILDER-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]])
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// CHECK1-NORMAL-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
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// CHECK1-NEXT: ret void
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//
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//
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@ -303,7 +324,7 @@ void foo_simd(int low, int up) {
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// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
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// CHECK1-NEXT: [[I8:%.*]] = alloca i8, align 1
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// CHECK1-NEXT: [[X9:%.*]] = alloca i32, align 4
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// CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
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// CHECK1-NORMAL-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
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// CHECK1-NEXT: store float* [[A]], float** [[A_ADDR]], align 8
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// CHECK1-NEXT: store float* [[B]], float** [[B_ADDR]], align 8
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// CHECK1-NEXT: store float* [[C]], float** [[C_ADDR]], align 8
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@ -336,9 +357,11 @@ void foo_simd(int low, int up) {
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// CHECK1-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
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// CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
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// CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_2]], align 8
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// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB8:[0-9]+]])
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// CHECK1-NEXT: call void @__kmpc_dispatch_init_8(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1073741894, i64 0, i64 [[TMP6]], i64 1, i64 1)
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// CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
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// CHECK1: omp.dispatch.cond:
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// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB8]])
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// CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_8(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]])
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// CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
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// CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
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@ -369,6 +392,7 @@ void foo_simd(int low, int up) {
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// CHECK1-NEXT: [[SUB20:%.*]] = sub nsw i64 11, [[MUL19]]
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// CHECK1-NEXT: [[CONV21:%.*]] = trunc i64 [[SUB20]] to i32
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// CHECK1-NEXT: store i32 [[CONV21]], i32* [[X9]], align 4
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// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
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// CHECK1-NEXT: call void @__kmpc_ordered(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
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// CHECK1-NEXT: [[TMP15:%.*]] = load float*, float** [[B_ADDR]], align 8
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// CHECK1-NEXT: [[TMP16:%.*]] = load i8, i8* [[I8]], align 1
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@ -400,6 +424,7 @@ void foo_simd(int low, int up) {
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// CHECK1-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
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// CHECK1-NEXT: [[ADD30:%.*]] = add nsw i64 [[TMP26]], 1
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// CHECK1-NEXT: store i64 [[ADD30]], i64* [[DOTOMP_IV]], align 8
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// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB8]])
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// CHECK1-NEXT: call void @__kmpc_dispatch_fini_8(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
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// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
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// CHECK1: omp.inner.for.end:
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@ -409,7 +434,9 @@ void foo_simd(int low, int up) {
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|
|
// CHECK1: omp.dispatch.end:
|
|
|
|
|
// CHECK1-NEXT: br label [[OMP_PRECOND_END]]
|
|
|
|
|
// CHECK1: omp.precond.end:
|
|
|
|
|
// CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK1-IRBUILDER-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]])
|
|
|
|
|
// CHECK1-NORMAL-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK1-NEXT: ret void
|
|
|
|
|
//
|
|
|
|
|
//
|
|
|
|
@ -430,7 +457,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK1-NEXT: [[I:%.*]] = alloca i8, align 1
|
|
|
|
|
// CHECK1-NEXT: [[X2:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK1-NORMAL-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK1-NEXT: store float* [[A]], float** [[A_ADDR]], align 8
|
|
|
|
|
// CHECK1-NEXT: store float* [[B]], float** [[B_ADDR]], align 8
|
|
|
|
|
// CHECK1-NEXT: store float* [[C]], float** [[C_ADDR]], align 8
|
|
|
|
@ -440,9 +467,11 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK1-NEXT: store i32 199, i32* [[DOTOMP_UB]], align 4
|
|
|
|
|
// CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
|
|
|
|
|
// CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
|
|
|
|
|
// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB10:[0-9]+]])
|
|
|
|
|
// CHECK1-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1073741893, i32 0, i32 199, i32 1, i32 1)
|
|
|
|
|
// CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
|
|
|
|
|
// CHECK1: omp.dispatch.cond:
|
|
|
|
|
// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB10]])
|
|
|
|
|
// CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
|
|
|
|
|
// CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0
|
|
|
|
|
// CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
|
|
|
|
@ -470,6 +499,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
|
|
|
|
|
// CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 -10, [[MUL5]]
|
|
|
|
|
// CHECK1-NEXT: store i32 [[ADD6]], i32* [[X2]], align 4
|
|
|
|
|
// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK1-NEXT: call void @__kmpc_ordered(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK1-NEXT: [[TMP8:%.*]] = load float*, float** [[B_ADDR]], align 8
|
|
|
|
|
// CHECK1-NEXT: [[TMP9:%.*]] = load i8, i8* [[I]], align 1
|
|
|
|
@ -501,6 +531,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
|
|
|
|
|
// CHECK1-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP19]], 1
|
|
|
|
|
// CHECK1-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV]], align 4
|
|
|
|
|
// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB10]])
|
|
|
|
|
// CHECK1-NEXT: call void @__kmpc_dispatch_fini_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
|
|
|
|
|
// CHECK1: omp.inner.for.end:
|
|
|
|
@ -508,7 +539,9 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK1: omp.dispatch.inc:
|
|
|
|
|
// CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
|
|
|
|
|
// CHECK1: omp.dispatch.end:
|
|
|
|
|
// CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK1-IRBUILDER-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]])
|
|
|
|
|
// CHECK1-NORMAL-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK1-NEXT: ret void
|
|
|
|
|
//
|
|
|
|
|
//
|
|
|
|
@ -535,7 +568,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK1-NEXT: [[I28:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK1-NORMAL-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK1-NEXT: store i32 [[LOW]], i32* [[LOW_ADDR]], align 4
|
|
|
|
|
// CHECK1-NEXT: store i32 [[UP]], i32* [[UP_ADDR]], align 4
|
|
|
|
|
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[LOW_ADDR]], align 4
|
|
|
|
@ -622,9 +655,11 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
|
|
|
|
|
// CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
|
|
|
|
|
// CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_20]], align 4
|
|
|
|
|
// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB12:[0-9]+]])
|
|
|
|
|
// CHECK1-NEXT: call void @__kmpc_dispatch_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 66, i32 0, i32 [[TMP25]], i32 1, i32 1)
|
|
|
|
|
// CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
|
|
|
|
|
// CHECK1: omp.dispatch.cond:
|
|
|
|
|
// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB12]])
|
|
|
|
|
// CHECK1-NEXT: [[TMP26:%.*]] = call i32 @__kmpc_dispatch_next_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
|
|
|
|
|
// CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP26]], 0
|
|
|
|
|
// CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
|
|
|
|
@ -632,13 +667,15 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
|
|
|
|
|
// CHECK1-NEXT: store i32 [[TMP27]], i32* [[DOTOMP_IV16]], align 4
|
|
|
|
|
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND29:%.*]]
|
|
|
|
|
// CHECK1: omp.inner.for.cond29:
|
|
|
|
|
// CHECK1-IRBUILDER: omp.inner.for.cond30:
|
|
|
|
|
// CHECK1-NORMAL: omp.inner.for.cond29:
|
|
|
|
|
// CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK1-NEXT: [[ADD30:%.*]] = add i32 [[TMP29]], 1
|
|
|
|
|
// CHECK1-NEXT: [[CMP31:%.*]] = icmp ult i32 [[TMP28]], [[ADD30]]
|
|
|
|
|
// CHECK1-NEXT: br i1 [[CMP31]], label [[OMP_INNER_FOR_BODY32:%.*]], label [[OMP_INNER_FOR_END40:%.*]]
|
|
|
|
|
// CHECK1: omp.inner.for.body32:
|
|
|
|
|
// CHECK1-IRBUILDER: omp.inner.for.body33:
|
|
|
|
|
// CHECK1-NORMAL: omp.inner.for.body32:
|
|
|
|
|
// CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK1-NEXT: [[MUL33:%.*]] = mul i32 [[TMP31]], 1
|
|
|
|
@ -650,15 +687,19 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK1-NEXT: store float 0.000000e+00, float* [[ARRAYIDX36]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK1-NEXT: call void @__captured_stmt.1(i32* [[I28]]), !llvm.access.group !7
|
|
|
|
|
// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE37:%.*]]
|
|
|
|
|
// CHECK1: omp.body.continue37:
|
|
|
|
|
// CHECK1-IRBUILDER: omp.body.continue38:
|
|
|
|
|
// CHECK1-NORMAL: omp.body.continue37:
|
|
|
|
|
// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC38:%.*]]
|
|
|
|
|
// CHECK1: omp.inner.for.inc38:
|
|
|
|
|
// CHECK1-IRBUILDER: omp.inner.for.inc39:
|
|
|
|
|
// CHECK1-NORMAL: omp.inner.for.inc38:
|
|
|
|
|
// CHECK1-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK1-NEXT: [[ADD39:%.*]] = add i32 [[TMP33]], 1
|
|
|
|
|
// CHECK1-NEXT: store i32 [[ADD39]], i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB12]])
|
|
|
|
|
// CHECK1-NEXT: call void @__kmpc_dispatch_fini_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]), !llvm.access.group !7
|
|
|
|
|
// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND29]], !llvm.loop [[LOOP8:![0-9]+]]
|
|
|
|
|
// CHECK1: omp.inner.for.end40:
|
|
|
|
|
// CHECK1-IRBUILDER: omp.inner.for.end42:
|
|
|
|
|
// CHECK1-NORMAL: omp.inner.for.end40:
|
|
|
|
|
// CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
|
|
|
|
|
// CHECK1: omp.dispatch.inc:
|
|
|
|
|
// CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
|
|
|
|
@ -681,7 +722,9 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK1: .omp.final.done:
|
|
|
|
|
// CHECK1-NEXT: br label [[OMP_PRECOND_END]]
|
|
|
|
|
// CHECK1: omp.precond.end:
|
|
|
|
|
// CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK1-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK1-IRBUILDER-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]])
|
|
|
|
|
// CHECK1-NORMAL-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK1-NEXT: ret void
|
|
|
|
|
//
|
|
|
|
|
//
|
|
|
|
@ -725,7 +768,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
|
|
|
|
|
// CHECK2-NORMAL-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
|
|
|
|
|
// CHECK2-NEXT: store float* [[A]], float** [[A_ADDR]], align 8
|
|
|
|
|
// CHECK2-NEXT: store float* [[B]], float** [[B_ADDR]], align 8
|
|
|
|
|
// CHECK2-NEXT: store float* [[C]], float** [[C_ADDR]], align 8
|
|
|
|
@ -734,9 +777,12 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK2-NEXT: store i32 4571423, i32* [[DOTOMP_UB]], align 4
|
|
|
|
|
// CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
|
|
|
|
|
// CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
|
|
|
|
|
// CHECK2-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 66, i32 0, i32 4571423, i32 1, i32 1)
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP0]], i32 66, i32 0, i32 4571423, i32 1, i32 1)
|
|
|
|
|
// CHECK2-NORMAL-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 66, i32 0, i32 4571423, i32 1, i32 1)
|
|
|
|
|
// CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
|
|
|
|
|
// CHECK2: omp.dispatch.cond:
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
|
|
|
|
|
// CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
|
|
|
|
|
// CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0
|
|
|
|
|
// CHECK2-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
|
|
|
|
@ -754,6 +800,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP5]], 7
|
|
|
|
|
// CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 32000000, [[MUL]]
|
|
|
|
|
// CHECK2-NEXT: store i32 [[SUB]], i32* [[I]], align 4
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK2-NEXT: call void @__kmpc_ordered(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-NEXT: [[TMP6:%.*]] = load float*, float** [[B_ADDR]], align 8
|
|
|
|
|
// CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4
|
|
|
|
@ -785,6 +832,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
|
|
|
|
|
// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], 1
|
|
|
|
|
// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
|
|
|
|
|
// CHECK2-NEXT: call void @__kmpc_dispatch_fini_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
|
|
|
|
|
// CHECK2: omp.inner.for.end:
|
|
|
|
@ -792,7 +840,9 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK2: omp.dispatch.inc:
|
|
|
|
|
// CHECK2-NEXT: br label [[OMP_DISPATCH_COND]]
|
|
|
|
|
// CHECK2: omp.dispatch.end:
|
|
|
|
|
// CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-NORMAL-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-NEXT: ret void
|
|
|
|
|
//
|
|
|
|
|
//
|
|
|
|
@ -810,7 +860,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
|
|
|
|
|
// CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK2-NEXT: [[I:%.*]] = alloca i64, align 8
|
|
|
|
|
// CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK2-NORMAL-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK2-NEXT: store float* [[A]], float** [[A_ADDR]], align 8
|
|
|
|
|
// CHECK2-NEXT: store float* [[B]], float** [[B_ADDR]], align 8
|
|
|
|
|
// CHECK2-NEXT: store float* [[C]], float** [[C_ADDR]], align 8
|
|
|
|
@ -819,9 +869,11 @@ void foo_simd(int low, int up) {
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|
|
// CHECK2-NEXT: store i64 16908287, i64* [[DOTOMP_UB]], align 8
|
|
|
|
|
// CHECK2-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
|
|
|
|
|
// CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB6:[0-9]+]])
|
|
|
|
|
// CHECK2-NEXT: call void @__kmpc_dispatch_init_8u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1073741891, i64 0, i64 16908287, i64 1, i64 1)
|
|
|
|
|
// CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
|
|
|
|
|
// CHECK2: omp.dispatch.cond:
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB6]])
|
|
|
|
|
// CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_dispatch_next_8u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]])
|
|
|
|
|
// CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0
|
|
|
|
|
// CHECK2-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
|
|
|
|
@ -840,6 +892,7 @@ void foo_simd(int low, int up) {
|
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|
|
// CHECK2-NEXT: [[MUL:%.*]] = mul i64 [[TMP5]], 127
|
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|
|
// CHECK2-NEXT: [[ADD1:%.*]] = add i64 131071, [[MUL]]
|
|
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|
|
// CHECK2-NEXT: store i64 [[ADD1]], i64* [[I]], align 8
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK2-NEXT: call void @__kmpc_ordered(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-NEXT: [[TMP6:%.*]] = load float*, float** [[B_ADDR]], align 8
|
|
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|
|
// CHECK2-NEXT: [[TMP7:%.*]] = load i64, i64* [[I]], align 8
|
|
|
|
@ -867,6 +920,7 @@ void foo_simd(int low, int up) {
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|
|
// CHECK2-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
|
|
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|
|
// CHECK2-NEXT: [[ADD7:%.*]] = add i64 [[TMP17]], 1
|
|
|
|
|
// CHECK2-NEXT: store i64 [[ADD7]], i64* [[DOTOMP_IV]], align 8
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB6]])
|
|
|
|
|
// CHECK2-NEXT: call void @__kmpc_dispatch_fini_8u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
|
|
|
|
|
// CHECK2: omp.inner.for.end:
|
|
|
|
@ -874,7 +928,9 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK2: omp.dispatch.inc:
|
|
|
|
|
// CHECK2-NEXT: br label [[OMP_DISPATCH_COND]]
|
|
|
|
|
// CHECK2: omp.dispatch.end:
|
|
|
|
|
// CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-NORMAL-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-NEXT: ret void
|
|
|
|
|
//
|
|
|
|
|
//
|
|
|
|
@ -900,7 +956,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK2-NEXT: [[I8:%.*]] = alloca i8, align 1
|
|
|
|
|
// CHECK2-NEXT: [[X9:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK2-NORMAL-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK2-NEXT: store float* [[A]], float** [[A_ADDR]], align 8
|
|
|
|
|
// CHECK2-NEXT: store float* [[B]], float** [[B_ADDR]], align 8
|
|
|
|
|
// CHECK2-NEXT: store float* [[C]], float** [[C_ADDR]], align 8
|
|
|
|
@ -933,9 +989,11 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK2-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
|
|
|
|
|
// CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
|
|
|
|
|
// CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_2]], align 8
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB8:[0-9]+]])
|
|
|
|
|
// CHECK2-NEXT: call void @__kmpc_dispatch_init_8(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1073741894, i64 0, i64 [[TMP6]], i64 1, i64 1)
|
|
|
|
|
// CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
|
|
|
|
|
// CHECK2: omp.dispatch.cond:
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB8]])
|
|
|
|
|
// CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_8(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]])
|
|
|
|
|
// CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
|
|
|
|
|
// CHECK2-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
|
|
|
|
@ -966,6 +1024,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK2-NEXT: [[SUB20:%.*]] = sub nsw i64 11, [[MUL19]]
|
|
|
|
|
// CHECK2-NEXT: [[CONV21:%.*]] = trunc i64 [[SUB20]] to i32
|
|
|
|
|
// CHECK2-NEXT: store i32 [[CONV21]], i32* [[X9]], align 4
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK2-NEXT: call void @__kmpc_ordered(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-NEXT: [[TMP15:%.*]] = load float*, float** [[B_ADDR]], align 8
|
|
|
|
|
// CHECK2-NEXT: [[TMP16:%.*]] = load i8, i8* [[I8]], align 1
|
|
|
|
@ -997,6 +1056,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK2-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
|
|
|
|
|
// CHECK2-NEXT: [[ADD30:%.*]] = add nsw i64 [[TMP26]], 1
|
|
|
|
|
// CHECK2-NEXT: store i64 [[ADD30]], i64* [[DOTOMP_IV]], align 8
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB8]])
|
|
|
|
|
// CHECK2-NEXT: call void @__kmpc_dispatch_fini_8(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
|
|
|
|
|
// CHECK2: omp.inner.for.end:
|
|
|
|
@ -1006,7 +1066,9 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK2: omp.dispatch.end:
|
|
|
|
|
// CHECK2-NEXT: br label [[OMP_PRECOND_END]]
|
|
|
|
|
// CHECK2: omp.precond.end:
|
|
|
|
|
// CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-NORMAL-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-NEXT: ret void
|
|
|
|
|
//
|
|
|
|
|
//
|
|
|
|
@ -1027,7 +1089,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK2-NEXT: [[I:%.*]] = alloca i8, align 1
|
|
|
|
|
// CHECK2-NEXT: [[X2:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK2-NORMAL-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK2-NEXT: store float* [[A]], float** [[A_ADDR]], align 8
|
|
|
|
|
// CHECK2-NEXT: store float* [[B]], float** [[B_ADDR]], align 8
|
|
|
|
|
// CHECK2-NEXT: store float* [[C]], float** [[C_ADDR]], align 8
|
|
|
|
@ -1037,9 +1099,11 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK2-NEXT: store i32 199, i32* [[DOTOMP_UB]], align 4
|
|
|
|
|
// CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
|
|
|
|
|
// CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB10:[0-9]+]])
|
|
|
|
|
// CHECK2-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 1073741893, i32 0, i32 199, i32 1, i32 1)
|
|
|
|
|
// CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
|
|
|
|
|
// CHECK2: omp.dispatch.cond:
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB10]])
|
|
|
|
|
// CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
|
|
|
|
|
// CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0
|
|
|
|
|
// CHECK2-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
|
|
|
|
@ -1067,6 +1131,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK2-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
|
|
|
|
|
// CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 -10, [[MUL5]]
|
|
|
|
|
// CHECK2-NEXT: store i32 [[ADD6]], i32* [[X2]], align 4
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK2-NEXT: call void @__kmpc_ordered(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-NEXT: [[TMP8:%.*]] = load float*, float** [[B_ADDR]], align 8
|
|
|
|
|
// CHECK2-NEXT: [[TMP9:%.*]] = load i8, i8* [[I]], align 1
|
|
|
|
@ -1098,6 +1163,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
|
|
|
|
|
// CHECK2-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP19]], 1
|
|
|
|
|
// CHECK2-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV]], align 4
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB10]])
|
|
|
|
|
// CHECK2-NEXT: call void @__kmpc_dispatch_fini_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
|
|
|
|
|
// CHECK2: omp.inner.for.end:
|
|
|
|
@ -1105,7 +1171,9 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK2: omp.dispatch.inc:
|
|
|
|
|
// CHECK2-NEXT: br label [[OMP_DISPATCH_COND]]
|
|
|
|
|
// CHECK2: omp.dispatch.end:
|
|
|
|
|
// CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-NORMAL-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-NEXT: ret void
|
|
|
|
|
//
|
|
|
|
|
//
|
|
|
|
@ -1132,7 +1200,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK2-NEXT: [[I28:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK2-NORMAL-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK2-NEXT: store i32 [[LOW]], i32* [[LOW_ADDR]], align 4
|
|
|
|
|
// CHECK2-NEXT: store i32 [[UP]], i32* [[UP_ADDR]], align 4
|
|
|
|
|
// CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[LOW_ADDR]], align 4
|
|
|
|
@ -1219,9 +1287,11 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
|
|
|
|
|
// CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
|
|
|
|
|
// CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_20]], align 4
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB12:[0-9]+]])
|
|
|
|
|
// CHECK2-NEXT: call void @__kmpc_dispatch_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 66, i32 0, i32 [[TMP25]], i32 1, i32 1)
|
|
|
|
|
// CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
|
|
|
|
|
// CHECK2: omp.dispatch.cond:
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB12]])
|
|
|
|
|
// CHECK2-NEXT: [[TMP26:%.*]] = call i32 @__kmpc_dispatch_next_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
|
|
|
|
|
// CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP26]], 0
|
|
|
|
|
// CHECK2-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
|
|
|
|
@ -1229,13 +1299,15 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
|
|
|
|
|
// CHECK2-NEXT: store i32 [[TMP27]], i32* [[DOTOMP_IV16]], align 4
|
|
|
|
|
// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND29:%.*]]
|
|
|
|
|
// CHECK2: omp.inner.for.cond29:
|
|
|
|
|
// CHECK2-IRBUILDER: omp.inner.for.cond30:
|
|
|
|
|
// CHECK2-NORMAL: omp.inner.for.cond29:
|
|
|
|
|
// CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK2-NEXT: [[ADD30:%.*]] = add i32 [[TMP29]], 1
|
|
|
|
|
// CHECK2-NEXT: [[CMP31:%.*]] = icmp ult i32 [[TMP28]], [[ADD30]]
|
|
|
|
|
// CHECK2-NEXT: br i1 [[CMP31]], label [[OMP_INNER_FOR_BODY32:%.*]], label [[OMP_INNER_FOR_END40:%.*]]
|
|
|
|
|
// CHECK2: omp.inner.for.body32:
|
|
|
|
|
// CHECK2-IRBUILDER: omp.inner.for.body33:
|
|
|
|
|
// CHECK2-NORMAL: omp.inner.for.body32:
|
|
|
|
|
// CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK2-NEXT: [[MUL33:%.*]] = mul i32 [[TMP31]], 1
|
|
|
|
@ -1247,15 +1319,19 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK2-NEXT: store float 0.000000e+00, float* [[ARRAYIDX36]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK2-NEXT: call void @__captured_stmt.1(i32* [[I28]]), !llvm.access.group !7
|
|
|
|
|
// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE37:%.*]]
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|
|
|
// CHECK2: omp.body.continue37:
|
|
|
|
|
// CHECK2-IRBUILDER: omp.body.continue38:
|
|
|
|
|
// CHECK2-NORMAL: omp.body.continue37:
|
|
|
|
|
// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC38:%.*]]
|
|
|
|
|
// CHECK2: omp.inner.for.inc38:
|
|
|
|
|
// CHECK2-IRBUILDER: omp.inner.for.inc39:
|
|
|
|
|
// CHECK2-NORMAL: omp.inner.for.inc38:
|
|
|
|
|
// CHECK2-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK2-NEXT: [[ADD39:%.*]] = add i32 [[TMP33]], 1
|
|
|
|
|
// CHECK2-NEXT: store i32 [[ADD39]], i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB12]])
|
|
|
|
|
// CHECK2-NEXT: call void @__kmpc_dispatch_fini_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]), !llvm.access.group !7
|
|
|
|
|
// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND29]], !llvm.loop [[LOOP8:![0-9]+]]
|
|
|
|
|
// CHECK2: omp.inner.for.end40:
|
|
|
|
|
// CHECK2-IRBUILDER: omp.inner.for.end42:
|
|
|
|
|
// CHECK2-NORMAL: omp.inner.for.end40:
|
|
|
|
|
// CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
|
|
|
|
|
// CHECK2: omp.dispatch.inc:
|
|
|
|
|
// CHECK2-NEXT: br label [[OMP_DISPATCH_COND]]
|
|
|
|
@ -1278,7 +1354,9 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK2: .omp.final.done:
|
|
|
|
|
// CHECK2-NEXT: br label [[OMP_PRECOND_END]]
|
|
|
|
|
// CHECK2: omp.precond.end:
|
|
|
|
|
// CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK2-IRBUILDER-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-NORMAL-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK2-NEXT: ret void
|
|
|
|
|
//
|
|
|
|
|
//
|
|
|
|
@ -1322,7 +1400,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
|
|
|
|
|
// CHECK3-NORMAL-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
|
|
|
|
|
// CHECK3-NEXT: store float* [[A]], float** [[A_ADDR]], align 8
|
|
|
|
|
// CHECK3-NEXT: store float* [[B]], float** [[B_ADDR]], align 8
|
|
|
|
|
// CHECK3-NEXT: store float* [[C]], float** [[C_ADDR]], align 8
|
|
|
|
@ -1331,9 +1409,12 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK3-NEXT: store i32 4571423, i32* [[DOTOMP_UB]], align 4
|
|
|
|
|
// CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
|
|
|
|
|
// CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
|
|
|
|
|
// CHECK3-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 66, i32 0, i32 4571423, i32 1, i32 1)
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP0]], i32 66, i32 0, i32 4571423, i32 1, i32 1)
|
|
|
|
|
// CHECK3-NORMAL-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 66, i32 0, i32 4571423, i32 1, i32 1)
|
|
|
|
|
// CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
|
|
|
|
|
// CHECK3: omp.dispatch.cond:
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
|
|
|
|
|
// CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
|
|
|
|
|
// CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0
|
|
|
|
|
// CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
|
|
|
|
@ -1351,6 +1432,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP5]], 7
|
|
|
|
|
// CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 32000000, [[MUL]]
|
|
|
|
|
// CHECK3-NEXT: store i32 [[SUB]], i32* [[I]], align 4
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK3-NEXT: call void @__kmpc_ordered(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK3-NEXT: [[TMP6:%.*]] = load float*, float** [[B_ADDR]], align 8
|
|
|
|
|
// CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4
|
|
|
|
@ -1382,6 +1464,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
|
|
|
|
|
// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], 1
|
|
|
|
|
// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
|
|
|
|
|
// CHECK3-NEXT: call void @__kmpc_dispatch_fini_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
|
|
|
|
|
// CHECK3: omp.inner.for.end:
|
|
|
|
@ -1389,7 +1472,9 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK3: omp.dispatch.inc:
|
|
|
|
|
// CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
|
|
|
|
|
// CHECK3: omp.dispatch.end:
|
|
|
|
|
// CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP0]])
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP0]])
|
|
|
|
|
// CHECK3-NORMAL-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP0]])
|
|
|
|
|
// CHECK3-NEXT: ret void
|
|
|
|
|
//
|
|
|
|
|
//
|
|
|
|
@ -1407,7 +1492,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
|
|
|
|
|
// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK3-NEXT: [[I:%.*]] = alloca i64, align 8
|
|
|
|
|
// CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK3-NORMAL-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK3-NEXT: store float* [[A]], float** [[A_ADDR]], align 8
|
|
|
|
|
// CHECK3-NEXT: store float* [[B]], float** [[B_ADDR]], align 8
|
|
|
|
|
// CHECK3-NEXT: store float* [[C]], float** [[C_ADDR]], align 8
|
|
|
|
@ -1416,9 +1501,11 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK3-NEXT: store i64 16908287, i64* [[DOTOMP_UB]], align 8
|
|
|
|
|
// CHECK3-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
|
|
|
|
|
// CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB6:[0-9]+]])
|
|
|
|
|
// CHECK3-NEXT: call void @__kmpc_dispatch_init_8u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 67, i64 0, i64 16908287, i64 1, i64 1)
|
|
|
|
|
// CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
|
|
|
|
|
// CHECK3: omp.dispatch.cond:
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB6]])
|
|
|
|
|
// CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_dispatch_next_8u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]])
|
|
|
|
|
// CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0
|
|
|
|
|
// CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
|
|
|
|
@ -1437,6 +1524,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK3-NEXT: [[MUL:%.*]] = mul i64 [[TMP5]], 127
|
|
|
|
|
// CHECK3-NEXT: [[ADD1:%.*]] = add i64 131071, [[MUL]]
|
|
|
|
|
// CHECK3-NEXT: store i64 [[ADD1]], i64* [[I]], align 8
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK3-NEXT: call void @__kmpc_ordered(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK3-NEXT: [[TMP6:%.*]] = load float*, float** [[B_ADDR]], align 8
|
|
|
|
|
// CHECK3-NEXT: [[TMP7:%.*]] = load i64, i64* [[I]], align 8
|
|
|
|
@ -1464,6 +1552,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK3-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
|
|
|
|
|
// CHECK3-NEXT: [[ADD7:%.*]] = add i64 [[TMP17]], 1
|
|
|
|
|
// CHECK3-NEXT: store i64 [[ADD7]], i64* [[DOTOMP_IV]], align 8
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB6]])
|
|
|
|
|
// CHECK3-NEXT: call void @__kmpc_dispatch_fini_8u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
|
|
|
|
|
// CHECK3: omp.inner.for.end:
|
|
|
|
@ -1471,7 +1560,9 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK3: omp.dispatch.inc:
|
|
|
|
|
// CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
|
|
|
|
|
// CHECK3: omp.dispatch.end:
|
|
|
|
|
// CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]])
|
|
|
|
|
// CHECK3-NORMAL-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK3-NEXT: ret void
|
|
|
|
|
//
|
|
|
|
|
//
|
|
|
|
@ -1497,7 +1588,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK3-NEXT: [[I8:%.*]] = alloca i8, align 1
|
|
|
|
|
// CHECK3-NEXT: [[X9:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK3-NORMAL-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK3-NEXT: store float* [[A]], float** [[A_ADDR]], align 8
|
|
|
|
|
// CHECK3-NEXT: store float* [[B]], float** [[B_ADDR]], align 8
|
|
|
|
|
// CHECK3-NEXT: store float* [[C]], float** [[C_ADDR]], align 8
|
|
|
|
@ -1530,9 +1621,11 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK3-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
|
|
|
|
|
// CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
|
|
|
|
|
// CHECK3-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_2]], align 8
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB8:[0-9]+]])
|
|
|
|
|
// CHECK3-NEXT: call void @__kmpc_dispatch_init_8(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 70, i64 0, i64 [[TMP6]], i64 1, i64 1)
|
|
|
|
|
// CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
|
|
|
|
|
// CHECK3: omp.dispatch.cond:
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB8]])
|
|
|
|
|
// CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_8(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]])
|
|
|
|
|
// CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
|
|
|
|
|
// CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
|
|
|
|
@ -1563,6 +1656,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK3-NEXT: [[SUB20:%.*]] = sub nsw i64 11, [[MUL19]]
|
|
|
|
|
// CHECK3-NEXT: [[CONV21:%.*]] = trunc i64 [[SUB20]] to i32
|
|
|
|
|
// CHECK3-NEXT: store i32 [[CONV21]], i32* [[X9]], align 4
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK3-NEXT: call void @__kmpc_ordered(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK3-NEXT: [[TMP15:%.*]] = load float*, float** [[B_ADDR]], align 8
|
|
|
|
|
// CHECK3-NEXT: [[TMP16:%.*]] = load i8, i8* [[I8]], align 1
|
|
|
|
@ -1594,6 +1688,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK3-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
|
|
|
|
|
// CHECK3-NEXT: [[ADD30:%.*]] = add nsw i64 [[TMP26]], 1
|
|
|
|
|
// CHECK3-NEXT: store i64 [[ADD30]], i64* [[DOTOMP_IV]], align 8
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB8]])
|
|
|
|
|
// CHECK3-NEXT: call void @__kmpc_dispatch_fini_8(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
|
|
|
|
|
// CHECK3: omp.inner.for.end:
|
|
|
|
@ -1603,7 +1698,9 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK3: omp.dispatch.end:
|
|
|
|
|
// CHECK3-NEXT: br label [[OMP_PRECOND_END]]
|
|
|
|
|
// CHECK3: omp.precond.end:
|
|
|
|
|
// CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]])
|
|
|
|
|
// CHECK3-NORMAL-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK3-NEXT: ret void
|
|
|
|
|
//
|
|
|
|
|
//
|
|
|
|
@ -1624,7 +1721,7 @@ void foo_simd(int low, int up) {
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|
|
// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK3-NEXT: [[I:%.*]] = alloca i8, align 1
|
|
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|
|
// CHECK3-NEXT: [[X2:%.*]] = alloca i32, align 4
|
|
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|
|
// CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
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|
|
|
|
// CHECK3-NORMAL-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK3-NEXT: store float* [[A]], float** [[A_ADDR]], align 8
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|
|
// CHECK3-NEXT: store float* [[B]], float** [[B_ADDR]], align 8
|
|
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|
|
// CHECK3-NEXT: store float* [[C]], float** [[C_ADDR]], align 8
|
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|
|
@ -1634,9 +1731,11 @@ void foo_simd(int low, int up) {
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|
|
// CHECK3-NEXT: store i32 199, i32* [[DOTOMP_UB]], align 4
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|
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|
|
// CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
|
|
|
|
|
// CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB10:[0-9]+]])
|
|
|
|
|
// CHECK3-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 69, i32 0, i32 199, i32 1, i32 1)
|
|
|
|
|
// CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
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|
|
// CHECK3: omp.dispatch.cond:
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB10]])
|
|
|
|
|
// CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
|
|
|
|
|
// CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0
|
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|
|
// CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
|
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|
|
@ -1664,6 +1763,7 @@ void foo_simd(int low, int up) {
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|
|
// CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
|
|
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|
|
// CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 -10, [[MUL5]]
|
|
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|
|
// CHECK3-NEXT: store i32 [[ADD6]], i32* [[X2]], align 4
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK3-NEXT: call void @__kmpc_ordered(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
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|
|
// CHECK3-NEXT: [[TMP8:%.*]] = load float*, float** [[B_ADDR]], align 8
|
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|
|
// CHECK3-NEXT: [[TMP9:%.*]] = load i8, i8* [[I]], align 1
|
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|
|
@ -1695,6 +1795,7 @@ void foo_simd(int low, int up) {
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|
|
// CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
|
|
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|
|
// CHECK3-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP19]], 1
|
|
|
|
|
// CHECK3-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV]], align 4
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB10]])
|
|
|
|
|
// CHECK3-NEXT: call void @__kmpc_dispatch_fini_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
|
|
|
|
|
// CHECK3: omp.inner.for.end:
|
|
|
|
@ -1702,7 +1803,9 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK3: omp.dispatch.inc:
|
|
|
|
|
// CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
|
|
|
|
|
// CHECK3: omp.dispatch.end:
|
|
|
|
|
// CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]])
|
|
|
|
|
// CHECK3-NORMAL-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK3-NEXT: ret void
|
|
|
|
|
//
|
|
|
|
|
//
|
|
|
|
@ -1729,7 +1832,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK3-NEXT: [[I28:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK3-NORMAL-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK3-NEXT: store i32 [[LOW]], i32* [[LOW_ADDR]], align 4
|
|
|
|
|
// CHECK3-NEXT: store i32 [[UP]], i32* [[UP_ADDR]], align 4
|
|
|
|
|
// CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[LOW_ADDR]], align 4
|
|
|
|
@ -1816,9 +1919,11 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
|
|
|
|
|
// CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
|
|
|
|
|
// CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_20]], align 4
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB12:[0-9]+]])
|
|
|
|
|
// CHECK3-NEXT: call void @__kmpc_dispatch_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 66, i32 0, i32 [[TMP25]], i32 1, i32 1)
|
|
|
|
|
// CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
|
|
|
|
|
// CHECK3: omp.dispatch.cond:
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB12]])
|
|
|
|
|
// CHECK3-NEXT: [[TMP26:%.*]] = call i32 @__kmpc_dispatch_next_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
|
|
|
|
|
// CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP26]], 0
|
|
|
|
|
// CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
|
|
|
|
@ -1826,13 +1931,15 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
|
|
|
|
|
// CHECK3-NEXT: store i32 [[TMP27]], i32* [[DOTOMP_IV16]], align 4
|
|
|
|
|
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND29:%.*]]
|
|
|
|
|
// CHECK3: omp.inner.for.cond29:
|
|
|
|
|
// CHECK3-IRBUILDER: omp.inner.for.cond30:
|
|
|
|
|
// CHECK3-NORMAL: omp.inner.for.cond29:
|
|
|
|
|
// CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK3-NEXT: [[ADD30:%.*]] = add i32 [[TMP29]], 1
|
|
|
|
|
// CHECK3-NEXT: [[CMP31:%.*]] = icmp ult i32 [[TMP28]], [[ADD30]]
|
|
|
|
|
// CHECK3-NEXT: br i1 [[CMP31]], label [[OMP_INNER_FOR_BODY32:%.*]], label [[OMP_INNER_FOR_END40:%.*]]
|
|
|
|
|
// CHECK3: omp.inner.for.body32:
|
|
|
|
|
// CHECK3-IRBUILDER: omp.inner.for.body33:
|
|
|
|
|
// CHECK3-NORMAL: omp.inner.for.body32:
|
|
|
|
|
// CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK3-NEXT: [[MUL33:%.*]] = mul i32 [[TMP31]], 1
|
|
|
|
@ -1844,15 +1951,19 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK3-NEXT: store float 0.000000e+00, float* [[ARRAYIDX36]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK3-NEXT: call void @__captured_stmt.1(i32* [[I28]]), !llvm.access.group !7
|
|
|
|
|
// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE37:%.*]]
|
|
|
|
|
// CHECK3: omp.body.continue37:
|
|
|
|
|
// CHECK3-IRBUILDER: omp.body.continue38:
|
|
|
|
|
// CHECK3-NORMAL: omp.body.continue37:
|
|
|
|
|
// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC38:%.*]]
|
|
|
|
|
// CHECK3: omp.inner.for.inc38:
|
|
|
|
|
// CHECK3-IRBUILDER: omp.inner.for.inc39:
|
|
|
|
|
// CHECK3-NORMAL: omp.inner.for.inc38:
|
|
|
|
|
// CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK3-NEXT: [[ADD39:%.*]] = add i32 [[TMP33]], 1
|
|
|
|
|
// CHECK3-NEXT: store i32 [[ADD39]], i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB12]])
|
|
|
|
|
// CHECK3-NEXT: call void @__kmpc_dispatch_fini_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]), !llvm.access.group !7
|
|
|
|
|
// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND29]], !llvm.loop [[LOOP8:![0-9]+]]
|
|
|
|
|
// CHECK3: omp.inner.for.end40:
|
|
|
|
|
// CHECK3-IRBUILDER: omp.inner.for.end42:
|
|
|
|
|
// CHECK3-NORMAL: omp.inner.for.end40:
|
|
|
|
|
// CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
|
|
|
|
|
// CHECK3: omp.dispatch.inc:
|
|
|
|
|
// CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
|
|
|
|
@ -1875,7 +1986,9 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK3: .omp.final.done:
|
|
|
|
|
// CHECK3-NEXT: br label [[OMP_PRECOND_END]]
|
|
|
|
|
// CHECK3: omp.precond.end:
|
|
|
|
|
// CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK3-IRBUILDER-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]])
|
|
|
|
|
// CHECK3-NORMAL-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK3-NEXT: ret void
|
|
|
|
|
//
|
|
|
|
|
//
|
|
|
|
@ -1919,7 +2032,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
|
|
|
|
|
// CHECK4-NORMAL-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
|
|
|
|
|
// CHECK4-NEXT: store float* [[A]], float** [[A_ADDR]], align 8
|
|
|
|
|
// CHECK4-NEXT: store float* [[B]], float** [[B_ADDR]], align 8
|
|
|
|
|
// CHECK4-NEXT: store float* [[C]], float** [[C_ADDR]], align 8
|
|
|
|
@ -1928,9 +2041,12 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK4-NEXT: store i32 4571423, i32* [[DOTOMP_UB]], align 4
|
|
|
|
|
// CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
|
|
|
|
|
// CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
|
|
|
|
|
// CHECK4-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 66, i32 0, i32 4571423, i32 1, i32 1)
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP0]], i32 66, i32 0, i32 4571423, i32 1, i32 1)
|
|
|
|
|
// CHECK4-NORMAL-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 66, i32 0, i32 4571423, i32 1, i32 1)
|
|
|
|
|
// CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
|
|
|
|
|
// CHECK4: omp.dispatch.cond:
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
|
|
|
|
|
// CHECK4-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
|
|
|
|
|
// CHECK4-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0
|
|
|
|
|
// CHECK4-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
|
|
|
|
@ -1948,6 +2064,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP5]], 7
|
|
|
|
|
// CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 32000000, [[MUL]]
|
|
|
|
|
// CHECK4-NEXT: store i32 [[SUB]], i32* [[I]], align 4
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK4-NEXT: call void @__kmpc_ordered(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK4-NEXT: [[TMP6:%.*]] = load float*, float** [[B_ADDR]], align 8
|
|
|
|
|
// CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4
|
|
|
|
@ -1979,6 +2096,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
|
|
|
|
|
// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], 1
|
|
|
|
|
// CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
|
|
|
|
|
// CHECK4-NEXT: call void @__kmpc_dispatch_fini_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
|
|
|
|
|
// CHECK4: omp.inner.for.end:
|
|
|
|
@ -1986,7 +2104,9 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK4: omp.dispatch.inc:
|
|
|
|
|
// CHECK4-NEXT: br label [[OMP_DISPATCH_COND]]
|
|
|
|
|
// CHECK4: omp.dispatch.end:
|
|
|
|
|
// CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP0]])
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP0]])
|
|
|
|
|
// CHECK4-NORMAL-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP0]])
|
|
|
|
|
// CHECK4-NEXT: ret void
|
|
|
|
|
//
|
|
|
|
|
//
|
|
|
|
@ -2004,7 +2124,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
|
|
|
|
|
// CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK4-NEXT: [[I:%.*]] = alloca i64, align 8
|
|
|
|
|
// CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK4-NORMAL-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK4-NEXT: store float* [[A]], float** [[A_ADDR]], align 8
|
|
|
|
|
// CHECK4-NEXT: store float* [[B]], float** [[B_ADDR]], align 8
|
|
|
|
|
// CHECK4-NEXT: store float* [[C]], float** [[C_ADDR]], align 8
|
|
|
|
@ -2013,9 +2133,11 @@ void foo_simd(int low, int up) {
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|
|
|
// CHECK4-NEXT: store i64 16908287, i64* [[DOTOMP_UB]], align 8
|
|
|
|
|
// CHECK4-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
|
|
|
|
|
// CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB6:[0-9]+]])
|
|
|
|
|
// CHECK4-NEXT: call void @__kmpc_dispatch_init_8u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 67, i64 0, i64 16908287, i64 1, i64 1)
|
|
|
|
|
// CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
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|
|
|
|
// CHECK4: omp.dispatch.cond:
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB6]])
|
|
|
|
|
// CHECK4-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_dispatch_next_8u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]])
|
|
|
|
|
// CHECK4-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0
|
|
|
|
|
// CHECK4-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
|
|
|
|
@ -2034,6 +2156,7 @@ void foo_simd(int low, int up) {
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|
|
// CHECK4-NEXT: [[MUL:%.*]] = mul i64 [[TMP5]], 127
|
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|
|
// CHECK4-NEXT: [[ADD1:%.*]] = add i64 131071, [[MUL]]
|
|
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|
|
// CHECK4-NEXT: store i64 [[ADD1]], i64* [[I]], align 8
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK4-NEXT: call void @__kmpc_ordered(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
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|
|
// CHECK4-NEXT: [[TMP6:%.*]] = load float*, float** [[B_ADDR]], align 8
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|
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|
|
// CHECK4-NEXT: [[TMP7:%.*]] = load i64, i64* [[I]], align 8
|
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|
|
@ -2061,6 +2184,7 @@ void foo_simd(int low, int up) {
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|
|
// CHECK4-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
|
|
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|
|
// CHECK4-NEXT: [[ADD7:%.*]] = add i64 [[TMP17]], 1
|
|
|
|
|
// CHECK4-NEXT: store i64 [[ADD7]], i64* [[DOTOMP_IV]], align 8
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB6]])
|
|
|
|
|
// CHECK4-NEXT: call void @__kmpc_dispatch_fini_8u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
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|
|
|
|
// CHECK4: omp.inner.for.end:
|
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|
|
@ -2068,7 +2192,9 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK4: omp.dispatch.inc:
|
|
|
|
|
// CHECK4-NEXT: br label [[OMP_DISPATCH_COND]]
|
|
|
|
|
// CHECK4: omp.dispatch.end:
|
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|
|
// CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]])
|
|
|
|
|
// CHECK4-NORMAL-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK4-NEXT: ret void
|
|
|
|
|
//
|
|
|
|
|
//
|
|
|
|
@ -2094,7 +2220,7 @@ void foo_simd(int low, int up) {
|
|
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|
|
// CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK4-NEXT: [[I8:%.*]] = alloca i8, align 1
|
|
|
|
|
// CHECK4-NEXT: [[X9:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK4-NORMAL-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK4-NEXT: store float* [[A]], float** [[A_ADDR]], align 8
|
|
|
|
|
// CHECK4-NEXT: store float* [[B]], float** [[B_ADDR]], align 8
|
|
|
|
|
// CHECK4-NEXT: store float* [[C]], float** [[C_ADDR]], align 8
|
|
|
|
@ -2127,9 +2253,11 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK4-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
|
|
|
|
|
// CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
|
|
|
|
|
// CHECK4-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_2]], align 8
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB8:[0-9]+]])
|
|
|
|
|
// CHECK4-NEXT: call void @__kmpc_dispatch_init_8(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 70, i64 0, i64 [[TMP6]], i64 1, i64 1)
|
|
|
|
|
// CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
|
|
|
|
|
// CHECK4: omp.dispatch.cond:
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB8]])
|
|
|
|
|
// CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_8(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]])
|
|
|
|
|
// CHECK4-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
|
|
|
|
|
// CHECK4-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
|
|
|
|
@ -2160,6 +2288,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK4-NEXT: [[SUB20:%.*]] = sub nsw i64 11, [[MUL19]]
|
|
|
|
|
// CHECK4-NEXT: [[CONV21:%.*]] = trunc i64 [[SUB20]] to i32
|
|
|
|
|
// CHECK4-NEXT: store i32 [[CONV21]], i32* [[X9]], align 4
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK4-NEXT: call void @__kmpc_ordered(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK4-NEXT: [[TMP15:%.*]] = load float*, float** [[B_ADDR]], align 8
|
|
|
|
|
// CHECK4-NEXT: [[TMP16:%.*]] = load i8, i8* [[I8]], align 1
|
|
|
|
@ -2191,6 +2320,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK4-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
|
|
|
|
|
// CHECK4-NEXT: [[ADD30:%.*]] = add nsw i64 [[TMP26]], 1
|
|
|
|
|
// CHECK4-NEXT: store i64 [[ADD30]], i64* [[DOTOMP_IV]], align 8
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB8]])
|
|
|
|
|
// CHECK4-NEXT: call void @__kmpc_dispatch_fini_8(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
|
|
|
|
|
// CHECK4: omp.inner.for.end:
|
|
|
|
@ -2200,7 +2330,9 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK4: omp.dispatch.end:
|
|
|
|
|
// CHECK4-NEXT: br label [[OMP_PRECOND_END]]
|
|
|
|
|
// CHECK4: omp.precond.end:
|
|
|
|
|
// CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]])
|
|
|
|
|
// CHECK4-NORMAL-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK4-NEXT: ret void
|
|
|
|
|
//
|
|
|
|
|
//
|
|
|
|
@ -2221,7 +2353,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK4-NEXT: [[I:%.*]] = alloca i8, align 1
|
|
|
|
|
// CHECK4-NEXT: [[X2:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK4-NORMAL-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK4-NEXT: store float* [[A]], float** [[A_ADDR]], align 8
|
|
|
|
|
// CHECK4-NEXT: store float* [[B]], float** [[B_ADDR]], align 8
|
|
|
|
|
// CHECK4-NEXT: store float* [[C]], float** [[C_ADDR]], align 8
|
|
|
|
@ -2231,9 +2363,11 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK4-NEXT: store i32 199, i32* [[DOTOMP_UB]], align 4
|
|
|
|
|
// CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
|
|
|
|
|
// CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB10:[0-9]+]])
|
|
|
|
|
// CHECK4-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 69, i32 0, i32 199, i32 1, i32 1)
|
|
|
|
|
// CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
|
|
|
|
|
// CHECK4: omp.dispatch.cond:
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB10]])
|
|
|
|
|
// CHECK4-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
|
|
|
|
|
// CHECK4-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0
|
|
|
|
|
// CHECK4-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
|
|
|
|
@ -2261,6 +2395,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK4-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
|
|
|
|
|
// CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 -10, [[MUL5]]
|
|
|
|
|
// CHECK4-NEXT: store i32 [[ADD6]], i32* [[X2]], align 4
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK4-NEXT: call void @__kmpc_ordered(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK4-NEXT: [[TMP8:%.*]] = load float*, float** [[B_ADDR]], align 8
|
|
|
|
|
// CHECK4-NEXT: [[TMP9:%.*]] = load i8, i8* [[I]], align 1
|
|
|
|
@ -2292,6 +2427,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
|
|
|
|
|
// CHECK4-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP19]], 1
|
|
|
|
|
// CHECK4-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV]], align 4
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB10]])
|
|
|
|
|
// CHECK4-NEXT: call void @__kmpc_dispatch_fini_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
|
|
|
|
|
// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
|
|
|
|
|
// CHECK4: omp.inner.for.end:
|
|
|
|
@ -2299,7 +2435,9 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK4: omp.dispatch.inc:
|
|
|
|
|
// CHECK4-NEXT: br label [[OMP_DISPATCH_COND]]
|
|
|
|
|
// CHECK4: omp.dispatch.end:
|
|
|
|
|
// CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]])
|
|
|
|
|
// CHECK4-NORMAL-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
|
|
|
|
|
// CHECK4-NEXT: ret void
|
|
|
|
|
//
|
|
|
|
|
//
|
|
|
|
@ -2326,7 +2464,7 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK4-NEXT: [[I28:%.*]] = alloca i32, align 4
|
|
|
|
|
// CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK4-NORMAL-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
|
|
|
|
|
// CHECK4-NEXT: store i32 [[LOW]], i32* [[LOW_ADDR]], align 4
|
|
|
|
|
// CHECK4-NEXT: store i32 [[UP]], i32* [[UP_ADDR]], align 4
|
|
|
|
|
// CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[LOW_ADDR]], align 4
|
|
|
|
@ -2413,9 +2551,11 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
|
|
|
|
|
// CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
|
|
|
|
|
// CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_20]], align 4
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB12:[0-9]+]])
|
|
|
|
|
// CHECK4-NEXT: call void @__kmpc_dispatch_init_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 66, i32 0, i32 [[TMP25]], i32 1, i32 1)
|
|
|
|
|
// CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
|
|
|
|
|
// CHECK4: omp.dispatch.cond:
|
|
|
|
|
// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB12]])
|
|
|
|
|
// CHECK4-NEXT: [[TMP26:%.*]] = call i32 @__kmpc_dispatch_next_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
|
|
|
|
|
// CHECK4-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP26]], 0
|
|
|
|
|
// CHECK4-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
|
|
|
|
@ -2423,13 +2563,15 @@ void foo_simd(int low, int up) {
|
|
|
|
|
// CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
|
|
|
|
|
// CHECK4-NEXT: store i32 [[TMP27]], i32* [[DOTOMP_IV16]], align 4
|
|
|
|
|
// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND29:%.*]]
|
|
|
|
|
// CHECK4: omp.inner.for.cond29:
|
|
|
|
|
// CHECK4-IRBUILDER: omp.inner.for.cond30:
|
|
|
|
|
// CHECK4-NORMAL: omp.inner.for.cond29:
|
|
|
|
|
// CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK4-NEXT: [[ADD30:%.*]] = add i32 [[TMP29]], 1
|
|
|
|
|
// CHECK4-NEXT: [[CMP31:%.*]] = icmp ult i32 [[TMP28]], [[ADD30]]
|
|
|
|
|
// CHECK4-NEXT: br i1 [[CMP31]], label [[OMP_INNER_FOR_BODY32:%.*]], label [[OMP_INNER_FOR_END40:%.*]]
|
|
|
|
|
// CHECK4: omp.inner.for.body32:
|
|
|
|
|
// CHECK4-IRBUILDER: omp.inner.for.body33:
|
|
|
|
|
// CHECK4-NORMAL: omp.inner.for.body32:
|
|
|
|
|
// CHECK4-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !7
|
|
|
|
|
// CHECK4-NEXT: [[MUL33:%.*]] = mul i32 [[TMP31]], 1
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@ -2441,15 +2583,19 @@ void foo_simd(int low, int up) {
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// CHECK4-NEXT: store float 0.000000e+00, float* [[ARRAYIDX36]], align 4, !llvm.access.group !7
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// CHECK4-NEXT: call void @__captured_stmt.1(i32* [[I28]]), !llvm.access.group !7
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// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE37:%.*]]
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// CHECK4: omp.body.continue37:
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// CHECK4-IRBUILDER: omp.body.continue38:
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// CHECK4-NORMAL: omp.body.continue37:
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// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC38:%.*]]
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// CHECK4: omp.inner.for.inc38:
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// CHECK4-IRBUILDER: omp.inner.for.inc39:
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// CHECK4-NORMAL: omp.inner.for.inc38:
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// CHECK4-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !7
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// CHECK4-NEXT: [[ADD39:%.*]] = add i32 [[TMP33]], 1
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// CHECK4-NEXT: store i32 [[ADD39]], i32* [[DOTOMP_IV16]], align 4, !llvm.access.group !7
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// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB12]])
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// CHECK4-NEXT: call void @__kmpc_dispatch_fini_4u(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]), !llvm.access.group !7
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// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND29]], !llvm.loop [[LOOP8:![0-9]+]]
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// CHECK4: omp.inner.for.end40:
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// CHECK4-IRBUILDER: omp.inner.for.end42:
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// CHECK4-NORMAL: omp.inner.for.end40:
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// CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
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// CHECK4: omp.dispatch.inc:
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// CHECK4-NEXT: br label [[OMP_DISPATCH_COND]]
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@ -2472,7 +2618,9 @@ void foo_simd(int low, int up) {
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// CHECK4: .omp.final.done:
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// CHECK4-NEXT: br label [[OMP_PRECOND_END]]
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// CHECK4: omp.precond.end:
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// CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
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// CHECK4-IRBUILDER-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
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// CHECK4-IRBUILDER-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]])
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// CHECK4-NORMAL-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
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// CHECK4-NEXT: ret void
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//
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//
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