forked from OSchip/llvm-project
Revert patch. Forgot a dependent commit.
llvm-svn: 137875
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@ -1814,45 +1814,6 @@ void SelectionDAGBuilder::visitResume(const ResumeInst &RI) {
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llvm_unreachable("SelectionDAGBuilder shouldn't visit resume instructions!");
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}
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void SelectionDAGBuilder::visitLandingPad(const LandingPadInst &LP) {
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assert(FuncInfo.MBB->isLandingPad() &&
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"Call to landingpad not in landing pad!");
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MachineBasicBlock *MBB = FuncInfo.MBB;
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MachineModuleInfo &MMI = DAG.getMachineFunction().getMMI();
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AddLandingPadInfo(LP, MMI, MBB);
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SmallVector<EVT, 2> ValueVTs;
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ComputeValueVTs(TLI, LP.getType(), ValueVTs);
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// Insert the EXCEPTIONADDR instruction.
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assert(FuncInfo.MBB->isLandingPad() &&
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"Call to eh.exception not in landing pad!");
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SDVTList VTs = DAG.getVTList(TLI.getPointerTy(), MVT::Other);
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SDValue Ops[2];
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Ops[0] = DAG.getRoot();
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SDValue Op1 = DAG.getNode(ISD::EXCEPTIONADDR, getCurDebugLoc(), VTs, Ops, 1);
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SDValue Chain = Op1.getValue(1);
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// Insert the EHSELECTION instruction.
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VTs = DAG.getVTList(TLI.getPointerTy(), MVT::Other);
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Ops[0] = Op1;
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Ops[1] = Chain;
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SDValue Op2 = DAG.getNode(ISD::EHSELECTION, getCurDebugLoc(), VTs, Ops, 2);
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Chain = Op2.getValue(1);
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Op2 = DAG.getSExtOrTrunc(Op2, getCurDebugLoc(), MVT::i32);
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Ops[0] = Op1;
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Ops[1] = Op2;
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SDValue Res = DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(),
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DAG.getVTList(&ValueVTs[0], ValueVTs.size()),
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&Ops[0], 2);
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std::pair<SDValue, SDValue> RetPair = std::make_pair(Res, Chain);
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setValue(&LP, RetPair.first);
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DAG.setRoot(RetPair.second);
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}
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/// handleSmallSwitchCaseRange - Emit a series of specific tests (suitable for
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/// small case ranges).
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bool SelectionDAGBuilder::handleSmallSwitchRange(CaseRec& CR,
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@ -3024,6 +2985,9 @@ void SelectionDAGBuilder::visitExtractValue(const ExtractValueInst &I) {
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&Values[0], NumValValues));
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}
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void SelectionDAGBuilder::visitLandingPad(const LandingPadInst &I) {
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}
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void SelectionDAGBuilder::visitGetElementPtr(const User &I) {
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SDValue N = getValue(I.getOperand(0));
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Type *Ty = I.getOperand(0)->getType();
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