forked from OSchip/llvm-project
[asan] Implemented flag to emit intrinsics to optimize ASan callbacks.
Reviewed By: vitalybuka Differential Revision: https://reviews.llvm.org/D108377
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2e83a0efb9
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a3f4139626
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@ -356,6 +356,10 @@ static cl::opt<uint64_t>
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static cl::opt<bool> ClOpt("asan-opt", cl::desc("Optimize instrumentation"),
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cl::Hidden, cl::init(true));
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static cl::opt<bool> ClOptimizeCallbacks("asan-optimize-callbacks",
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cl::desc("Optimize callbacks"),
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cl::Hidden, cl::init(false));
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static cl::opt<bool> ClOptSameTemp(
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"asan-opt-same-temp", cl::desc("Instrument the same temp just once"),
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cl::Hidden, cl::init(true));
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@ -657,6 +661,8 @@ struct AddressSanitizer {
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C = &(M.getContext());
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LongSize = M.getDataLayout().getPointerSizeInBits();
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IntptrTy = Type::getIntNTy(*C, LongSize);
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Int8PtrTy = Type::getInt8PtrTy(*C);
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Int32Ty = Type::getInt32Ty(*C);
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TargetTriple = Triple(M.getTargetTriple());
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Mapping = getShadowMapping(TargetTriple, LongSize, this->CompileKernel);
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@ -747,6 +753,8 @@ private:
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bool UseAfterScope;
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AsanDetectStackUseAfterReturnMode UseAfterReturn;
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Type *IntptrTy;
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Type *Int8PtrTy;
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Type *Int32Ty;
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ShadowMapping Mapping;
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FunctionCallee AsanHandleNoReturnFunc;
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FunctionCallee AsanPtrCmpFunction, AsanPtrSubFunction;
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@ -1766,9 +1774,20 @@ void AddressSanitizer::instrumentAddress(Instruction *OrigIns,
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}
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IRBuilder<> IRB(InsertBefore);
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Value *AddrLong = IRB.CreatePointerCast(Addr, IntptrTy);
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size_t AccessSizeIndex = TypeSizeToSizeIndex(TypeSize);
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const ASanAccessInfo AccessInfo(IsWrite, CompileKernel, AccessSizeIndex);
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if (UseCalls && ClOptimizeCallbacks) {
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const ASanAccessInfo AccessInfo(IsWrite, CompileKernel, AccessSizeIndex);
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Module *M = IRB.GetInsertBlock()->getParent()->getParent();
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IRB.CreateCall(
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Intrinsic::getDeclaration(M, Intrinsic::asan_check_memaccess),
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{IRB.CreatePointerCast(Addr, Int8PtrTy),
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ConstantInt::get(Int32Ty, AccessInfo.Packed)});
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return;
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}
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Value *AddrLong = IRB.CreatePointerCast(Addr, IntptrTy);
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if (UseCalls) {
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if (Exp == 0)
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IRB.CreateCall(AsanMemoryAccessCallback[IsWrite][0][AccessSizeIndex],
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@ -0,0 +1,86 @@
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; RUN: opt < %s -asan -enable-new-pm=0 -asan-instrumentation-with-call-threshold=0 \
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; RUN: -asan-optimize-callbacks -S | FileCheck %s --check-prefixes=LOAD,STORE
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; RUN: opt < %s -asan -enable-new-pm=0 -asan-instrumentation-with-call-threshold=0 \
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; RUN: -asan-optimize-callbacks --asan-kernel -S | \
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; RUN: FileCheck %s --check-prefixes=LOAD-KERNEL,STORE-KERNEL
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target triple = "x86_64-unknown-linux-gnu"
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define void @load(i8* %p1, i16* %p2, i32* %p4, i64* %p8, i128* %p16)
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sanitize_address {
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%n1 = load i8, i8* %p1, align 1
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%n2 = load i16, i16* %p2, align 2
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%n4 = load i32, i32* %p4, align 4
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%n8 = load i64, i64* %p8, align 8
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%n16 = load i128, i128* %p16, align 16
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; LOAD: call void @llvm.asan.check.memaccess(i8* %p1, i32 0)
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; LOAD-NEXT: %n1 = load i8, i8* %p1, align 1
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; LOAD-NEXT: %1 = bitcast i16* %p2 to i8*
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; LOAD-NEXT: call void @llvm.asan.check.memaccess(i8* %1, i32 2)
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; LOAD-NEXT: %n2 = load i16, i16* %p2, align 2
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; LOAD-NEXT: %2 = bitcast i32* %p4 to i8*
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; LOAD-NEXT: call void @llvm.asan.check.memaccess(i8* %2, i32 4)
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; LOAD-NEXT: %n4 = load i32, i32* %p4, align 4
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; LOAD-NEXT: %3 = bitcast i64* %p8 to i8*
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; LOAD-NEXT: call void @llvm.asan.check.memaccess(i8* %3, i32 6)
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; LOAD-NEXT: %n8 = load i64, i64* %p8, align 8
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; LOAD-NEXT: %4 = bitcast i128* %p16 to i8*
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; LOAD-NEXT: call void @llvm.asan.check.memaccess(i8* %4, i32 8)
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; LOAD-NEXT: %n16 = load i128, i128* %p16, align 16
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; LOAD-KERNEL: call void @llvm.asan.check.memaccess(i8* %p1, i32 1)
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; LOAD-KERNEL-NEXT: %n1 = load i8, i8* %p1, align 1
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; LOAD-KERNEL-NEXT: %1 = bitcast i16* %p2 to i8*
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; LOAD-KERNEL-NEXT: call void @llvm.asan.check.memaccess(i8* %1, i32 3)
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; LOAD-KERNEL-NEXT: %n2 = load i16, i16* %p2, align 2
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; LOAD-KERNEL-NEXT: %2 = bitcast i32* %p4 to i8*
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; LOAD-KERNEL-NEXT: call void @llvm.asan.check.memaccess(i8* %2, i32 5)
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; LOAD-KERNEL-NEXT: %n4 = load i32, i32* %p4, align 4
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; LOAD-KERNEL-NEXT: %3 = bitcast i64* %p8 to i8*
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; LOAD-KERNEL-NEXT: call void @llvm.asan.check.memaccess(i8* %3, i32 7)
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; LOAD-KERNEL-NEXT: %n8 = load i64, i64* %p8, align 8
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; LOAD-KERNEL-NEXT: %4 = bitcast i128* %p16 to i8*
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; LOAD-KERNEL-NEXT: call void @llvm.asan.check.memaccess(i8* %4, i32 9)
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; LOAD-KERNEL-NEXT: %n16 = load i128, i128* %p16, align 16
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ret void
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}
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define void @store(i8* %p1, i16* %p2, i32* %p4, i64* %p8, i128* %p16)
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sanitize_address {
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store i8 0, i8* %p1, align 1
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store i16 0, i16* %p2, align 2
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store i32 0, i32* %p4, align 4
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store i64 0, i64* %p8, align 8
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store i128 0, i128* %p16, align 16
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; STORE: call void @llvm.asan.check.memaccess(i8* %p1, i32 32)
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; STORE-NEXT: store i8 0, i8* %p1, align 1
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; STORE-NEXT: %1 = bitcast i16* %p2 to i8*
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; STORE-NEXT: call void @llvm.asan.check.memaccess(i8* %1, i32 34)
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; STORE-NEXT: store i16 0, i16* %p2, align 2
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; STORE-NEXT: %2 = bitcast i32* %p4 to i8*
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; STORE-NEXT: call void @llvm.asan.check.memaccess(i8* %2, i32 36)
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; STORE-NEXT: store i32 0, i32* %p4, align 4
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; STORE-NEXT: %3 = bitcast i64* %p8 to i8*
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; STORE-NEXT: call void @llvm.asan.check.memaccess(i8* %3, i32 38)
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; STORE-NEXT: store i64 0, i64* %p8, align 8
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; STORE-NEXT: %4 = bitcast i128* %p16 to i8*
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; STORE-NEXT: call void @llvm.asan.check.memaccess(i8* %4, i32 40)
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; STORE-NEXT: store i128 0, i128* %p16, align 16
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; STORE-KERNEL: call void @llvm.asan.check.memaccess(i8* %p1, i32 33)
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; STORE-KERNEL-NEXT: store i8 0, i8* %p1, align 1
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; STORE-KERNEL-NEXT: %1 = bitcast i16* %p2 to i8*
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; STORE-KERNEL-NEXT: call void @llvm.asan.check.memaccess(i8* %1, i32 35)
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; STORE-KERNEL-NEXT: store i16 0, i16* %p2, align 2
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; STORE-KERNEL-NEXT: %2 = bitcast i32* %p4 to i8*
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; STORE-KERNEL-NEXT: call void @llvm.asan.check.memaccess(i8* %2, i32 37)
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; STORE-KERNEL-NEXT: store i32 0, i32* %p4, align 4
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; STORE-KERNEL-NEXT: %3 = bitcast i64* %p8 to i8*
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; STORE-KERNEL-NEXT: call void @llvm.asan.check.memaccess(i8* %3, i32 39)
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; STORE-KERNEL-NEXT: store i64 0, i64* %p8, align 8
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; STORE-KERNEL-NEXT: %4 = bitcast i128* %p16 to i8*
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; STORE-KERNEL-NEXT: call void @llvm.asan.check.memaccess(i8* %4, i32 41)
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; STORE-KERNEL-NEXT: store i128 0, i128* %p16, align 16
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; STORE-KERNEL-NEXT: ret void
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ret void
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}
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