forked from OSchip/llvm-project
[X86] Add FXSR intrinsics
Add intrinsics for the FXSR instructions (FXSAVE/FXSAVE64/FXRSTOR/FXRSTOR64) These were previously declared in Intrin.h for MSVC compatibility, but now that we have them implemented, these declarations can be removed. llvm-svn: 241053
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@ -656,6 +656,12 @@ BUILTIN(__builtin_ia32_wrfsbase64, "vULLi", "")
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BUILTIN(__builtin_ia32_wrgsbase32, "vUi", "")
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BUILTIN(__builtin_ia32_wrgsbase32, "vUi", "")
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BUILTIN(__builtin_ia32_wrgsbase64, "vULLi", "")
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BUILTIN(__builtin_ia32_wrgsbase64, "vULLi", "")
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// FXSR
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BUILTIN(__builtin_ia32_fxrstor, "vv*", "")
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BUILTIN(__builtin_ia32_fxrstor64, "vv*", "")
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BUILTIN(__builtin_ia32_fxsave, "vv*", "")
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BUILTIN(__builtin_ia32_fxsave64, "vv*", "")
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// ADX
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// ADX
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BUILTIN(__builtin_ia32_addcarryx_u32, "UcUcUiUiUi*", "")
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BUILTIN(__builtin_ia32_addcarryx_u32, "UcUcUiUiUi*", "")
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BUILTIN(__builtin_ia32_addcarryx_u64, "UcUcULLiULLiULLi*", "")
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BUILTIN(__builtin_ia32_addcarryx_u64, "UcUcULLiULLiULLi*", "")
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@ -22,6 +22,7 @@ set(files
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float.h
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float.h
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fma4intrin.h
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fma4intrin.h
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fmaintrin.h
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fmaintrin.h
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fxsrintrin.h
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htmintrin.h
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htmintrin.h
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htmxlintrin.h
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htmxlintrin.h
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ia32intrin.h
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ia32intrin.h
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@ -180,8 +180,6 @@ unsigned long __cdecl _byteswap_ulong(unsigned long);
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unsigned short __cdecl _byteswap_ushort(unsigned short);
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unsigned short __cdecl _byteswap_ushort(unsigned short);
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void __cdecl _disable(void);
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void __cdecl _disable(void);
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void __cdecl _enable(void);
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void __cdecl _enable(void);
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void __cdecl _fxrstor(void const *);
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void __cdecl _fxsave(void *);
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long _InterlockedAddLargeStatistic(__int64 volatile *_Addend, long _Value);
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long _InterlockedAddLargeStatistic(__int64 volatile *_Addend, long _Value);
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static __inline__
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static __inline__
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long _InterlockedAnd(long volatile *_Value, long _Mask);
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long _InterlockedAnd(long volatile *_Value, long _Mask);
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@ -358,8 +356,6 @@ unsigned char _bittestandreset64(__int64 *, __int64);
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static __inline__
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static __inline__
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unsigned char _bittestandset64(__int64 *, __int64);
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unsigned char _bittestandset64(__int64 *, __int64);
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unsigned __int64 __cdecl _byteswap_uint64(unsigned __int64);
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unsigned __int64 __cdecl _byteswap_uint64(unsigned __int64);
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void __cdecl _fxrstor64(void const *);
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void __cdecl _fxsave64(void *);
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long _InterlockedAnd_np(long volatile *_Value, long _Mask);
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long _InterlockedAnd_np(long volatile *_Value, long _Mask);
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short _InterlockedAnd16_np(short volatile *_Value, short _Mask);
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short _InterlockedAnd16_np(short volatile *_Value, short _Mask);
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__int64 _InterlockedAnd64_np(__int64 volatile *_Value, __int64 _Mask);
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__int64 _InterlockedAnd64_np(__int64 volatile *_Value, __int64 _Mask);
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@ -0,0 +1,53 @@
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/*===---- fxsrintrin.h - FXSR intrinsic ------------------------------------===
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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*===-----------------------------------------------------------------------===
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*/
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#ifndef __IMMINTRIN_H
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#error "Never use <fxsrintrin.h> directly; include <immintrin.h> instead."
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#endif
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#ifndef __FXSRINTRIN_H
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#define __FXSRINTRIN_H
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#define DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
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static __inline__ void DEFAULT_FN_ATTRS
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_fxsave(void *__p) {
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return __builtin_ia32_fxsave(__p);
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}
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static __inline__ void DEFAULT_FN_ATTRS
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_fxsave64(void *__p) {
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return __builtin_ia32_fxsave64(__p);
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}
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static __inline__ void DEFAULT_FN_ATTRS
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_fxrstor(void *__p) {
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return __builtin_ia32_fxrstor(__p);
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}
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static __inline__ void DEFAULT_FN_ATTRS
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_fxrstor64(void *__p) {
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return __builtin_ia32_fxrstor64(__p);
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}
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#endif
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@ -142,6 +142,8 @@ _writegsbase_u64(unsigned long long __V)
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#include <shaintrin.h>
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#include <shaintrin.h>
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#include <fxsrintrin.h>
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/* Some intrinsics inside adxintrin.h are available only on processors with ADX,
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/* Some intrinsics inside adxintrin.h are available only on processors with ADX,
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* whereas others are also available at all times. */
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* whereas others are also available at all times. */
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#include <adxintrin.h>
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#include <adxintrin.h>
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@ -260,6 +260,10 @@ void f0() {
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(void) __builtin_ia32_ldmxcsr(tmp_Ui);
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(void) __builtin_ia32_ldmxcsr(tmp_Ui);
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tmp_Ui = __builtin_ia32_stmxcsr();
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tmp_Ui = __builtin_ia32_stmxcsr();
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(void)__builtin_ia32_fxsave(tmp_vp);
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(void)__builtin_ia32_fxsave64(tmp_vp);
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(void)__builtin_ia32_fxrstor(tmp_vp);
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(void)__builtin_ia32_fxrstor64(tmp_vp);
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tmp_V4f = __builtin_ia32_cvtpi2ps(tmp_V4f, tmp_V2i);
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tmp_V4f = __builtin_ia32_cvtpi2ps(tmp_V4f, tmp_V2i);
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tmp_V2i = __builtin_ia32_cvtps2pi(tmp_V4f);
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tmp_V2i = __builtin_ia32_cvtps2pi(tmp_V4f);
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tmp_i = __builtin_ia32_cvtss2si(tmp_V4f);
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tmp_i = __builtin_ia32_cvtss2si(tmp_V4f);
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