forked from OSchip/llvm-project
[WebAssembly][NFC] Move SIMD encoding tests to dedicated file
Summary: This change makes the tests more focused and avoids problematic interactions between the testing modes and instruction encoding. This change also allows the other tests to use less verbose output and stricter checks. Reviewers: aheejin, dschuff, aardappel Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52007 llvm-svn: 342287
This commit is contained in:
Thomas Lively
parent
08e522a0f5
commit
a3937b231d
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@ -1,9 +1,9 @@
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; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -wasm-enable-unimplemented-simd -mattr=+simd128 --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128
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; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -wasm-enable-unimplemented-simd -mattr=+simd128 -fast-isel --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128
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; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128-VM
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; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 -fast-isel --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128-VM
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; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-simd128 --show-mc-encoding | FileCheck %s --check-prefixes CHECK,NO-SIMD128
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; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-simd128 -fast-isel --show-mc-encoding | FileCheck %s --check-prefixes CHECK,NO-SIMD128
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; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -wasm-enable-unimplemented-simd -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
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; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -wasm-enable-unimplemented-simd -mattr=+simd128 -fast-isel | FileCheck %s --check-prefixes CHECK,SIMD128
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; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128-VM
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; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 -fast-isel | FileCheck %s --check-prefixes CHECK,SIMD128-VM
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; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-simd128 | FileCheck %s --check-prefixes CHECK,NO-SIMD128
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; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-simd128 -fast-isel | FileCheck %s --check-prefixes CHECK,NO-SIMD128
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; Test that basic SIMD128 arithmetic operations assemble as expected.
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@ -13,78 +13,78 @@ target triple = "wasm32-unknown-unknown"
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; ==============================================================================
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; 16 x i8
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; ==============================================================================
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; CHECK-LABEL: add_v16i8
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; CHECK-LABEL: add_v16i8:
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; NO-SIMD128-NOT: i8x16
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; SIMD128: .param v128, v128{{$}}
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; SIMD128: .result v128{{$}}
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; SIMD128: i8x16.add $push0=, $0, $1 # encoding: [0xfd,0x18]{{$}}
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; SIMD128: return $pop0 #
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; SIMD128-NEXT: .param v128, v128{{$}}
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; SIMD128-NEXT: .result v128{{$}}
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; SIMD128-NEXT: i8x16.add $push0=, $0, $1{{$}}
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; SIMD128-NEXT: return $pop0{{$}}
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define <16 x i8> @add_v16i8(<16 x i8> %x, <16 x i8> %y) {
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%a = add <16 x i8> %x, %y
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ret <16 x i8> %a
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}
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; CHECK-LABEL: sub_v16i8
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; CHECK-LABEL: sub_v16i8:
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; NO-SIMD128-NOT: i8x16
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; SIMD128: .param v128, v128{{$}}
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; SIMD128: .result v128{{$}}
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; SIMD128: i8x16.sub $push0=, $0, $1 # encoding: [0xfd,0x1c]{{$}}
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; SIMD128: return $pop0 #
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; SIMD128-NEXT: .param v128, v128{{$}}
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; SIMD128-NEXT: .result v128{{$}}
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; SIMD128-NEXT: i8x16.sub $push0=, $0, $1{{$}}
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; SIMD128-NEXT: return $pop0{{$}}
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define <16 x i8> @sub_v16i8(<16 x i8> %x, <16 x i8> %y) {
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%a = sub <16 x i8> %x, %y
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ret <16 x i8> %a
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}
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; CHECK-LABEL: mul_v16i8
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; CHECK-LABEL: mul_v16i8:
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; NO-SIMD128-NOT: i8x16
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; SIMD128: .param v128, v128{{$}}
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; SIMD128: .result v128{{$}}
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; SIMD128: i8x16.mul $push0=, $0, $1 # encoding: [0xfd,0x20]{{$}}
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; SIMD128: return $pop0 #
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; SIMD128-NEXT: .param v128, v128{{$}}
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; SIMD128-NEXT: .result v128{{$}}
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; SIMD128-NEXT: i8x16.mul $push0=, $0, $1{{$}}
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; SIMD128-NEXT: return $pop0{{$}}
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define <16 x i8> @mul_v16i8(<16 x i8> %x, <16 x i8> %y) {
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%a = mul <16 x i8> %x, %y
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ret <16 x i8> %a
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}
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; CHECK-LABEL: and_v16i8
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; CHECK-LABEL: and_v16i8:
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; NO-SIMD128-NOT: v128
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; SIMD128: .param v128, v128{{$}}
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; SIMD128: .result v128{{$}}
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; SIMD128: v128.and $push0=, $0, $1 # encoding: [0xfd,0x3b]{{$}}
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; SIMD128: return $pop0 #
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; SIMD128-NEXT: .param v128, v128{{$}}
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; SIMD128-NEXT: .result v128{{$}}
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; SIMD128-NEXT: v128.and $push0=, $0, $1{{$}}
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; SIMD128-NEXT: return $pop0{{$}}
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define <16 x i8> @and_v16i8(<16 x i8> %x, <16 x i8> %y) {
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%a = and <16 x i8> %x, %y
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ret <16 x i8> %a
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}
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; CHECK-LABEL: or_v16i8
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; CHECK-LABEL: or_v16i8:
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; NO-SIMD128-NOT: v128
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; SIMD128: .param v128, v128{{$}}
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; SIMD128: .result v128{{$}}
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; SIMD128: v128.or $push0=, $0, $1 # encoding: [0xfd,0x3c]{{$}}
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; SIMD128: return $pop0 #
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; SIMD128-NEXT: .param v128, v128{{$}}
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; SIMD128-NEXT: .result v128{{$}}
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; SIMD128-NEXT: v128.or $push0=, $0, $1{{$}}
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; SIMD128-NEXT: return $pop0{{$}}
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define <16 x i8> @or_v16i8(<16 x i8> %x, <16 x i8> %y) {
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%a = or <16 x i8> %x, %y
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ret <16 x i8> %a
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}
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; CHECK-LABEL: xor_v16i8
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; CHECK-LABEL: xor_v16i8:
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; NO-SIMD128-NOT: v128
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; SIMD128: .param v128, v128{{$}}
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; SIMD128: .result v128{{$}}
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; SIMD128: v128.xor $push0=, $0, $1 # encoding: [0xfd,0x3d]{{$}}
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; SIMD128: return $pop0 #
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; SIMD128-NEXT: .param v128, v128{{$}}
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; SIMD128-NEXT: .result v128{{$}}
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; SIMD128-NEXT: v128.xor $push0=, $0, $1{{$}}
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; SIMD128-NEXT: return $pop0{{$}}
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define <16 x i8> @xor_v16i8(<16 x i8> %x, <16 x i8> %y) {
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%a = xor <16 x i8> %x, %y
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ret <16 x i8> %a
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}
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; CHECK-LABEL: not_v16i8
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; CHECK-LABEL: not_v16i8:
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; NO-SIMD128-NOT: v128
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; SIMD128: .param v128{{$}}
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; SIMD128: .result v128{{$}}
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; SIMD128: v128.not $push0=, $0 # encoding: [0xfd,0x3e]{{$}}
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; SIMD128: return $pop0 #
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; SIMD128-NEXT: .param v128{{$}}
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; SIMD128-NEXT: .result v128{{$}}
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; SIMD128-NEXT: v128.not $push0=, $0{{$}}
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; SIMD128-NEXT: return $pop0{{$}}
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define <16 x i8> @not_v16i8(<16 x i8> %x) {
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%a = xor <16 x i8> %x, <i8 -1, i8 -1, i8 -1, i8 -1,
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i8 -1, i8 -1, i8 -1, i8 -1,
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@ -96,78 +96,78 @@ define <16 x i8> @not_v16i8(<16 x i8> %x) {
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; ==============================================================================
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; 8 x i16
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; ==============================================================================
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; CHECK-LABEL: add_v8i16
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; CHECK-LABEL: add_v8i16:
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; NO-SIMD128-NOT: i16x8
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; SIMD128: .param v128, v128{{$}}
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; SIMD128: .result v128{{$}}
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; SIMD128: i16x8.add $push0=, $0, $1 # encoding: [0xfd,0x19]{{$}}
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; SIMD128: return $pop0 #
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; SIMD128-NEXT: .param v128, v128{{$}}
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; SIMD128-NEXT: .result v128{{$}}
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; SIMD128-NEXT: i16x8.add $push0=, $0, $1{{$}}
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; SIMD128-NEXT: return $pop0{{$}}
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define <8 x i16> @add_v8i16(<8 x i16> %x, <8 x i16> %y) {
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%a = add <8 x i16> %x, %y
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ret <8 x i16> %a
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}
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; CHECK-LABEL: sub_v8i16
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; CHECK-LABEL: sub_v8i16:
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; NO-SIMD128-NOT: i16x8
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; SIMD128: .param v128, v128{{$}}
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; SIMD128: .result v128{{$}}
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; SIMD128: i16x8.sub $push0=, $0, $1 # encoding: [0xfd,0x1d]{{$}}
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; SIMD128: return $pop0 #
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; SIMD128-NEXT: .param v128, v128{{$}}
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; SIMD128-NEXT: .result v128{{$}}
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; SIMD128-NEXT: i16x8.sub $push0=, $0, $1{{$}}
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; SIMD128-NEXT: return $pop0{{$}}
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define <8 x i16> @sub_v8i16(<8 x i16> %x, <8 x i16> %y) {
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%a = sub <8 x i16> %x, %y
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ret <8 x i16> %a
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}
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; CHECK-LABEL: mul_v8i16
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; CHECK-LABEL: mul_v8i16:
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; NO-SIMD128-NOT: i16x8
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; SIMD128: .param v128, v128{{$}}
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; SIMD128: .result v128{{$}}
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; SIMD128: i16x8.mul $push0=, $0, $1 # encoding: [0xfd,0x21]{{$}}
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; SIMD128: return $pop0 #
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; SIMD128-NEXT: .param v128, v128{{$}}
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; SIMD128-NEXT: .result v128{{$}}
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; SIMD128-NEXT: i16x8.mul $push0=, $0, $1{{$}}
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; SIMD128-NEXT: return $pop0{{$}}
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define <8 x i16> @mul_v8i16(<8 x i16> %x, <8 x i16> %y) {
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%a = mul <8 x i16> %x, %y
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ret <8 x i16> %a
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}
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; CHECK-LABEL: and_v8i16
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; CHECK-LABEL: and_v8i16:
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; NO-SIMD128-NOT: v128
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; SIMD128: .param v128, v128{{$}}
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; SIMD128: .result v128{{$}}
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; SIMD128: v128.and $push0=, $0, $1 # encoding: [0xfd,0x3b]{{$}}
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; SIMD128: return $pop0 #
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; SIMD128-NEXT: .param v128, v128{{$}}
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; SIMD128-NEXT: .result v128{{$}}
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; SIMD128-NEXT: v128.and $push0=, $0, $1{{$}}
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; SIMD128-NEXT: return $pop0{{$}}
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define <8 x i16> @and_v8i16(<8 x i16> %x, <8 x i16> %y) {
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%a = and <8 x i16> %x, %y
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ret <8 x i16> %a
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}
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; CHECK-LABEL: or_v8i16
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; CHECK-LABEL: or_v8i16:
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; NO-SIMD128-NOT: v128
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; SIMD128: .param v128, v128{{$}}
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; SIMD128: .result v128{{$}}
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; SIMD128: v128.or $push0=, $0, $1 # encoding: [0xfd,0x3c]{{$}}
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; SIMD128: return $pop0 #
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; SIMD128-NEXT: .param v128, v128{{$}}
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; SIMD128-NEXT: .result v128{{$}}
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; SIMD128-NEXT: v128.or $push0=, $0, $1{{$}}
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; SIMD128-NEXT: return $pop0{{$}}
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define <8 x i16> @or_v8i16(<8 x i16> %x, <8 x i16> %y) {
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%a = or <8 x i16> %x, %y
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ret <8 x i16> %a
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}
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; CHECK-LABEL: xor_v8i16
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; CHECK-LABEL: xor_v8i16:
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; NO-SIMD128-NOT: v128
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; SIMD128: .param v128, v128{{$}}
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; SIMD128: .result v128{{$}}
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; SIMD128: v128.xor $push0=, $0, $1 # encoding: [0xfd,0x3d]{{$}}
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; SIMD128: return $pop0 #
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; SIMD128-NEXT: .param v128, v128{{$}}
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; SIMD128-NEXT: .result v128{{$}}
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; SIMD128-NEXT: v128.xor $push0=, $0, $1{{$}}
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; SIMD128-NEXT: return $pop0{{$}}
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define <8 x i16> @xor_v8i16(<8 x i16> %x, <8 x i16> %y) {
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%a = xor <8 x i16> %x, %y
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ret <8 x i16> %a
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}
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; CHECK-LABEL: not_v8i16
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; CHECK-LABEL: not_v8i16:
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; NO-SIMD128-NOT: v128
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; SIMD128: .param v128{{$}}
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; SIMD128: .result v128{{$}}
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; SIMD128: v128.not $push0=, $0 # encoding: [0xfd,0x3e]{{$}}
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; SIMD128: return $pop0 #
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; SIMD128-NEXT: .param v128{{$}}
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; SIMD128-NEXT: .result v128{{$}}
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; SIMD128-NEXT: v128.not $push0=, $0{{$}}
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; SIMD128-NEXT: return $pop0{{$}}
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define <8 x i16> @not_v8i16(<8 x i16> %x) {
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%a = xor <8 x i16> %x, <i16 -1, i16 -1, i16 -1, i16 -1,
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i16 -1, i16 -1, i16 -1, i16 -1>
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@ -177,78 +177,78 @@ define <8 x i16> @not_v8i16(<8 x i16> %x) {
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; ==============================================================================
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; 4 x i32
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; ==============================================================================
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; CHECK-LABEL: add_v4i32
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; CHECK-LABEL: add_v4i32:
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; NO-SIMD128-NOT: i32x4
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; SIMD128: .param v128, v128{{$}}
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; SIMD128: .result v128{{$}}
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; SIMD128: i32x4.add $push0=, $0, $1 # encoding: [0xfd,0x1a]{{$}}
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; SIMD128: return $pop0 #
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; SIMD128-NEXT: .param v128, v128{{$}}
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; SIMD128-NEXT: .result v128{{$}}
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; SIMD128-NEXT: i32x4.add $push0=, $0, $1{{$}}
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; SIMD128-NEXT: return $pop0{{$}}
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define <4 x i32> @add_v4i32(<4 x i32> %x, <4 x i32> %y) {
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%a = add <4 x i32> %x, %y
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ret <4 x i32> %a
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}
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; CHECK-LABEL: sub_v4i32
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; CHECK-LABEL: sub_v4i32:
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; NO-SIMD128-NOT: i32x4
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; SIMD128: .param v128, v128{{$}}
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; SIMD128: .result v128{{$}}
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; SIMD128: i32x4.sub $push0=, $0, $1 # encoding: [0xfd,0x1e]{{$}}
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; SIMD128: return $pop0 #
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; SIMD128-NEXT: .param v128, v128{{$}}
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; SIMD128-NEXT: .result v128{{$}}
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; SIMD128-NEXT: i32x4.sub $push0=, $0, $1{{$}}
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; SIMD128-NEXT: return $pop0{{$}}
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define <4 x i32> @sub_v4i32(<4 x i32> %x, <4 x i32> %y) {
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%a = sub <4 x i32> %x, %y
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ret <4 x i32> %a
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}
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; CHECK-LABEL: mul_v4i32
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; CHECK-LABEL: mul_v4i32:
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; NO-SIMD128-NOT: i32x4
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; SIMD128: .param v128, v128{{$}}
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; SIMD128: .result v128{{$}}
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; SIMD128: i32x4.mul $push0=, $0, $1 # encoding: [0xfd,0x22]{{$}}
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; SIMD128: return $pop0 #
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; SIMD128-NEXT: .param v128, v128{{$}}
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; SIMD128-NEXT: .result v128{{$}}
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; SIMD128-NEXT: i32x4.mul $push0=, $0, $1{{$}}
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; SIMD128-NEXT: return $pop0{{$}}
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define <4 x i32> @mul_v4i32(<4 x i32> %x, <4 x i32> %y) {
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%a = mul <4 x i32> %x, %y
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ret <4 x i32> %a
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}
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; CHECK-LABEL: and_v4i32
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; CHECK-LABEL: and_v4i32:
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; NO-SIMD128-NOT: v128
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; SIMD128: .param v128, v128{{$}}
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; SIMD128: .result v128{{$}}
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; SIMD128: v128.and $push0=, $0, $1 # encoding: [0xfd,0x3b]{{$}}
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; SIMD128: return $pop0 #
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; SIMD128-NEXT: .param v128, v128{{$}}
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; SIMD128-NEXT: .result v128{{$}}
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; SIMD128-NEXT: v128.and $push0=, $0, $1{{$}}
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; SIMD128-NEXT: return $pop0{{$}}
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define <4 x i32> @and_v4i32(<4 x i32> %x, <4 x i32> %y) {
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%a = and <4 x i32> %x, %y
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ret <4 x i32> %a
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}
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|
||||
; CHECK-LABEL: or_v4i32
|
||||
; CHECK-LABEL: or_v4i32:
|
||||
; NO-SIMD128-NOT: v128
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: v128.or $push0=, $0, $1 # encoding: [0xfd,0x3c]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: v128.or $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i32> @or_v4i32(<4 x i32> %x, <4 x i32> %y) {
|
||||
%a = or <4 x i32> %x, %y
|
||||
ret <4 x i32> %a
|
||||
}
|
||||
|
||||
; CHECK-LABEL: xor_v4i32
|
||||
; CHECK-LABEL: xor_v4i32:
|
||||
; NO-SIMD128-NOT: v128
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: v128.xor $push0=, $0, $1 # encoding: [0xfd,0x3d]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: v128.xor $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i32> @xor_v4i32(<4 x i32> %x, <4 x i32> %y) {
|
||||
%a = xor <4 x i32> %x, %y
|
||||
ret <4 x i32> %a
|
||||
}
|
||||
|
||||
; CHECK-LABEL: not_v4i32
|
||||
; CHECK-LABEL: not_v4i32:
|
||||
; NO-SIMD128-NOT: v128
|
||||
; SIMD128: .param v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: v128.not $push0=, $0 # encoding: [0xfd,0x3e]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: v128.not $push0=, $0{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i32> @not_v4i32(<4 x i32> %x) {
|
||||
%a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
|
||||
ret <4 x i32> %a
|
||||
|
|
@ -257,32 +257,32 @@ define <4 x i32> @not_v4i32(<4 x i32> %x) {
|
|||
; ==============================================================================
|
||||
; 2 x i64
|
||||
; ==============================================================================
|
||||
; CHECK-LABEL: add_v2i64
|
||||
; CHECK-LABEL: add_v2i64:
|
||||
; NO-SIMD128-NOT: i64x2
|
||||
; SIMD128-VM-NOT: i64x2
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i64x2.add $push0=, $0, $1 # encoding: [0xfd,0x1b]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i64x2.add $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x i64> @add_v2i64(<2 x i64> %x, <2 x i64> %y) {
|
||||
%a = add <2 x i64> %x, %y
|
||||
ret <2 x i64> %a
|
||||
}
|
||||
|
||||
; CHECK-LABEL: sub_v2i64
|
||||
; CHECK-LABEL: sub_v2i64:
|
||||
; NO-SIMD128-NOT: i64x2
|
||||
; SIMD128-VM-NOT: i64x2
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i64x2.sub $push0=, $0, $1 # encoding: [0xfd,0x1f]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i64x2.sub $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x i64> @sub_v2i64(<2 x i64> %x, <2 x i64> %y) {
|
||||
%a = sub <2 x i64> %x, %y
|
||||
ret <2 x i64> %a
|
||||
}
|
||||
|
||||
; v2i64.mul is not in spec
|
||||
; CHECK-LABEL: mul_v2i64
|
||||
; CHECK-LABEL: mul_v2i64:
|
||||
; NO-SIMD128-NOT: i64x2
|
||||
; SIMD128-VM-NOT: i64x2
|
||||
; SIMD128-NOT: i64x2.mul
|
||||
|
|
@ -293,49 +293,49 @@ define <2 x i64> @mul_v2i64(<2 x i64> %x, <2 x i64> %y) {
|
|||
ret <2 x i64> %a
|
||||
}
|
||||
|
||||
; CHECK-LABEL: and_v2i64
|
||||
; CHECK-LABEL: and_v2i64:
|
||||
; NO-SIMD128-NOT: v128
|
||||
; SIMD128-VM-NOT: v128
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: v128.and $push0=, $0, $1 # encoding: [0xfd,0x3b]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: v128.and $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x i64> @and_v2i64(<2 x i64> %x, <2 x i64> %y) {
|
||||
%a = and <2 x i64> %x, %y
|
||||
ret <2 x i64> %a
|
||||
}
|
||||
|
||||
; CHECK-LABEL: or_v2i64
|
||||
; CHECK-LABEL: or_v2i64:
|
||||
; NO-SIMD128-NOT: v128
|
||||
; SIMD128-VM-NOT: v128
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: v128.or $push0=, $0, $1 # encoding: [0xfd,0x3c]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: v128.or $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x i64> @or_v2i64(<2 x i64> %x, <2 x i64> %y) {
|
||||
%a = or <2 x i64> %x, %y
|
||||
ret <2 x i64> %a
|
||||
}
|
||||
|
||||
; CHECK-LABEL: xor_v2i64
|
||||
; CHECK-LABEL: xor_v2i64:
|
||||
; NO-SIMD128-NOT: v128
|
||||
; SIMD128-VM-NOT: v128
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: v128.xor $push0=, $0, $1 # encoding: [0xfd,0x3d]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: v128.xor $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x i64> @xor_v2i64(<2 x i64> %x, <2 x i64> %y) {
|
||||
%a = xor <2 x i64> %x, %y
|
||||
ret <2 x i64> %a
|
||||
}
|
||||
|
||||
; CHECK-LABEL: not_v2i64
|
||||
; CHECK-LABEL: not_v2i64:
|
||||
; NO-SIMD128-NOT: v128
|
||||
; SIMD128-VM-NOT: v128
|
||||
; SIMD128: .param v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: v128.not $push0=, $0 # encoding: [0xfd,0x3e]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: v128.not $push0=, $0{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x i64> @not_v2i64(<2 x i64> %x) {
|
||||
%a = xor <2 x i64> %x, <i64 -1, i64 -1>
|
||||
ret <2 x i64> %a
|
||||
|
|
@ -344,45 +344,45 @@ define <2 x i64> @not_v2i64(<2 x i64> %x) {
|
|||
; ==============================================================================
|
||||
; 4 x float
|
||||
; ==============================================================================
|
||||
; CHECK-LABEL: add_v4f32
|
||||
; CHECK-LABEL: add_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f32x4.add $push0=, $0, $1 # encoding: [0xfd,0x7a]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f32x4.add $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x float> @add_v4f32(<4 x float> %x, <4 x float> %y) {
|
||||
%a = fadd <4 x float> %x, %y
|
||||
ret <4 x float> %a
|
||||
}
|
||||
|
||||
; CHECK-LABEL: sub_v4f32
|
||||
; CHECK-LABEL: sub_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f32x4.sub $push0=, $0, $1 # encoding: [0xfd,0x7c]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f32x4.sub $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x float> @sub_v4f32(<4 x float> %x, <4 x float> %y) {
|
||||
%a = fsub <4 x float> %x, %y
|
||||
ret <4 x float> %a
|
||||
}
|
||||
|
||||
; CHECK-LABEL: div_v4f32
|
||||
; CHECK-LABEL: div_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f32x4.div $push0=, $0, $1 # encoding: [0xfd,0x7e]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f32x4.div $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x float> @div_v4f32(<4 x float> %x, <4 x float> %y) {
|
||||
%a = fdiv <4 x float> %x, %y
|
||||
ret <4 x float> %a
|
||||
}
|
||||
|
||||
; CHECK-LABEL: mul_v4f32
|
||||
; CHECK-LABEL: mul_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f32x4.mul $push0=, $0, $1 # encoding: [0xfd,0x80]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f32x4.mul $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x float> @mul_v4f32(<4 x float> %x, <4 x float> %y) {
|
||||
%a = fmul <4 x float> %x, %y
|
||||
ret <4 x float> %a
|
||||
|
|
@ -391,49 +391,49 @@ define <4 x float> @mul_v4f32(<4 x float> %x, <4 x float> %y) {
|
|||
; ==============================================================================
|
||||
; 2 x double
|
||||
; ==============================================================================
|
||||
; CHECK-LABEL: add_v2f64
|
||||
; CHECK-LABEL: add_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD129-VM-NOT: f62x2
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f64x2.add $push0=, $0, $1 # encoding: [0xfd,0x7b]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-VM-NOT: f62x2
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f64x2.add $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x double> @add_v2f64(<2 x double> %x, <2 x double> %y) {
|
||||
%a = fadd <2 x double> %x, %y
|
||||
ret <2 x double> %a
|
||||
}
|
||||
|
||||
; CHECK-LABEL: sub_v2f64
|
||||
; CHECK-LABEL: sub_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD129-VM-NOT: f62x2
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f64x2.sub $push0=, $0, $1 # encoding: [0xfd,0x7d]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-VM-NOT: f62x2
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f64x2.sub $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x double> @sub_v2f64(<2 x double> %x, <2 x double> %y) {
|
||||
%a = fsub <2 x double> %x, %y
|
||||
ret <2 x double> %a
|
||||
}
|
||||
|
||||
; CHECK-LABEL: div_v2f64
|
||||
; CHECK-LABEL: div_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD129-VM-NOT: f62x2
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f64x2.div $push0=, $0, $1 # encoding: [0xfd,0x7f]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-VM-NOT: f62x2
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f64x2.div $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x double> @div_v2f64(<2 x double> %x, <2 x double> %y) {
|
||||
%a = fdiv <2 x double> %x, %y
|
||||
ret <2 x double> %a
|
||||
}
|
||||
|
||||
; CHECK-LABEL: mul_v2f64
|
||||
; CHECK-LABEL: mul_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD129-VM-NOT: f62x2
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f64x2.mul $push0=, $0, $1 # encoding: [0xfd,0x81]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-VM-NOT: f62x2
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f64x2.mul $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x double> @mul_v2f64(<2 x double> %x, <2 x double> %y) {
|
||||
%a = fmul <2 x double> %x, %y
|
||||
ret <2 x double> %a
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -wasm-enable-unimplemented-simd -mattr=+simd128,+sign-ext --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128
|
||||
; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=+simd128,+sign-ext --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128-VM
|
||||
; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=-simd128,+sign-ext --show-mc-encoding | FileCheck %s --check-prefixes CHECK,NO-SIMD128
|
||||
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -wasm-enable-unimplemented-simd -mattr=+simd128,+sign-ext --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128
|
||||
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=+simd128,+sign-ext --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128-VM
|
||||
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=-simd128,+sign-ext --show-mc-encoding | FileCheck %s --check-prefixes CHECK,NO-SIMD128
|
||||
|
||||
; Test SIMD comparison operators
|
||||
|
||||
|
|
@ -9,10 +9,10 @@ target triple = "wasm32-unknown-unknown"
|
|||
|
||||
; CHECK-LABEL: compare_eq_v16i8:
|
||||
; NO-SIMD128-NOT: i8x16
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i8x16.eq $push0=, $0, $1 # encoding: [0xfd,0x48]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i8x16.eq $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <16 x i1> @compare_eq_v16i8 (<16 x i8> %x, <16 x i8> %y) {
|
||||
%res = icmp eq <16 x i8> %x, %y
|
||||
ret <16 x i1> %res
|
||||
|
|
@ -20,10 +20,10 @@ define <16 x i1> @compare_eq_v16i8 (<16 x i8> %x, <16 x i8> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_ne_v16i8:
|
||||
; NO-SIMD128-NOT: i8x16
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i8x16.ne $push0=, $0, $1 # encoding: [0xfd,0x4d]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i8x16.ne $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <16 x i1> @compare_ne_v16i8 (<16 x i8> %x, <16 x i8> %y) {
|
||||
%res = icmp ne <16 x i8> %x, %y
|
||||
ret <16 x i1> %res
|
||||
|
|
@ -31,10 +31,10 @@ define <16 x i1> @compare_ne_v16i8 (<16 x i8> %x, <16 x i8> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_slt_v16i8:
|
||||
; NO-SIMD128-NOT: i8x16
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i8x16.lt_s $push0=, $0, $1 # encoding: [0xfd,0x52]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i8x16.lt_s $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <16 x i1> @compare_slt_v16i8 (<16 x i8> %x, <16 x i8> %y) {
|
||||
%res = icmp slt <16 x i8> %x, %y
|
||||
ret <16 x i1> %res
|
||||
|
|
@ -42,10 +42,10 @@ define <16 x i1> @compare_slt_v16i8 (<16 x i8> %x, <16 x i8> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_ult_v16i8:
|
||||
; NO-SIMD128-NOT: i8x16
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i8x16.lt_u $push0=, $0, $1 # encoding: [0xfd,0x53]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i8x16.lt_u $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <16 x i1> @compare_ult_v16i8 (<16 x i8> %x, <16 x i8> %y) {
|
||||
%res = icmp ult <16 x i8> %x, %y
|
||||
ret <16 x i1> %res
|
||||
|
|
@ -53,10 +53,10 @@ define <16 x i1> @compare_ult_v16i8 (<16 x i8> %x, <16 x i8> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_sle_v16i8:
|
||||
; NO-SIMD128-NOT: i8x16
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i8x16.le_s $push0=, $0, $1 # encoding: [0xfd,0x5a]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i8x16.le_s $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <16 x i1> @compare_sle_v16i8 (<16 x i8> %x, <16 x i8> %y) {
|
||||
%res = icmp sle <16 x i8> %x, %y
|
||||
ret <16 x i1> %res
|
||||
|
|
@ -64,10 +64,10 @@ define <16 x i1> @compare_sle_v16i8 (<16 x i8> %x, <16 x i8> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_ule_v16i8:
|
||||
; NO-SIMD128-NOT: i8x16
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i8x16.le_u $push0=, $0, $1 # encoding: [0xfd,0x5b]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i8x16.le_u $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <16 x i1> @compare_ule_v16i8 (<16 x i8> %x, <16 x i8> %y) {
|
||||
%res = icmp ule <16 x i8> %x, %y
|
||||
ret <16 x i1> %res
|
||||
|
|
@ -75,10 +75,10 @@ define <16 x i1> @compare_ule_v16i8 (<16 x i8> %x, <16 x i8> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_sgt_v16i8:
|
||||
; NO-SIMD128-NOT: i8x16
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i8x16.gt_s $push0=, $0, $1 # encoding: [0xfd,0x62]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i8x16.gt_s $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <16 x i1> @compare_sgt_v16i8 (<16 x i8> %x, <16 x i8> %y) {
|
||||
%res = icmp sgt <16 x i8> %x, %y
|
||||
ret <16 x i1> %res
|
||||
|
|
@ -86,10 +86,10 @@ define <16 x i1> @compare_sgt_v16i8 (<16 x i8> %x, <16 x i8> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_ugt_v16i8:
|
||||
; NO-SIMD128-NOT: i8x16
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i8x16.gt_u $push0=, $0, $1 # encoding: [0xfd,0x63]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i8x16.gt_u $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <16 x i1> @compare_ugt_v16i8 (<16 x i8> %x, <16 x i8> %y) {
|
||||
%res = icmp ugt <16 x i8> %x, %y
|
||||
ret <16 x i1> %res
|
||||
|
|
@ -97,10 +97,10 @@ define <16 x i1> @compare_ugt_v16i8 (<16 x i8> %x, <16 x i8> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_sge_v16i8:
|
||||
; NO-SIMD128-NOT: i8x16
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i8x16.ge_s $push0=, $0, $1 # encoding: [0xfd,0x6a]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i8x16.ge_s $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <16 x i1> @compare_sge_v16i8 (<16 x i8> %x, <16 x i8> %y) {
|
||||
%res = icmp sge <16 x i8> %x, %y
|
||||
ret <16 x i1> %res
|
||||
|
|
@ -108,10 +108,10 @@ define <16 x i1> @compare_sge_v16i8 (<16 x i8> %x, <16 x i8> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_uge_v16i8:
|
||||
; NO-SIMD128-NOT: i8x16
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i8x16.ge_u $push0=, $0, $1 # encoding: [0xfd,0x6b]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i8x16.ge_u $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <16 x i1> @compare_uge_v16i8 (<16 x i8> %x, <16 x i8> %y) {
|
||||
%res = icmp uge <16 x i8> %x, %y
|
||||
ret <16 x i1> %res
|
||||
|
|
@ -119,10 +119,10 @@ define <16 x i1> @compare_uge_v16i8 (<16 x i8> %x, <16 x i8> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_eq_v8i16:
|
||||
; NO-SIMD128-NOT: i16x8
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i16x8.eq $push0=, $0, $1 # encoding: [0xfd,0x49]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i16x8.eq $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <8 x i1> @compare_eq_v8i16 (<8 x i16> %x, <8 x i16> %y) {
|
||||
%res = icmp eq <8 x i16> %x, %y
|
||||
ret <8 x i1> %res
|
||||
|
|
@ -130,10 +130,10 @@ define <8 x i1> @compare_eq_v8i16 (<8 x i16> %x, <8 x i16> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_ne_v8i16:
|
||||
; NO-SIMD128-NOT: i16x8
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i16x8.ne $push0=, $0, $1 # encoding: [0xfd,0x4e]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i16x8.ne $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <8 x i1> @compare_ne_v8i16 (<8 x i16> %x, <8 x i16> %y) {
|
||||
%res = icmp ne <8 x i16> %x, %y
|
||||
ret <8 x i1> %res
|
||||
|
|
@ -141,10 +141,10 @@ define <8 x i1> @compare_ne_v8i16 (<8 x i16> %x, <8 x i16> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_slt_v8i16:
|
||||
; NO-SIMD128-NOT: i16x8
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i16x8.lt_s $push0=, $0, $1 # encoding: [0xfd,0x54]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i16x8.lt_s $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <8 x i1> @compare_slt_v8i16 (<8 x i16> %x, <8 x i16> %y) {
|
||||
%res = icmp slt <8 x i16> %x, %y
|
||||
ret <8 x i1> %res
|
||||
|
|
@ -152,10 +152,10 @@ define <8 x i1> @compare_slt_v8i16 (<8 x i16> %x, <8 x i16> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_ult_v8i16:
|
||||
; NO-SIMD128-NOT: i16x8
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i16x8.lt_u $push0=, $0, $1 # encoding: [0xfd,0x55]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i16x8.lt_u $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <8 x i1> @compare_ult_v8i16 (<8 x i16> %x, <8 x i16> %y) {
|
||||
%res = icmp ult <8 x i16> %x, %y
|
||||
ret <8 x i1> %res
|
||||
|
|
@ -163,10 +163,10 @@ define <8 x i1> @compare_ult_v8i16 (<8 x i16> %x, <8 x i16> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_sle_v8i16:
|
||||
; NO-SIMD128-NOT: i16x8
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i16x8.le_s $push0=, $0, $1 # encoding: [0xfd,0x5c]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i16x8.le_s $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <8 x i1> @compare_sle_v8i16 (<8 x i16> %x, <8 x i16> %y) {
|
||||
%res = icmp sle <8 x i16> %x, %y
|
||||
ret <8 x i1> %res
|
||||
|
|
@ -174,10 +174,10 @@ define <8 x i1> @compare_sle_v8i16 (<8 x i16> %x, <8 x i16> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_ule_v8i16:
|
||||
; NO-SIMD128-NOT: i16x8
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i16x8.le_u $push0=, $0, $1 # encoding: [0xfd,0x5d]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i16x8.le_u $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <8 x i1> @compare_ule_v8i16 (<8 x i16> %x, <8 x i16> %y) {
|
||||
%res = icmp ule <8 x i16> %x, %y
|
||||
ret <8 x i1> %res
|
||||
|
|
@ -185,10 +185,10 @@ define <8 x i1> @compare_ule_v8i16 (<8 x i16> %x, <8 x i16> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_sgt_v8i16:
|
||||
; NO-SIMD128-NOT: i16x8
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i16x8.gt_s $push0=, $0, $1 # encoding: [0xfd,0x64]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i16x8.gt_s $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <8 x i1> @compare_sgt_v8i16 (<8 x i16> %x, <8 x i16> %y) {
|
||||
%res = icmp sgt <8 x i16> %x, %y
|
||||
ret <8 x i1> %res
|
||||
|
|
@ -196,10 +196,10 @@ define <8 x i1> @compare_sgt_v8i16 (<8 x i16> %x, <8 x i16> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_ugt_v8i16:
|
||||
; NO-SIMD128-NOT: i16x8
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i16x8.gt_u $push0=, $0, $1 # encoding: [0xfd,0x65]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i16x8.gt_u $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <8 x i1> @compare_ugt_v8i16 (<8 x i16> %x, <8 x i16> %y) {
|
||||
%res = icmp ugt <8 x i16> %x, %y
|
||||
ret <8 x i1> %res
|
||||
|
|
@ -207,10 +207,10 @@ define <8 x i1> @compare_ugt_v8i16 (<8 x i16> %x, <8 x i16> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_sge_v8i16:
|
||||
; NO-SIMD128-NOT: i16x8
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i16x8.ge_s $push0=, $0, $1 # encoding: [0xfd,0x6c]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i16x8.ge_s $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <8 x i1> @compare_sge_v8i16 (<8 x i16> %x, <8 x i16> %y) {
|
||||
%res = icmp sge <8 x i16> %x, %y
|
||||
ret <8 x i1> %res
|
||||
|
|
@ -218,10 +218,10 @@ define <8 x i1> @compare_sge_v8i16 (<8 x i16> %x, <8 x i16> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_uge_v8i16:
|
||||
; NO-SIMD128-NOT: i16x8
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i16x8.ge_u $push0=, $0, $1 # encoding: [0xfd,0x6d]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i16x8.ge_u $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <8 x i1> @compare_uge_v8i16 (<8 x i16> %x, <8 x i16> %y) {
|
||||
%res = icmp uge <8 x i16> %x, %y
|
||||
ret <8 x i1> %res
|
||||
|
|
@ -229,10 +229,10 @@ define <8 x i1> @compare_uge_v8i16 (<8 x i16> %x, <8 x i16> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_eq_v4i32:
|
||||
; NO-SIMD128-NOT: i32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i32x4.eq $push0=, $0, $1 # encoding: [0xfd,0x4a]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i32x4.eq $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i1> @compare_eq_v4i32 (<4 x i32> %x, <4 x i32> %y) {
|
||||
%res = icmp eq <4 x i32> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -240,10 +240,10 @@ define <4 x i1> @compare_eq_v4i32 (<4 x i32> %x, <4 x i32> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_ne_v4i32:
|
||||
; NO-SIMD128-NOT: i32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i32x4.ne $push0=, $0, $1 # encoding: [0xfd,0x4f]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i32x4.ne $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i1> @compare_ne_v4i32 (<4 x i32> %x, <4 x i32> %y) {
|
||||
%res = icmp ne <4 x i32> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -251,10 +251,10 @@ define <4 x i1> @compare_ne_v4i32 (<4 x i32> %x, <4 x i32> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_slt_v4i32:
|
||||
; NO-SIMD128-NOT: i32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i32x4.lt_s $push0=, $0, $1 # encoding: [0xfd,0x56]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i32x4.lt_s $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i1> @compare_slt_v4i32 (<4 x i32> %x, <4 x i32> %y) {
|
||||
%res = icmp slt <4 x i32> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -262,10 +262,10 @@ define <4 x i1> @compare_slt_v4i32 (<4 x i32> %x, <4 x i32> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_ult_v4i32:
|
||||
; NO-SIMD128-NOT: i32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i32x4.lt_u $push0=, $0, $1 # encoding: [0xfd,0x57]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i32x4.lt_u $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i1> @compare_ult_v4i32 (<4 x i32> %x, <4 x i32> %y) {
|
||||
%res = icmp ult <4 x i32> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -273,10 +273,10 @@ define <4 x i1> @compare_ult_v4i32 (<4 x i32> %x, <4 x i32> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_sle_v4i32:
|
||||
; NO-SIMD128-NOT: i32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i32x4.le_s $push0=, $0, $1 # encoding: [0xfd,0x5e]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i32x4.le_s $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i1> @compare_sle_v4i32 (<4 x i32> %x, <4 x i32> %y) {
|
||||
%res = icmp sle <4 x i32> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -284,10 +284,10 @@ define <4 x i1> @compare_sle_v4i32 (<4 x i32> %x, <4 x i32> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_ule_v4i32:
|
||||
; NO-SIMD128-NOT: i32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i32x4.le_u $push0=, $0, $1 # encoding: [0xfd,0x5f]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i32x4.le_u $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i1> @compare_ule_v4i32 (<4 x i32> %x, <4 x i32> %y) {
|
||||
%res = icmp ule <4 x i32> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -295,10 +295,10 @@ define <4 x i1> @compare_ule_v4i32 (<4 x i32> %x, <4 x i32> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_sgt_v4i32:
|
||||
; NO-SIMD128-NOT: i32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i32x4.gt_s $push0=, $0, $1 # encoding: [0xfd,0x66]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i32x4.gt_s $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i1> @compare_sgt_v4i32 (<4 x i32> %x, <4 x i32> %y) {
|
||||
%res = icmp sgt <4 x i32> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -306,10 +306,10 @@ define <4 x i1> @compare_sgt_v4i32 (<4 x i32> %x, <4 x i32> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_ugt_v4i32:
|
||||
; NO-SIMD128-NOT: i32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i32x4.gt_u $push0=, $0, $1 # encoding: [0xfd,0x67]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i32x4.gt_u $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i1> @compare_ugt_v4i32 (<4 x i32> %x, <4 x i32> %y) {
|
||||
%res = icmp ugt <4 x i32> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -317,10 +317,10 @@ define <4 x i1> @compare_ugt_v4i32 (<4 x i32> %x, <4 x i32> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_sge_v4i32:
|
||||
; NO-SIMD128-NOT: i32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i32x4.ge_s $push0=, $0, $1 # encoding: [0xfd,0x6e]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i32x4.ge_s $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i1> @compare_sge_v4i32 (<4 x i32> %x, <4 x i32> %y) {
|
||||
%res = icmp sge <4 x i32> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -328,10 +328,10 @@ define <4 x i1> @compare_sge_v4i32 (<4 x i32> %x, <4 x i32> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_uge_v4i32:
|
||||
; NO-SIMD128-NOT: i32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i32x4.ge_u $push0=, $0, $1 # encoding: [0xfd,0x6f]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i32x4.ge_u $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i1> @compare_uge_v4i32 (<4 x i32> %x, <4 x i32> %y) {
|
||||
%res = icmp uge <4 x i32> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -339,10 +339,10 @@ define <4 x i1> @compare_uge_v4i32 (<4 x i32> %x, <4 x i32> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_oeq_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f32x4.eq $push0=, $0, $1 # encoding: [0xfd,0x4b]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f32x4.eq $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i1> @compare_oeq_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp oeq <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -350,10 +350,10 @@ define <4 x i1> @compare_oeq_v4f32 (<4 x float> %x, <4 x float> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_ogt_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f32x4.gt $push0=, $0, $1 # encoding: [0xfd,0x68]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f32x4.gt $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i1> @compare_ogt_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp ogt <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -361,10 +361,10 @@ define <4 x i1> @compare_ogt_v4f32 (<4 x float> %x, <4 x float> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_oge_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f32x4.ge $push0=, $0, $1 # encoding: [0xfd,0x70]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f32x4.ge $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i1> @compare_oge_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp oge <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -372,10 +372,10 @@ define <4 x i1> @compare_oge_v4f32 (<4 x float> %x, <4 x float> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_olt_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f32x4.lt $push0=, $0, $1 # encoding: [0xfd,0x58]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f32x4.lt $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i1> @compare_olt_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp olt <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -383,10 +383,10 @@ define <4 x i1> @compare_olt_v4f32 (<4 x float> %x, <4 x float> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_ole_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f32x4.le $push0=, $0, $1 # encoding: [0xfd,0x60]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f32x4.le $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i1> @compare_ole_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp ole <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -394,9 +394,9 @@ define <4 x i1> @compare_ole_v4f32 (<4 x float> %x, <4 x float> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_one_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f32x4.ne
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f32x4.ne
|
||||
define <4 x i1> @compare_one_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp one <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -404,9 +404,9 @@ define <4 x i1> @compare_one_v4f32 (<4 x float> %x, <4 x float> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_ord_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f32x4.eq
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f32x4.eq
|
||||
define <4 x i1> @compare_ord_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp ord <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -414,9 +414,9 @@ define <4 x i1> @compare_ord_v4f32 (<4 x float> %x, <4 x float> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_ueq_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f32x4.eq
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f32x4.eq
|
||||
define <4 x i1> @compare_ueq_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp ueq <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -424,9 +424,9 @@ define <4 x i1> @compare_ueq_v4f32 (<4 x float> %x, <4 x float> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_ugt_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f32x4.le
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f32x4.le
|
||||
define <4 x i1> @compare_ugt_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp ugt <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -434,9 +434,9 @@ define <4 x i1> @compare_ugt_v4f32 (<4 x float> %x, <4 x float> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_uge_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f32x4.lt
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f32x4.lt
|
||||
define <4 x i1> @compare_uge_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp uge <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -444,9 +444,9 @@ define <4 x i1> @compare_uge_v4f32 (<4 x float> %x, <4 x float> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_ult_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f32x4.ge
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f32x4.ge
|
||||
define <4 x i1> @compare_ult_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp ult <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -454,9 +454,9 @@ define <4 x i1> @compare_ult_v4f32 (<4 x float> %x, <4 x float> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_ule_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f32x4.gt
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f32x4.gt
|
||||
define <4 x i1> @compare_ule_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp ule <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -464,10 +464,10 @@ define <4 x i1> @compare_ule_v4f32 (<4 x float> %x, <4 x float> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_une_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f32x4.ne $push0=, $0, $1 # encoding: [0xfd,0x50]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f32x4.ne $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i1> @compare_une_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp une <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -475,9 +475,9 @@ define <4 x i1> @compare_une_v4f32 (<4 x float> %x, <4 x float> %y) {
|
|||
|
||||
; CHECK-LABEL: compare_uno_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f32x4.ne
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f32x4.ne
|
||||
define <4 x i1> @compare_uno_v4f32 (<4 x float> %x, <4 x float> %y) {
|
||||
%res = fcmp uno <4 x float> %x, %y
|
||||
ret <4 x i1> %res
|
||||
|
|
@ -486,10 +486,10 @@ define <4 x i1> @compare_uno_v4f32 (<4 x float> %x, <4 x float> %y) {
|
|||
; CHECK-LABEL: compare_oeq_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f64x2.eq $push0=, $0, $1 # encoding: [0xfd,0x4c]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f64x2.eq $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x i1> @compare_oeq_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp oeq <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
|
|
@ -498,10 +498,10 @@ define <2 x i1> @compare_oeq_v2f64 (<2 x double> %x, <2 x double> %y) {
|
|||
; CHECK-LABEL: compare_ogt_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f64x2.gt $push0=, $0, $1 # encoding: [0xfd,0x69]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f64x2.gt $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x i1> @compare_ogt_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp ogt <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
|
|
@ -510,10 +510,10 @@ define <2 x i1> @compare_ogt_v2f64 (<2 x double> %x, <2 x double> %y) {
|
|||
; CHECK-LABEL: compare_oge_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f64x2.ge $push0=, $0, $1 # encoding: [0xfd,0x71]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f64x2.ge $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x i1> @compare_oge_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp oge <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
|
|
@ -522,10 +522,10 @@ define <2 x i1> @compare_oge_v2f64 (<2 x double> %x, <2 x double> %y) {
|
|||
; CHECK-LABEL: compare_olt_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f64x2.lt $push0=, $0, $1 # encoding: [0xfd,0x59]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f64x2.lt $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x i1> @compare_olt_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp olt <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
|
|
@ -534,10 +534,10 @@ define <2 x i1> @compare_olt_v2f64 (<2 x double> %x, <2 x double> %y) {
|
|||
; CHECK-LABEL: compare_ole_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f64x2.le $push0=, $0, $1 # encoding: [0xfd,0x61]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f64x2.le $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x i1> @compare_ole_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp ole <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
|
|
@ -546,9 +546,9 @@ define <2 x i1> @compare_ole_v2f64 (<2 x double> %x, <2 x double> %y) {
|
|||
; CHECK-LABEL: compare_one_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f64x2.ne
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f64x2.ne
|
||||
define <2 x i1> @compare_one_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp one <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
|
|
@ -557,9 +557,9 @@ define <2 x i1> @compare_one_v2f64 (<2 x double> %x, <2 x double> %y) {
|
|||
; CHECK-LABEL: compare_ord_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f64x2.eq
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f64x2.eq
|
||||
define <2 x i1> @compare_ord_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp ord <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
|
|
@ -568,9 +568,9 @@ define <2 x i1> @compare_ord_v2f64 (<2 x double> %x, <2 x double> %y) {
|
|||
; CHECK-LABEL: compare_ueq_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f64x2.eq
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f64x2.eq
|
||||
define <2 x i1> @compare_ueq_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp ueq <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
|
|
@ -579,9 +579,9 @@ define <2 x i1> @compare_ueq_v2f64 (<2 x double> %x, <2 x double> %y) {
|
|||
; CHECK-LABEL: compare_ugt_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f64x2.le
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f64x2.le
|
||||
define <2 x i1> @compare_ugt_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp ugt <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
|
|
@ -590,9 +590,9 @@ define <2 x i1> @compare_ugt_v2f64 (<2 x double> %x, <2 x double> %y) {
|
|||
; CHECK-LABEL: compare_uge_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f64x2.lt
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f64x2.lt
|
||||
define <2 x i1> @compare_uge_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp uge <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
|
|
@ -601,9 +601,9 @@ define <2 x i1> @compare_uge_v2f64 (<2 x double> %x, <2 x double> %y) {
|
|||
; CHECK-LABEL: compare_ult_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f64x2.ge
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f64x2.ge
|
||||
define <2 x i1> @compare_ult_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp ult <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
|
|
@ -612,9 +612,9 @@ define <2 x i1> @compare_ult_v2f64 (<2 x double> %x, <2 x double> %y) {
|
|||
; CHECK-LABEL: compare_ule_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f64x2.gt
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f64x2.gt
|
||||
define <2 x i1> @compare_ule_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp ule <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
|
|
@ -623,10 +623,10 @@ define <2 x i1> @compare_ule_v2f64 (<2 x double> %x, <2 x double> %y) {
|
|||
; CHECK-LABEL: compare_une_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f64x2.ne $push0=, $0, $1 # encoding: [0xfd,0x51]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f64x2.ne $push0=, $0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x i1> @compare_une_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp une <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
|
|
@ -635,9 +635,9 @@ define <2 x i1> @compare_une_v2f64 (<2 x double> %x, <2 x double> %y) {
|
|||
; CHECK-LABEL: compare_uno_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f64x2.ne
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f64x2.ne
|
||||
define <2 x i1> @compare_uno_v2f64 (<2 x double> %x, <2 x double> %y) {
|
||||
%res = fcmp uno <2 x double> %x, %y
|
||||
ret <2 x i1> %res
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -wasm-enable-unimplemented-simd -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128
|
||||
; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128-VM
|
||||
; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=-simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,NO-SIMD128
|
||||
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -wasm-enable-unimplemented-simd -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128
|
||||
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128-VM
|
||||
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=-simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,NO-SIMD128
|
||||
|
||||
; Test that bitcasts between vector types are lowered to zero instructions
|
||||
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,6 +1,6 @@
|
|||
; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -wasm-enable-unimplemented-simd -mattr=+simd128,+sign-ext --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128
|
||||
; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128,+sign-ext --show-mc-encoding | FileCheck %s --check-prefixes CHECK,SIMD128-VM
|
||||
; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-simd128,+sign-ext --show-mc-encoding | FileCheck %s --check-prefixes CHECK,NO-SIMD128
|
||||
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -wasm-enable-unimplemented-simd -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128
|
||||
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128-VM
|
||||
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,NO-SIMD128
|
||||
|
||||
; Test that basic SIMD128 vector manipulation operations assemble as expected.
|
||||
|
||||
|
|
@ -12,12 +12,10 @@ target triple = "wasm32-unknown-unknown"
|
|||
; ==============================================================================
|
||||
; CHECK-LABEL: const_v16i8:
|
||||
; NO-SIMD128-NOT: i8x16
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: v128.const $push0=,
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: v128.const $push0=,
|
||||
; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
|
||||
; SIMD128-SAME: # encoding: [0xfd,0x00,
|
||||
; SIMD128-SAME: 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
|
||||
; SIMD128-SAME: 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f]{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <16 x i8> @const_v16i8() {
|
||||
ret <16 x i8> <i8 00, i8 01, i8 02, i8 03, i8 04, i8 05, i8 06, i8 07,
|
||||
i8 08, i8 09, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>
|
||||
|
|
@ -25,10 +23,10 @@ define <16 x i8> @const_v16i8() {
|
|||
|
||||
; CHECK-LABEL: splat_v16i8:
|
||||
; NO-SIMD128-NOT: i8x16
|
||||
; SIMD128: .param i32{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i8x16.splat $push0=, $0 # encoding: [0xfd,0x03]{{$}}
|
||||
; SIMD128: return $pop0 # encoding: [0x0f]{{$}}
|
||||
; SIMD128-NEXT: .param i32{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i8x16.splat $push0=, $0{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <16 x i8> @splat_v16i8(i8 %x) {
|
||||
%v = insertelement <16 x i8> undef, i8 %x, i32 0
|
||||
%res = shufflevector <16 x i8> %v, <16 x i8> undef,
|
||||
|
|
@ -38,7 +36,7 @@ define <16 x i8> @splat_v16i8(i8 %x) {
|
|||
}
|
||||
|
||||
; CHECK-LABEL: const_splat_v16i8:
|
||||
; SIMD128; i8x16.splat
|
||||
; SIMD128: i8x16.splat
|
||||
define <16 x i8> @const_splat_v16i8() {
|
||||
ret <16 x i8> <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42,
|
||||
i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42>
|
||||
|
|
@ -46,10 +44,10 @@ define <16 x i8> @const_splat_v16i8() {
|
|||
|
||||
; CHECK-LABEL: extract_v16i8_s:
|
||||
; NO-SIMD128-NOT: i8x16
|
||||
; SIMD128: .param v128{{$}}
|
||||
; SIMD128: .result i32{{$}}
|
||||
; SIMD128: i8x16.extract_lane_s $push0=, $0, 13 # encoding: [0xfd,0x09,0x0d]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128{{$}}
|
||||
; SIMD128-NEXT: .result i32{{$}}
|
||||
; SIMD128-NEXT: i8x16.extract_lane_s $push0=, $0, 13{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define i32 @extract_v16i8_s(<16 x i8> %v) {
|
||||
%elem = extractelement <16 x i8> %v, i8 13
|
||||
%a = sext i8 %elem to i32
|
||||
|
|
@ -58,10 +56,10 @@ define i32 @extract_v16i8_s(<16 x i8> %v) {
|
|||
|
||||
; CHECK-LABEL: extract_v16i8_u:
|
||||
; NO-SIMD128-NOT: i8x16
|
||||
; SIMD128: .param v128{{$}}
|
||||
; SIMD128: .result i32{{$}}
|
||||
; SIMD128: i8x16.extract_lane_u $push0=, $0, 13 # encoding: [0xfd,0x0a,0x0d]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128{{$}}
|
||||
; SIMD128-NEXT: .result i32{{$}}
|
||||
; SIMD128-NEXT: i8x16.extract_lane_u $push0=, $0, 13{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define i32 @extract_v16i8_u(<16 x i8> %v) {
|
||||
%elem = extractelement <16 x i8> %v, i8 13
|
||||
%a = zext i8 %elem to i32
|
||||
|
|
@ -70,10 +68,10 @@ define i32 @extract_v16i8_u(<16 x i8> %v) {
|
|||
|
||||
; CHECK-LABEL: extract_v16i8:
|
||||
; NO-SIMD128-NOT: i8x16
|
||||
; SIMD128: .param v128{{$}}
|
||||
; SIMD128: .result i32{{$}}
|
||||
; SIMD128: i8x16.extract_lane_u $push0=, $0, 13 # encoding: [0xfd,0x0a,0x0d]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128{{$}}
|
||||
; SIMD128-NEXT: .result i32{{$}}
|
||||
; SIMD128-NEXT: i8x16.extract_lane_u $push0=, $0, 13{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define i8 @extract_v16i8(<16 x i8> %v) {
|
||||
%elem = extractelement <16 x i8> %v, i8 13
|
||||
ret i8 %elem
|
||||
|
|
@ -81,10 +79,10 @@ define i8 @extract_v16i8(<16 x i8> %v) {
|
|||
|
||||
; CHECK-LABEL: replace_v16i8:
|
||||
; NO-SIMD128-NOT: i8x16
|
||||
; SIMD128: .param v128, i32{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i8x16.replace_lane $push0=, $0, 11, $1 # encoding: [0xfd,0x11,0x0b]{{$}}
|
||||
; SIMD128: return $pop0 # encoding: [0x0f]{{$}}
|
||||
; SIMD128-NEXT: .param v128, i32{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i8x16.replace_lane $push0=, $0, 11, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <16 x i8> @replace_v16i8(<16 x i8> %v, i8 %x) {
|
||||
%res = insertelement <16 x i8> %v, i8 %x, i32 11
|
||||
ret <16 x i8> %res
|
||||
|
|
@ -92,14 +90,11 @@ define <16 x i8> @replace_v16i8(<16 x i8> %v, i8 %x) {
|
|||
|
||||
; CHECK-LABEL: shuffle_v16i8:
|
||||
; NO-SIMD128-NOT: v8x16
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: v8x16.shuffle $push0=, $0, $1,
|
||||
; SIMD128-SAME: 0, 17, 2, 19, 4, 21, 6, 23, 8, 25, 10, 27, 12, 29, 14, 31
|
||||
; SIMD128-SAME: # encoding: [0xfd,0x17,
|
||||
; SIMD128-SAME: 0x00,0x11,0x02,0x13,0x04,0x15,0x06,0x17,
|
||||
; SIMD128-SAME: 0x08,0x19,0x0a,0x1b,0x0c,0x1d,0x0e,0x1f]
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: v8x16.shuffle $push0=, $0, $1,
|
||||
; SIMD128-SAME: 0, 17, 2, 19, 4, 21, 6, 23, 8, 25, 10, 27, 12, 29, 14, 31{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <16 x i8> @shuffle_v16i8(<16 x i8> %x, <16 x i8> %y) {
|
||||
%res = shufflevector <16 x i8> %x, <16 x i8> %y,
|
||||
<16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23,
|
||||
|
|
@ -109,25 +104,25 @@ define <16 x i8> @shuffle_v16i8(<16 x i8> %x, <16 x i8> %y) {
|
|||
|
||||
; CHECK-LABEL: build_v16i8:
|
||||
; NO-SIMD128-NOT: i8x16
|
||||
; SIMD128: .param i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i8x16.splat $push0=, $0 # encoding: [0xfd,0x03]
|
||||
; SIMD128: i8x16.replace_lane $push1=, $pop0, 1, $1 # encoding: [0xfd,0x11,0x01]
|
||||
; SIMD128: i8x16.replace_lane $push2=, $pop1, 2, $2 # encoding: [0xfd,0x11,0x02]
|
||||
; SIMD128: i8x16.replace_lane $push3=, $pop2, 3, $3 # encoding: [0xfd,0x11,0x03]
|
||||
; SIMD128: i8x16.replace_lane $push4=, $pop3, 4, $4 # encoding: [0xfd,0x11,0x04]
|
||||
; SIMD128: i8x16.replace_lane $push5=, $pop4, 5, $5 # encoding: [0xfd,0x11,0x05]
|
||||
; SIMD128: i8x16.replace_lane $push6=, $pop5, 6, $6 # encoding: [0xfd,0x11,0x06]
|
||||
; SIMD128: i8x16.replace_lane $push7=, $pop6, 7, $7 # encoding: [0xfd,0x11,0x07]
|
||||
; SIMD128: i8x16.replace_lane $push8=, $pop7, 8, $8 # encoding: [0xfd,0x11,0x08]
|
||||
; SIMD128: i8x16.replace_lane $push9=, $pop8, 9, $9 # encoding: [0xfd,0x11,0x09]
|
||||
; SIMD128: i8x16.replace_lane $push10=, $pop9, 10, $10 # encoding: [0xfd,0x11,0x0a]
|
||||
; SIMD128: i8x16.replace_lane $push11=, $pop10, 11, $11 # encoding: [0xfd,0x11,0x0b]
|
||||
; SIMD128: i8x16.replace_lane $push12=, $pop11, 12, $12 # encoding: [0xfd,0x11,0x0c]
|
||||
; SIMD128: i8x16.replace_lane $push13=, $pop12, 13, $13 # encoding: [0xfd,0x11,0x0d]
|
||||
; SIMD128: i8x16.replace_lane $push14=, $pop13, 14, $14 # encoding: [0xfd,0x11,0x0e]
|
||||
; SIMD128: i8x16.replace_lane $push15=, $pop14, 15, $15 # encoding: [0xfd,0x11,0x0f]
|
||||
; SIMD128: return $pop15 # encoding: [0x0f]
|
||||
; SIMD128-NEXT: .param i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i8x16.splat $push0=, $0{{$}}
|
||||
; SIMD128-NEXT: i8x16.replace_lane $push1=, $pop0, 1, $1{{$}}
|
||||
; SIMD128-NEXT: i8x16.replace_lane $push2=, $pop1, 2, $2{{$}}
|
||||
; SIMD128-NEXT: i8x16.replace_lane $push3=, $pop2, 3, $3{{$}}
|
||||
; SIMD128-NEXT: i8x16.replace_lane $push4=, $pop3, 4, $4{{$}}
|
||||
; SIMD128-NEXT: i8x16.replace_lane $push5=, $pop4, 5, $5{{$}}
|
||||
; SIMD128-NEXT: i8x16.replace_lane $push6=, $pop5, 6, $6{{$}}
|
||||
; SIMD128-NEXT: i8x16.replace_lane $push7=, $pop6, 7, $7{{$}}
|
||||
; SIMD128-NEXT: i8x16.replace_lane $push8=, $pop7, 8, $8{{$}}
|
||||
; SIMD128-NEXT: i8x16.replace_lane $push9=, $pop8, 9, $9{{$}}
|
||||
; SIMD128-NEXT: i8x16.replace_lane $push10=, $pop9, 10, $10{{$}}
|
||||
; SIMD128-NEXT: i8x16.replace_lane $push11=, $pop10, 11, $11{{$}}
|
||||
; SIMD128-NEXT: i8x16.replace_lane $push12=, $pop11, 12, $12{{$}}
|
||||
; SIMD128-NEXT: i8x16.replace_lane $push13=, $pop12, 13, $13{{$}}
|
||||
; SIMD128-NEXT: i8x16.replace_lane $push14=, $pop13, 14, $14{{$}}
|
||||
; SIMD128-NEXT: i8x16.replace_lane $push15=, $pop14, 15, $15{{$}}
|
||||
; SIMD128-NEXT: return $pop15{{$}}
|
||||
define <16 x i8> @build_v16i8(i8 %x0, i8 %x1, i8 %x2, i8 %x3,
|
||||
i8 %x4, i8 %x5, i8 %x6, i8 %x7,
|
||||
i8 %x8, i8 %x9, i8 %x10, i8 %x11,
|
||||
|
|
@ -156,11 +151,9 @@ define <16 x i8> @build_v16i8(i8 %x0, i8 %x1, i8 %x2, i8 %x3,
|
|||
; ==============================================================================
|
||||
; CHECK-LABEL: const_v8i16:
|
||||
; NO-SIMD128-NOT: i16x8
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: v128.const $push0=, 256, 770, 1284, 1798, 2312, 2826, 3340, 3854
|
||||
; SIMD128-SAME: # encoding: [0xfd,0x00,
|
||||
; SIMD128-SAME: 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
|
||||
; SIMD128-SAME: 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f]{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: v128.const $push0=, 256, 770, 1284, 1798, 2312, 2826, 3340, 3854{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <8 x i16> @const_v8i16() {
|
||||
ret <8 x i16> <i16 256, i16 770, i16 1284, i16 1798,
|
||||
i16 2312, i16 2826, i16 3340, i16 3854>
|
||||
|
|
@ -168,10 +161,10 @@ define <8 x i16> @const_v8i16() {
|
|||
|
||||
; CHECK-LABEL: splat_v8i16:
|
||||
; NO-SIMD128-NOT: i16x8
|
||||
; SIMD128: .param i32{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i16x8.splat $push0=, $0 # encoding: [0xfd,0x04]{{$}}
|
||||
; SIMD128: return $pop0 # encoding: [0x0f]{{$}}
|
||||
; SIMD128-NEXT: .param i32{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i16x8.splat $push0=, $0{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <8 x i16> @splat_v8i16(i16 %x) {
|
||||
%v = insertelement <8 x i16> undef, i16 %x, i32 0
|
||||
%res = shufflevector <8 x i16> %v, <8 x i16> undef,
|
||||
|
|
@ -180,17 +173,17 @@ define <8 x i16> @splat_v8i16(i16 %x) {
|
|||
}
|
||||
|
||||
; CHECK-LABEL: const_splat_v8i16:
|
||||
; SIMD128; i16x8.splat
|
||||
; SIMD128: i16x8.splat
|
||||
define <8 x i16> @const_splat_v8i16() {
|
||||
ret <8 x i16> <i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42>
|
||||
}
|
||||
|
||||
; CHECK-LABEL: extract_v8i16_s:
|
||||
; NO-SIMD128-NOT: i16x8
|
||||
; SIMD128: .param v128{{$}}
|
||||
; SIMD128: .result i32{{$}}
|
||||
; SIMD128: i16x8.extract_lane_s $push0=, $0, 5 # encoding: [0xfd,0x0b,0x05]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128{{$}}
|
||||
; SIMD128-NEXT: .result i32{{$}}
|
||||
; SIMD128-NEXT: i16x8.extract_lane_s $push0=, $0, 5{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define i32 @extract_v8i16_s(<8 x i16> %v) {
|
||||
%elem = extractelement <8 x i16> %v, i16 5
|
||||
%a = sext i16 %elem to i32
|
||||
|
|
@ -199,10 +192,10 @@ define i32 @extract_v8i16_s(<8 x i16> %v) {
|
|||
|
||||
; CHECK-LABEL: extract_v8i16_u:
|
||||
; NO-SIMD128-NOT: i16x8
|
||||
; SIMD128: .param v128{{$}}
|
||||
; SIMD128: .result i32{{$}}
|
||||
; SIMD128: i16x8.extract_lane_u $push0=, $0, 5 # encoding: [0xfd,0x0c,0x05]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128{{$}}
|
||||
; SIMD128-NEXT: .result i32{{$}}
|
||||
; SIMD128-NEXT: i16x8.extract_lane_u $push0=, $0, 5{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define i32 @extract_v8i16_u(<8 x i16> %v) {
|
||||
%elem = extractelement <8 x i16> %v, i16 5
|
||||
%a = zext i16 %elem to i32
|
||||
|
|
@ -211,10 +204,10 @@ define i32 @extract_v8i16_u(<8 x i16> %v) {
|
|||
|
||||
; CHECK-LABEL: extract_v8i16:
|
||||
; NO-SIMD128-NOT: i16x8
|
||||
; SIMD128: .param v128{{$}}
|
||||
; SIMD128: .result i32{{$}}
|
||||
; SIMD128: i16x8.extract_lane_u $push0=, $0, 5 # encoding: [0xfd,0x0c,0x05]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128{{$}}
|
||||
; SIMD128-NEXT: .result i32{{$}}
|
||||
; SIMD128-NEXT: i16x8.extract_lane_u $push0=, $0, 5{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define i16 @extract_v8i16(<8 x i16> %v) {
|
||||
%elem = extractelement <8 x i16> %v, i16 5
|
||||
ret i16 %elem
|
||||
|
|
@ -222,10 +215,10 @@ define i16 @extract_v8i16(<8 x i16> %v) {
|
|||
|
||||
; CHECK-LABEL: replace_v8i16:
|
||||
; NO-SIMD128-NOT: i16x8
|
||||
; SIMD128: .param v128, i32{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i16x8.replace_lane $push0=, $0, 7, $1 # encoding: [0xfd,0x12,0x07]{{$}}
|
||||
; SIMD128: return $pop0 # encoding: [0x0f]{{$}}
|
||||
; SIMD128-NEXT: .param v128, i32{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i16x8.replace_lane $push0=, $0, 7, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <8 x i16> @replace_v8i16(<8 x i16> %v, i16 %x) {
|
||||
%res = insertelement <8 x i16> %v, i16 %x, i32 7
|
||||
ret <8 x i16> %res
|
||||
|
|
@ -233,14 +226,11 @@ define <8 x i16> @replace_v8i16(<8 x i16> %v, i16 %x) {
|
|||
|
||||
; CHECK-LABEL: shuffle_v8i16:
|
||||
; NO-SIMD128-NOT: v8x16
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: v8x16.shuffle $push0=, $0, $1,
|
||||
; SIMD128-SAME: 0, 1, 18, 19, 4, 5, 22, 23, 8, 9, 26, 27, 12, 13, 30, 31
|
||||
; SIMD128-SAME: # encoding: [0xfd,0x17,
|
||||
; SIMD128-SAME: 0x00,0x01,0x12,0x13,0x04,0x05,0x16,0x17,
|
||||
; SIMD128-SAME: 0x08,0x09,0x1a,0x1b,0x0c,0x0d,0x1e,0x1f]
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: v8x16.shuffle $push0=, $0, $1,
|
||||
; SIMD128-SAME: 0, 1, 18, 19, 4, 5, 22, 23, 8, 9, 26, 27, 12, 13, 30, 31{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <8 x i16> @shuffle_v8i16(<8 x i16> %x, <8 x i16> %y) {
|
||||
%res = shufflevector <8 x i16> %x, <8 x i16> %y,
|
||||
<8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
|
||||
|
|
@ -249,17 +239,17 @@ define <8 x i16> @shuffle_v8i16(<8 x i16> %x, <8 x i16> %y) {
|
|||
|
||||
; CHECK-LABEL: build_v8i16:
|
||||
; NO-SIMD128-NOT: i16x8
|
||||
; SIMD128: .param i32, i32, i32, i32, i32, i32, i32, i32{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i16x8.splat $push0=, $0 # encoding: [0xfd,0x04]
|
||||
; SIMD128: i16x8.replace_lane $push1=, $pop0, 1, $1 # encoding: [0xfd,0x12,0x01]
|
||||
; SIMD128: i16x8.replace_lane $push2=, $pop1, 2, $2 # encoding: [0xfd,0x12,0x02]
|
||||
; SIMD128: i16x8.replace_lane $push3=, $pop2, 3, $3 # encoding: [0xfd,0x12,0x03]
|
||||
; SIMD128: i16x8.replace_lane $push4=, $pop3, 4, $4 # encoding: [0xfd,0x12,0x04]
|
||||
; SIMD128: i16x8.replace_lane $push5=, $pop4, 5, $5 # encoding: [0xfd,0x12,0x05]
|
||||
; SIMD128: i16x8.replace_lane $push6=, $pop5, 6, $6 # encoding: [0xfd,0x12,0x06]
|
||||
; SIMD128: i16x8.replace_lane $push7=, $pop6, 7, $7 # encoding: [0xfd,0x12,0x07]
|
||||
; SIMD128: return $pop7 # encoding: [0x0f]
|
||||
; SIMD128-NEXT: .param i32, i32, i32, i32, i32, i32, i32, i32{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i16x8.splat $push0=, $0{{$}}
|
||||
; SIMD128-NEXT: i16x8.replace_lane $push1=, $pop0, 1, $1{{$}}
|
||||
; SIMD128-NEXT: i16x8.replace_lane $push2=, $pop1, 2, $2{{$}}
|
||||
; SIMD128-NEXT: i16x8.replace_lane $push3=, $pop2, 3, $3{{$}}
|
||||
; SIMD128-NEXT: i16x8.replace_lane $push4=, $pop3, 4, $4{{$}}
|
||||
; SIMD128-NEXT: i16x8.replace_lane $push5=, $pop4, 5, $5{{$}}
|
||||
; SIMD128-NEXT: i16x8.replace_lane $push6=, $pop5, 6, $6{{$}}
|
||||
; SIMD128-NEXT: i16x8.replace_lane $push7=, $pop6, 7, $7{{$}}
|
||||
; SIMD128-NEXT: return $pop7{{$}}
|
||||
define <8 x i16> @build_v8i16(i16 %x0, i16 %x1, i16 %x2, i16 %x3,
|
||||
i16 %x4, i16 %x5, i16 %x6, i16 %x7) {
|
||||
%t0 = insertelement <8 x i16> undef, i16 %x0, i32 0
|
||||
|
|
@ -278,21 +268,19 @@ define <8 x i16> @build_v8i16(i16 %x0, i16 %x1, i16 %x2, i16 %x3,
|
|||
; ==============================================================================
|
||||
; CHECK-LABEL: const_v4i32:
|
||||
; NO-SIMD128-NOT: i32x4
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: v128.const $push0=, 50462976, 117835012, 185207048, 252579084
|
||||
; SIMD128-SAME: # encoding: [0xfd,0x00,
|
||||
; SIMD128-SAME: 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
|
||||
; SIMD128-SAME: 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f]{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: v128.const $push0=, 50462976, 117835012, 185207048, 252579084{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i32> @const_v4i32() {
|
||||
ret <4 x i32> <i32 50462976, i32 117835012, i32 185207048, i32 252579084>
|
||||
}
|
||||
|
||||
; CHECK-LABEL: splat_v4i32:
|
||||
; NO-SIMD128-NOT: i32x4
|
||||
; SIMD128: .param i32{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i32x4.splat $push0=, $0 # encoding: [0xfd,0x05]{{$}}
|
||||
; SIMD128: return $pop0 # encoding: [0x0f]{{$}}
|
||||
; SIMD128-NEXT: .param i32{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i32x4.splat $push0=, $0{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i32> @splat_v4i32(i32 %x) {
|
||||
%v = insertelement <4 x i32> undef, i32 %x, i32 0
|
||||
%res = shufflevector <4 x i32> %v, <4 x i32> undef,
|
||||
|
|
@ -301,17 +289,17 @@ define <4 x i32> @splat_v4i32(i32 %x) {
|
|||
}
|
||||
|
||||
; CHECK-LABEL: const_splat_v4i32:
|
||||
; SIMD128; i32x4.splat
|
||||
; SIMD128: i32x4.splat
|
||||
define <4 x i32> @const_splat_v4i32() {
|
||||
ret <4 x i32> <i32 42, i32 42, i32 42, i32 42>
|
||||
}
|
||||
|
||||
; CHECK-LABEL: extract_v4i32:
|
||||
; NO-SIMD128-NOT: i32x4
|
||||
; SIMD128: .param v128{{$}}
|
||||
; SIMD128: .result i32{{$}}
|
||||
; SIMD128: i32x4.extract_lane $push0=, $0, 3 # encoding: [0xfd,0x0d,0x03]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128{{$}}
|
||||
; SIMD128-NEXT: .result i32{{$}}
|
||||
; SIMD128-NEXT: i32x4.extract_lane $push0=, $0, 3{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define i32 @extract_v4i32(<4 x i32> %v) {
|
||||
%elem = extractelement <4 x i32> %v, i32 3
|
||||
ret i32 %elem
|
||||
|
|
@ -319,10 +307,10 @@ define i32 @extract_v4i32(<4 x i32> %v) {
|
|||
|
||||
; CHECK-LABEL: replace_v4i32:
|
||||
; NO-SIMD128-NOT: i32x4
|
||||
; SIMD128: .param v128, i32{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i32x4.replace_lane $push0=, $0, 2, $1 # encoding: [0xfd,0x13,0x02]{{$}}
|
||||
; SIMD128: return $pop0 # encoding: [0x0f]{{$}}
|
||||
; SIMD128-NEXT: .param v128, i32{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i32x4.replace_lane $push0=, $0, 2, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i32> @replace_v4i32(<4 x i32> %v, i32 %x) {
|
||||
%res = insertelement <4 x i32> %v, i32 %x, i32 2
|
||||
ret <4 x i32> %res
|
||||
|
|
@ -330,14 +318,11 @@ define <4 x i32> @replace_v4i32(<4 x i32> %v, i32 %x) {
|
|||
|
||||
; CHECK-LABEL: shuffle_v4i32:
|
||||
; NO-SIMD128-NOT: v8x16
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: v8x16.shuffle $push0=, $0, $1,
|
||||
; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31
|
||||
; SIMD128-SAME: # encoding: [0xfd,0x17,
|
||||
; SIMD128-SAME: 0x00,0x01,0x02,0x03,0x14,0x15,0x16,0x17,
|
||||
; SIMD128-SAME: 0x08,0x09,0x0a,0x0b,0x1c,0x1d,0x1e,0x1f]
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: v8x16.shuffle $push0=, $0, $1,
|
||||
; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x i32> @shuffle_v4i32(<4 x i32> %x, <4 x i32> %y) {
|
||||
%res = shufflevector <4 x i32> %x, <4 x i32> %y,
|
||||
<4 x i32> <i32 0, i32 5, i32 2, i32 7>
|
||||
|
|
@ -346,13 +331,13 @@ define <4 x i32> @shuffle_v4i32(<4 x i32> %x, <4 x i32> %y) {
|
|||
|
||||
; CHECK-LABEL: build_v4i32:
|
||||
; NO-SIMD128-NOT: i32x4
|
||||
; SIMD128: .param i32, i32, i32, i32{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i32x4.splat $push0=, $0 # encoding: [0xfd,0x05]
|
||||
; SIMD128: i32x4.replace_lane $push1=, $pop0, 1, $1 # encoding: [0xfd,0x13,0x01]
|
||||
; SIMD128: i32x4.replace_lane $push2=, $pop1, 2, $2 # encoding: [0xfd,0x13,0x02]
|
||||
; SIMD128: i32x4.replace_lane $push3=, $pop2, 3, $3 # encoding: [0xfd,0x13,0x03]
|
||||
; SIMD128: return $pop3 # encoding: [0x0f]
|
||||
; SIMD128-NEXT: .param i32, i32, i32, i32{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i32x4.splat $push0=, $0{{$}}
|
||||
; SIMD128-NEXT: i32x4.replace_lane $push1=, $pop0, 1, $1{{$}}
|
||||
; SIMD128-NEXT: i32x4.replace_lane $push2=, $pop1, 2, $2{{$}}
|
||||
; SIMD128-NEXT: i32x4.replace_lane $push3=, $pop2, 3, $3{{$}}
|
||||
; SIMD128-NEXT: return $pop3{{$}}
|
||||
define <4 x i32> @build_v4i32(i32 %x0, i32 %x1, i32 %x2, i32 %x3) {
|
||||
%t0 = insertelement <4 x i32> undef, i32 %x0, i32 0
|
||||
%t1 = insertelement <4 x i32> %t0, i32 %x1, i32 1
|
||||
|
|
@ -367,11 +352,9 @@ define <4 x i32> @build_v4i32(i32 %x0, i32 %x1, i32 %x2, i32 %x3) {
|
|||
; CHECK-LABEL: const_v2i64:
|
||||
; NO-SIMD128-NOT: i64x2
|
||||
; SIMD128-VM-NOT: i64x2
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: v128.const $push0=, 506097522914230528, 1084818905618843912
|
||||
; SIMD128-SAME: # encoding: [0xfd,0x00,
|
||||
; SIMD128-SAME: 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
|
||||
; SIMD128-SAME: 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f]{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: v128.const $push0=, 506097522914230528, 1084818905618843912{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x i64> @const_v2i64() {
|
||||
ret <2 x i64> <i64 506097522914230528, i64 1084818905618843912>
|
||||
}
|
||||
|
|
@ -379,10 +362,10 @@ define <2 x i64> @const_v2i64() {
|
|||
; CHECK-LABEL: splat_v2i64:
|
||||
; NO-SIMD128-NOT: i64x2
|
||||
; SIMD128-VM-NOT: i64x2
|
||||
; SIMD128: .param i64{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i64x2.splat $push0=, $0 # encoding: [0xfd,0x06]{{$}}
|
||||
; SIMD128: return $pop0 # encoding: [0x0f]{{$}}
|
||||
; SIMD128-NEXT: .param i64{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i64x2.splat $push0=, $0{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x i64> @splat_v2i64(i64 %x) {
|
||||
%t1 = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0
|
||||
%res = insertelement <2 x i64> %t1, i64 %x, i32 1
|
||||
|
|
@ -390,7 +373,7 @@ define <2 x i64> @splat_v2i64(i64 %x) {
|
|||
}
|
||||
|
||||
; CHECK-LABEL: const_splat_v2i64:
|
||||
; SIMD128; i64x2.splat
|
||||
; SIMD128: i64x2.splat
|
||||
define <2 x i64> @const_splat_v2i64() {
|
||||
ret <2 x i64> <i64 42, i64 42>
|
||||
}
|
||||
|
|
@ -398,10 +381,10 @@ define <2 x i64> @const_splat_v2i64() {
|
|||
; CHECK-LABEL: extract_v2i64:
|
||||
; NO-SIMD128-NOT: i64x2
|
||||
; SIMD128-VM-NOT: i64x2
|
||||
; SIMD128: .param v128{{$}}
|
||||
; SIMD128: .result i64{{$}}
|
||||
; SIMD128: i64x2.extract_lane $push0=, $0, 1 # encoding: [0xfd,0x0e,0x01]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128{{$}}
|
||||
; SIMD128-NEXT: .result i64{{$}}
|
||||
; SIMD128-NEXT: i64x2.extract_lane $push0=, $0, 1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define i64 @extract_v2i64(<2 x i64> %v) {
|
||||
%elem = extractelement <2 x i64> %v, i64 1
|
||||
ret i64 %elem
|
||||
|
|
@ -410,10 +393,10 @@ define i64 @extract_v2i64(<2 x i64> %v) {
|
|||
; CHECK-LABEL: replace_v2i64:
|
||||
; NO-SIMD128-NOT: i64x2
|
||||
; SIMD128-VM-NOT: i64x2
|
||||
; SIMD128: .param v128, i64{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i64x2.replace_lane $push0=, $0, 0, $1 # encoding: [0xfd,0x14,0x00]{{$}}
|
||||
; SIMD128: return $pop0 # encoding: [0x0f]{{$}}
|
||||
; SIMD128-NEXT: .param v128, i64{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i64x2.replace_lane $push0=, $0, 0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x i64> @replace_v2i64(<2 x i64> %v, i64 %x) {
|
||||
%res = insertelement <2 x i64> %v, i64 %x, i32 0
|
||||
ret <2 x i64> %res
|
||||
|
|
@ -421,14 +404,11 @@ define <2 x i64> @replace_v2i64(<2 x i64> %v, i64 %x) {
|
|||
|
||||
; CHECK-LABEL: shuffle_v2i64:
|
||||
; NO-SIMD128-NOT: v8x16
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: v8x16.shuffle $push0=, $0, $1,
|
||||
; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31
|
||||
; SIMD128-SAME: # encoding: [0xfd,0x17,
|
||||
; SIMD128-SAME: 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
|
||||
; SIMD128-SAME: 0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f]
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: v8x16.shuffle $push0=, $0, $1,
|
||||
; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x i64> @shuffle_v2i64(<2 x i64> %x, <2 x i64> %y) {
|
||||
%res = shufflevector <2 x i64> %x, <2 x i64> %y, <2 x i32> <i32 0, i32 3>
|
||||
ret <2 x i64> %res
|
||||
|
|
@ -437,11 +417,11 @@ define <2 x i64> @shuffle_v2i64(<2 x i64> %x, <2 x i64> %y) {
|
|||
; CHECK-LABEL: build_v2i64:
|
||||
; NO-SIMD128-NOT: i64x2
|
||||
; SIMD128-VM-NOT: i64x2
|
||||
; SIMD128: .param i64, i64{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: i64x2.splat $push0=, $0 # encoding: [0xfd,0x06]
|
||||
; SIMD128: i64x2.replace_lane $push1=, $pop0, 1, $1 # encoding: [0xfd,0x14,0x01]
|
||||
; SIMD128: return $pop1 # encoding: [0x0f]
|
||||
; SIMD128-NEXT: .param i64, i64{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: i64x2.splat $push0=, $0{{$}}
|
||||
; SIMD128-NEXT: i64x2.replace_lane $push1=, $pop0, 1, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop1{{$}}
|
||||
define <2 x i64> @build_v2i64(i64 %x0, i64 %x1) {
|
||||
%t0 = insertelement <2 x i64> undef, i64 %x0, i32 0
|
||||
%res = insertelement <2 x i64> %t0, i64 %x1, i32 1
|
||||
|
|
@ -453,12 +433,10 @@ define <2 x i64> @build_v2i64(i64 %x0, i64 %x1) {
|
|||
; ==============================================================================
|
||||
; CHECK-LABEL: const_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: v128.const $push0=,
|
||||
; SIMD128-SAME: 0x1.0402p-121, 0x1.0c0a08p-113, 0x1.14121p-105, 0x1.1c1a18p-97
|
||||
; SIMD128-SAME: # encoding: [0xfd,0x00,
|
||||
; SIMD128-SAME: 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
|
||||
; SIMD128-SAME: 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f]{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: v128.const $push0=,
|
||||
; SIMD128-SAME: 0x1.0402p-121, 0x1.0c0a08p-113, 0x1.14121p-105, 0x1.1c1a18p-97{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x float> @const_v4f32() {
|
||||
ret <4 x float> <float 0x3860402000000000, float 0x38e0c0a080000000,
|
||||
float 0x3961412100000000, float 0x39e1c1a180000000>
|
||||
|
|
@ -466,10 +444,10 @@ define <4 x float> @const_v4f32() {
|
|||
|
||||
; CHECK-LABEL: splat_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .param f32{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f32x4.splat $push0=, $0 # encoding: [0xfd,0x07]{{$}}
|
||||
; SIMD128: return $pop0 # encoding: [0x0f]{{$}}
|
||||
; SIMD128-NEXT: .param f32{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f32x4.splat $push0=, $0{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x float> @splat_v4f32(float %x) {
|
||||
%v = insertelement <4 x float> undef, float %x, i32 0
|
||||
%res = shufflevector <4 x float> %v, <4 x float> undef,
|
||||
|
|
@ -478,17 +456,17 @@ define <4 x float> @splat_v4f32(float %x) {
|
|||
}
|
||||
|
||||
; CHECK-LABEL: const_splat_v4f32
|
||||
; SIMD128; f32x4.splat
|
||||
; SIMD128: f32x4.splat
|
||||
define <4 x float> @const_splat_v4f32() {
|
||||
ret <4 x float> <float 42., float 42., float 42., float 42.>
|
||||
}
|
||||
|
||||
; CHECK-LABEL: extract_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .param v128{{$}}
|
||||
; SIMD128: .result f32{{$}}
|
||||
; SIMD128: f32x4.extract_lane $push0=, $0, 3 # encoding: [0xfd,0x0f,0x03]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128{{$}}
|
||||
; SIMD128-NEXT: .result f32{{$}}
|
||||
; SIMD128-NEXT: f32x4.extract_lane $push0=, $0, 3{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define float @extract_v4f32(<4 x float> %v) {
|
||||
%elem = extractelement <4 x float> %v, i32 3
|
||||
ret float %elem
|
||||
|
|
@ -496,10 +474,10 @@ define float @extract_v4f32(<4 x float> %v) {
|
|||
|
||||
; CHECK-LABEL: replace_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .param v128, f32{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f32x4.replace_lane $push0=, $0, 2, $1 # encoding: [0xfd,0x15,0x02]{{$}}
|
||||
; SIMD128: return $pop0 # encoding: [0x0f]{{$}}
|
||||
; SIMD128-NEXT: .param v128, f32{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f32x4.replace_lane $push0=, $0, 2, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x float> @replace_v4f32(<4 x float> %v, float %x) {
|
||||
%res = insertelement <4 x float> %v, float %x, i32 2
|
||||
ret <4 x float> %res
|
||||
|
|
@ -507,14 +485,11 @@ define <4 x float> @replace_v4f32(<4 x float> %v, float %x) {
|
|||
|
||||
; CHECK-LABEL: shuffle_v4f32:
|
||||
; NO-SIMD128-NOT: v8x16
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: v8x16.shuffle $push0=, $0, $1,
|
||||
; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31
|
||||
; SIMD128-SAME: # encoding: [0xfd,0x17,
|
||||
; SIMD128-SAME: 0x00,0x01,0x02,0x03,0x14,0x15,0x16,0x17,
|
||||
; SIMD128-SAME: 0x08,0x09,0x0a,0x0b,0x1c,0x1d,0x1e,0x1f]
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: v8x16.shuffle $push0=, $0, $1,
|
||||
; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <4 x float> @shuffle_v4f32(<4 x float> %x, <4 x float> %y) {
|
||||
%res = shufflevector <4 x float> %x, <4 x float> %y,
|
||||
<4 x i32> <i32 0, i32 5, i32 2, i32 7>
|
||||
|
|
@ -523,13 +498,13 @@ define <4 x float> @shuffle_v4f32(<4 x float> %x, <4 x float> %y) {
|
|||
|
||||
; CHECK-LABEL: build_v4f32:
|
||||
; NO-SIMD128-NOT: f32x4
|
||||
; SIMD128: .param f32, f32, f32, f32{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f32x4.splat $push0=, $0 # encoding: [0xfd,0x07]
|
||||
; SIMD128: f32x4.replace_lane $push1=, $pop0, 1, $1 # encoding: [0xfd,0x15,0x01]
|
||||
; SIMD128: f32x4.replace_lane $push2=, $pop1, 2, $2 # encoding: [0xfd,0x15,0x02]
|
||||
; SIMD128: f32x4.replace_lane $push3=, $pop2, 3, $3 # encoding: [0xfd,0x15,0x03]
|
||||
; SIMD128: return $pop3 # encoding: [0x0f]
|
||||
; SIMD128-NEXT: .param f32, f32, f32, f32{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f32x4.splat $push0=, $0{{$}}
|
||||
; SIMD128-NEXT: f32x4.replace_lane $push1=, $pop0, 1, $1{{$}}
|
||||
; SIMD128-NEXT: f32x4.replace_lane $push2=, $pop1, 2, $2{{$}}
|
||||
; SIMD128-NEXT: f32x4.replace_lane $push3=, $pop2, 3, $3{{$}}
|
||||
; SIMD128-NEXT: return $pop3{{$}}
|
||||
define <4 x float> @build_v4f32(float %x0, float %x1, float %x2, float %x3) {
|
||||
%t0 = insertelement <4 x float> undef, float %x0, i32 0
|
||||
%t1 = insertelement <4 x float> %t0, float %x1, i32 1
|
||||
|
|
@ -543,11 +518,9 @@ define <4 x float> @build_v4f32(float %x0, float %x1, float %x2, float %x3) {
|
|||
; ==============================================================================
|
||||
; CHECK-LABEL: const_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: v128.const $push0=, 0x1.60504030201p-911, 0x1.e0d0c0b0a0908p-783
|
||||
; SIMD128-SAME: # encoding: [0xfd,0x00,
|
||||
; SIMD128-SAME: 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
|
||||
; SIMD128-SAME: 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f]{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: v128.const $push0=, 0x1.60504030201p-911, 0x1.e0d0c0b0a0908p-783{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x double> @const_v2f64() {
|
||||
ret <2 x double> <double 0x0706050403020100, double 0x0F0E0D0C0B0A0908>
|
||||
}
|
||||
|
|
@ -555,10 +528,10 @@ define <2 x double> @const_v2f64() {
|
|||
; CHECK-LABEL: splat_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128: .param f64{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f64x2.splat $push0=, $0 # encoding: [0xfd,0x08]{{$}}
|
||||
; SIMD128: return $pop0 # encoding: [0x0f]{{$}}
|
||||
; SIMD128-NEXT: .param f64{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f64x2.splat $push0=, $0{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x double> @splat_v2f64(double %x) {
|
||||
%t1 = insertelement <2 x double> zeroinitializer, double %x, i3 0
|
||||
%res = insertelement <2 x double> %t1, double %x, i32 1
|
||||
|
|
@ -566,7 +539,7 @@ define <2 x double> @splat_v2f64(double %x) {
|
|||
}
|
||||
|
||||
; CHECK-LABEL: const_splat_v2f64:
|
||||
; SIMD128; f64x2.splat
|
||||
; SIMD128: f64x2.splat
|
||||
define <2 x double> @const_splat_v2f64() {
|
||||
ret <2 x double> <double 42., double 42.>
|
||||
}
|
||||
|
|
@ -574,10 +547,10 @@ define <2 x double> @const_splat_v2f64() {
|
|||
; CHECK-LABEL: extract_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128: .param v128{{$}}
|
||||
; SIMD128: .result f64{{$}}
|
||||
; SIMD128: f64x2.extract_lane $push0=, $0, 1 # encoding: [0xfd,0x10,0x01]{{$}}
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128{{$}}
|
||||
; SIMD128-NEXT: .result f64{{$}}
|
||||
; SIMD128-NEXT: f64x2.extract_lane $push0=, $0, 1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define double @extract_v2f64(<2 x double> %v) {
|
||||
%elem = extractelement <2 x double> %v, i32 1
|
||||
ret double %elem
|
||||
|
|
@ -586,10 +559,10 @@ define double @extract_v2f64(<2 x double> %v) {
|
|||
; CHECK-LABEL: replace_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128: .param v128, f64{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f64x2.replace_lane $push0=, $0, 0, $1 # encoding: [0xfd,0x16,0x00]{{$}}
|
||||
; SIMD128: return $pop0 # encoding: [0x0f]{{$}}
|
||||
; SIMD128-NEXT: .param v128, f64{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f64x2.replace_lane $push0=, $0, 0, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x double> @replace_v2f64(<2 x double> %v, double %x) {
|
||||
%res = insertelement <2 x double> %v, double %x, i32 0
|
||||
ret <2 x double> %res
|
||||
|
|
@ -597,14 +570,11 @@ define <2 x double> @replace_v2f64(<2 x double> %v, double %x) {
|
|||
|
||||
; CHECK-LABEL: shuffle_v2f64:
|
||||
; NO-SIMD128-NOT: v8x16
|
||||
; SIMD128: .param v128, v128{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: v8x16.shuffle $push0=, $0, $1,
|
||||
; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31
|
||||
; SIMD128-SAME: # encoding: [0xfd,0x17,
|
||||
; SIMD128-SAME: 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
|
||||
; SIMD128-SAME: 0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f]
|
||||
; SIMD128: return $pop0 #
|
||||
; SIMD128-NEXT: .param v128, v128{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: v8x16.shuffle $push0=, $0, $1,
|
||||
; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31{{$}}
|
||||
; SIMD128-NEXT: return $pop0{{$}}
|
||||
define <2 x double> @shuffle_v2f64(<2 x double> %x, <2 x double> %y) {
|
||||
%res = shufflevector <2 x double> %x, <2 x double> %y,
|
||||
<2 x i32> <i32 0, i32 3>
|
||||
|
|
@ -614,11 +584,11 @@ define <2 x double> @shuffle_v2f64(<2 x double> %x, <2 x double> %y) {
|
|||
; CHECK-LABEL: build_v2f64:
|
||||
; NO-SIMD128-NOT: f64x2
|
||||
; SIMD128-VM-NOT: f64x2
|
||||
; SIMD128: .param f64, f64{{$}}
|
||||
; SIMD128: .result v128{{$}}
|
||||
; SIMD128: f64x2.splat $push0=, $0 # encoding: [0xfd,0x08]
|
||||
; SIMD128: f64x2.replace_lane $push1=, $pop0, 1, $1 # encoding: [0xfd,0x16,0x01]
|
||||
; SIMD128: return $pop1 # encoding: [0x0f]
|
||||
; SIMD128-NEXT: .param f64, f64{{$}}
|
||||
; SIMD128-NEXT: .result v128{{$}}
|
||||
; SIMD128-NEXT: f64x2.splat $push0=, $0{{$}}
|
||||
; SIMD128-NEXT: f64x2.replace_lane $push1=, $pop0, 1, $1{{$}}
|
||||
; SIMD128-NEXT: return $pop1{{$}}
|
||||
define <2 x double> @build_v2f64(double %x0, double %x1) {
|
||||
%t0 = insertelement <2 x double> undef, double %x0, i32 0
|
||||
%res = insertelement <2 x double> %t0, double %x1, i32 1
|
||||
|
|
|
|||
|
|
@ -0,0 +1,298 @@
|
|||
# RUN: llvm-mc -show-encoding -triple=wasm32-unkown-unknown -mattr=+sign-ext,+simd128 < %s | FileCheck %s
|
||||
|
||||
# CHECK: v128.const 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
|
||||
# CHECK-SAME: # encoding: [0xfd,0x00,
|
||||
# CHECK-SAME: 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
|
||||
# CHECK-SAME: 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f]
|
||||
v128.const 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
|
||||
|
||||
# CHECK: v128.const 256, 770, 1284, 1798, 2312, 2826, 3340, 3854
|
||||
# CHECK-SAME: # encoding: [0xfd,0x00,
|
||||
# CHECK-SAME: 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
|
||||
# CHECK-SAME: 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f]
|
||||
v128.const 256, 770, 1284, 1798, 2312, 2826, 3340, 3854
|
||||
|
||||
# TODO(tlively): Fix assembler so v128.const works with 4xi32 and 2xi64
|
||||
|
||||
# CHECK: v128.const 0x1.0402p-121, 0x1.0c0a08p-113,
|
||||
# CHECK-SAME: 0x1.14121p-105, 0x1.1c1a18p-97
|
||||
# CHECK-SAME: # encoding: [0xfd,0x00,
|
||||
# CHECK-SAME: 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
|
||||
# CHECK-SAME: 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f]
|
||||
v128.const 0x1.0402p-121, 0x1.0c0a08p-113, 0x1.14121p-105, 0x1.1c1a18p-97
|
||||
|
||||
# CHECK: v128.const 0x1.60504030201p-911, 0x1.e0d0c0b0a0908p-783
|
||||
# CHECK-SAME: # encoding: [0xfd,0x00,
|
||||
# CHECK-SAME: 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
|
||||
# CHECK-SAME: 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f]
|
||||
v128.const 0x1.60504030201p-911, 0x1.e0d0c0b0a0908p-783
|
||||
|
||||
# CHECK: v128.load 48:p2align=0 # encoding: [0xfd,0x01,0x00,0x30]
|
||||
v128.load 48
|
||||
|
||||
# CHECK: v128.store 48:p2align=0 # encoding: [0xfd,0x02,0x00,0x30]
|
||||
v128.store 48
|
||||
|
||||
# CHECK: i8x16.splat # encoding: [0xfd,0x03]
|
||||
i8x16.splat
|
||||
|
||||
# CHECK: i16x8.splat # encoding: [0xfd,0x04]
|
||||
i16x8.splat
|
||||
|
||||
# CHECK: i32x4.splat # encoding: [0xfd,0x05]
|
||||
i32x4.splat
|
||||
|
||||
# CHECK: i64x2.splat # encoding: [0xfd,0x06]
|
||||
i64x2.splat
|
||||
|
||||
# CHECK: f32x4.splat # encoding: [0xfd,0x07]
|
||||
f32x4.splat
|
||||
|
||||
# CHECK: f64x2.splat # encoding: [0xfd,0x08]
|
||||
f64x2.splat
|
||||
|
||||
# CHECK: i8x16.extract_lane_s 15 # encoding: [0xfd,0x09,0x0f]
|
||||
i8x16.extract_lane_s 15
|
||||
|
||||
# CHECK: i8x16.extract_lane_u 15 # encoding: [0xfd,0x0a,0x0f]
|
||||
i8x16.extract_lane_u 15
|
||||
|
||||
# CHECK: i16x8.extract_lane_s 7 # encoding: [0xfd,0x0b,0x07]
|
||||
i16x8.extract_lane_s 7
|
||||
|
||||
# CHECK: i16x8.extract_lane_u 7 # encoding: [0xfd,0x0c,0x07]
|
||||
i16x8.extract_lane_u 7
|
||||
|
||||
# CHECK: i32x4.extract_lane 3 # encoding: [0xfd,0x0d,0x03]
|
||||
i32x4.extract_lane 3
|
||||
|
||||
# CHECK: i64x2.extract_lane 1 # encoding: [0xfd,0x0e,0x01]
|
||||
i64x2.extract_lane 1
|
||||
|
||||
# CHECK: f32x4.extract_lane 3 # encoding: [0xfd,0x0f,0x03]
|
||||
f32x4.extract_lane 3
|
||||
|
||||
# CHECK: f64x2.extract_lane 1 # encoding: [0xfd,0x10,0x01]
|
||||
f64x2.extract_lane 1
|
||||
|
||||
# CHECK: i8x16.replace_lane 15 # encoding: [0xfd,0x11,0x0f]
|
||||
i8x16.replace_lane 15
|
||||
|
||||
# CHECK: i16x8.replace_lane 7 # encoding: [0xfd,0x12,0x07]
|
||||
i16x8.replace_lane 7
|
||||
|
||||
# CHECK: i32x4.replace_lane 3 # encoding: [0xfd,0x13,0x03]
|
||||
i32x4.replace_lane 3
|
||||
|
||||
# CHECK: i64x2.replace_lane 1 # encoding: [0xfd,0x14,0x01]
|
||||
i64x2.replace_lane 1
|
||||
|
||||
# CHECK: f32x4.replace_lane 3 # encoding: [0xfd,0x15,0x03]
|
||||
f32x4.replace_lane 3
|
||||
|
||||
# CHECK: f64x2.replace_lane 1 # encoding: [0xfd,0x16,0x01]
|
||||
f64x2.replace_lane 1
|
||||
|
||||
# CHECK: v8x16.shuffle 0, 17, 2, 19, 4, 21, 6, 23,
|
||||
# CHECK-SAME: 8, 25, 10, 27, 12, 29, 14, 31
|
||||
# CHECK-SAME: # encoding: [0xfd,0x17,
|
||||
# CHECK-SAME: 0x00,0x11,0x02,0x13,0x04,0x15,0x06,0x17,
|
||||
# CHECK-SAME: 0x08,0x19,0x0a,0x1b,0x0c,0x1d,0x0e,0x1f]
|
||||
v8x16.shuffle 0, 17, 2, 19, 4, 21, 6, 23, 8, 25, 10, 27, 12, 29, 14, 31
|
||||
|
||||
# CHECK: i8x16.add # encoding: [0xfd,0x18]
|
||||
i8x16.add
|
||||
|
||||
# CHECK: i16x8.add # encoding: [0xfd,0x19]
|
||||
i16x8.add
|
||||
|
||||
# CHECK: i32x4.add # encoding: [0xfd,0x1a]
|
||||
i32x4.add
|
||||
|
||||
# CHECK: i64x2.add # encoding: [0xfd,0x1b]
|
||||
i64x2.add
|
||||
|
||||
# CHECK: i8x16.sub # encoding: [0xfd,0x1c]
|
||||
i8x16.sub
|
||||
|
||||
# CHECK: i16x8.sub # encoding: [0xfd,0x1d]
|
||||
i16x8.sub
|
||||
|
||||
# CHECK: i32x4.sub # encoding: [0xfd,0x1e]
|
||||
i32x4.sub
|
||||
|
||||
# CHECK: i64x2.sub # encoding: [0xfd,0x1f]
|
||||
i64x2.sub
|
||||
|
||||
# CHECK: i8x16.mul # encoding: [0xfd,0x20]
|
||||
i8x16.mul
|
||||
|
||||
# CHECK: i16x8.mul # encoding: [0xfd,0x21]
|
||||
i16x8.mul
|
||||
|
||||
# CHECK: i32x4.mul # encoding: [0xfd,0x22]
|
||||
i32x4.mul
|
||||
|
||||
# CHECK: v128.and # encoding: [0xfd,0x3b]
|
||||
v128.and
|
||||
|
||||
# CHECK: v128.or # encoding: [0xfd,0x3c]
|
||||
v128.or
|
||||
|
||||
# CHECK: v128.xor # encoding: [0xfd,0x3d]
|
||||
v128.xor
|
||||
|
||||
# CHECK: v128.not # encoding: [0xfd,0x3e]
|
||||
v128.not
|
||||
|
||||
# CHECK: i8x16.eq # encoding: [0xfd,0x48]
|
||||
i8x16.eq
|
||||
|
||||
# CHECK: i16x8.eq # encoding: [0xfd,0x49]
|
||||
i16x8.eq
|
||||
|
||||
# CHECK: i32x4.eq # encoding: [0xfd,0x4a]
|
||||
i32x4.eq
|
||||
|
||||
# CHECK: f32x4.eq # encoding: [0xfd,0x4b]
|
||||
f32x4.eq
|
||||
|
||||
# CHECK: f64x2.eq # encoding: [0xfd,0x4c]
|
||||
f64x2.eq
|
||||
|
||||
# CHECK: i8x16.ne # encoding: [0xfd,0x4d]
|
||||
i8x16.ne
|
||||
|
||||
# CHECK: i16x8.ne # encoding: [0xfd,0x4e]
|
||||
i16x8.ne
|
||||
|
||||
# CHECK: i32x4.ne # encoding: [0xfd,0x4f]
|
||||
i32x4.ne
|
||||
|
||||
# CHECK: f32x4.ne # encoding: [0xfd,0x50]
|
||||
f32x4.ne
|
||||
|
||||
# CHECK: f64x2.ne # encoding: [0xfd,0x51]
|
||||
f64x2.ne
|
||||
|
||||
# CHECK: i8x16.lt_s # encoding: [0xfd,0x52]
|
||||
i8x16.lt_s
|
||||
|
||||
# CHECK: i8x16.lt_u # encoding: [0xfd,0x53]
|
||||
i8x16.lt_u
|
||||
|
||||
# CHECK: i16x8.lt_s # encoding: [0xfd,0x54]
|
||||
i16x8.lt_s
|
||||
|
||||
# CHECK: i16x8.lt_u # encoding: [0xfd,0x55]
|
||||
i16x8.lt_u
|
||||
|
||||
# CHECK: i32x4.lt_s # encoding: [0xfd,0x56]
|
||||
i32x4.lt_s
|
||||
|
||||
# CHECK: i32x4.lt_u # encoding: [0xfd,0x57]
|
||||
i32x4.lt_u
|
||||
|
||||
# CHECK: f32x4.lt # encoding: [0xfd,0x58]
|
||||
f32x4.lt
|
||||
|
||||
# CHECK: f64x2.lt # encoding: [0xfd,0x59]
|
||||
f64x2.lt
|
||||
|
||||
# CHECK: i8x16.le_s # encoding: [0xfd,0x5a]
|
||||
i8x16.le_s
|
||||
|
||||
# CHECK: i8x16.le_u # encoding: [0xfd,0x5b]
|
||||
i8x16.le_u
|
||||
|
||||
# CHECK: i16x8.le_s # encoding: [0xfd,0x5c]
|
||||
i16x8.le_s
|
||||
|
||||
# CHECK: i16x8.le_u # encoding: [0xfd,0x5d]
|
||||
i16x8.le_u
|
||||
|
||||
# CHECK: i32x4.le_s # encoding: [0xfd,0x5e]
|
||||
i32x4.le_s
|
||||
|
||||
# CHECK: i32x4.le_u # encoding: [0xfd,0x5f]
|
||||
i32x4.le_u
|
||||
|
||||
# CHECK: f32x4.le # encoding: [0xfd,0x60]
|
||||
f32x4.le
|
||||
|
||||
# CHECK: f64x2.le # encoding: [0xfd,0x61]
|
||||
f64x2.le
|
||||
|
||||
# CHECK: i8x16.gt_s # encoding: [0xfd,0x62]
|
||||
i8x16.gt_s
|
||||
|
||||
# CHECK: i8x16.gt_u # encoding: [0xfd,0x63]
|
||||
i8x16.gt_u
|
||||
|
||||
# CHECK: i16x8.gt_s # encoding: [0xfd,0x64]
|
||||
i16x8.gt_s
|
||||
|
||||
# CHECK: i16x8.gt_u # encoding: [0xfd,0x65]
|
||||
i16x8.gt_u
|
||||
|
||||
# CHECK: i32x4.gt_s # encoding: [0xfd,0x66]
|
||||
i32x4.gt_s
|
||||
|
||||
# CHECK: i32x4.gt_u # encoding: [0xfd,0x67]
|
||||
i32x4.gt_u
|
||||
|
||||
# CHECK: f32x4.gt # encoding: [0xfd,0x68]
|
||||
f32x4.gt
|
||||
|
||||
# CHECK: f64x2.gt # encoding: [0xfd,0x69]
|
||||
f64x2.gt
|
||||
|
||||
# CHECK: i8x16.ge_s # encoding: [0xfd,0x6a]
|
||||
i8x16.ge_s
|
||||
|
||||
# CHECK: i8x16.ge_u # encoding: [0xfd,0x6b]
|
||||
i8x16.ge_u
|
||||
|
||||
# CHECK: i16x8.ge_s # encoding: [0xfd,0x6c]
|
||||
i16x8.ge_s
|
||||
|
||||
# CHECK: i16x8.ge_u # encoding: [0xfd,0x6d]
|
||||
i16x8.ge_u
|
||||
|
||||
# CHECK: i32x4.ge_s # encoding: [0xfd,0x6e]
|
||||
i32x4.ge_s
|
||||
|
||||
# CHECK: i32x4.ge_u # encoding: [0xfd,0x6f]
|
||||
i32x4.ge_u
|
||||
|
||||
# CHECK: f32x4.ge # encoding: [0xfd,0x70]
|
||||
f32x4.ge
|
||||
|
||||
# CHECK: f64x2.ge # encoding: [0xfd,0x71]
|
||||
f64x2.ge
|
||||
|
||||
# CHECK: f32x4.add # encoding: [0xfd,0x7a]
|
||||
f32x4.add
|
||||
|
||||
# CHECK: f64x2.add # encoding: [0xfd,0x7b]
|
||||
f64x2.add
|
||||
|
||||
# CHECK: f32x4.sub # encoding: [0xfd,0x7c]
|
||||
f32x4.sub
|
||||
|
||||
# CHECK: f64x2.sub # encoding: [0xfd,0x7d]
|
||||
f64x2.sub
|
||||
|
||||
# CHECK: f32x4.div # encoding: [0xfd,0x7e]
|
||||
f32x4.div
|
||||
|
||||
# CHECK: f64x2.div # encoding: [0xfd,0x7f]
|
||||
f64x2.div
|
||||
|
||||
# CHECK: f32x4.mul # encoding: [0xfd,0x80]
|
||||
f32x4.mul
|
||||
|
||||
# CHECK: f64x2.mul # encoding: [0xfd,0x81]
|
||||
f64x2.mul
|
||||
|
||||
end_function
|
||||
Loading…
Reference in New Issue