maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[GlobalISel] Factor narrowScalar for G_ASHR and G_LSHR. NFC 

Main difference is in the way Hi for Long shift (HiL) is made.
G_LSHR fills HiL with zeros, while G_ASHR fills HiL with sign bit value.

Differential Revision: https://reviews.llvm.org/D66589

llvm-svn: 370064
This commit is contained in:
Petar Avramovic 2019-08-27 14:33:05 +00:00
parent d568ed40e0
commit a393238422
1 changed files with 11 additions and 27 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

38
llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
View File

@ -3010,41 +3010,25 @@ LegalizerHelper::narrowScalarShift(MachineInstr &MI, unsigned TypeIdx,
ResultRegs[1] = Hi.getReg(0); ResultRegs[1] = Hi.getReg(0);
break; break;
} }
case TargetOpcode::G_LSHR: { case TargetOpcode::G_LSHR:
// Short: ShAmt < NewBitSize
auto HiS = MIRBuilder.buildLShr(HalfTy, InH, Amt);
auto LoOr = MIRBuilder.buildLShr(HalfTy, InL, Amt);
auto HiOr = MIRBuilder.buildShl(HalfTy, InH, AmtLack);
auto LoS = MIRBuilder.buildOr(HalfTy, LoOr, HiOr);
// Long: ShAmt >= NewBitSize
auto HiL = MIRBuilder.buildConstant(HalfTy, 0); // Hi part is zero.
auto LoL = MIRBuilder.buildLShr(HalfTy, InH, AmtExcess); // Lo from Hi part.
auto Lo = MIRBuilder.buildSelect(
HalfTy, IsZero, InL, MIRBuilder.buildSelect(HalfTy, IsShort, LoS, LoL));
auto Hi = MIRBuilder.buildSelect(HalfTy, IsShort, HiS, HiL);
ResultRegs[0] = Lo.getReg(0);
ResultRegs[1] = Hi.getReg(0);
break;
}
case TargetOpcode::G_ASHR: { case TargetOpcode::G_ASHR: {
// Short: ShAmt < NewBitSize // Short: ShAmt < NewBitSize
auto HiS = MIRBuilder.buildAShr(HalfTy, InH, Amt); auto HiS = MIRBuilder.buildInstr(MI.getOpcode(), {HalfTy}, {InH, Amt});
auto LoOr = MIRBuilder.buildLShr(HalfTy, InL, Amt); auto LoOr = MIRBuilder.buildLShr(HalfTy, InL, Amt);
auto HiOr = MIRBuilder.buildShl(HalfTy, InH, AmtLack); auto HiOr = MIRBuilder.buildShl(HalfTy, InH, AmtLack);
auto LoS = MIRBuilder.buildOr(HalfTy, LoOr, HiOr); auto LoS = MIRBuilder.buildOr(HalfTy, LoOr, HiOr);
// Long: ShAmt >= NewBitSize // Long: ShAmt >= NewBitSize
MachineInstrBuilder HiL;
// Sign of Hi part. if (MI.getOpcode() == TargetOpcode::G_LSHR) {
auto HiL = MIRBuilder.buildAShr( HiL = MIRBuilder.buildConstant(HalfTy, 0); // Hi part is zero.
HalfTy, InH, MIRBuilder.buildConstant(ShiftAmtTy, NewBitSize - 1)); } else {
auto ShiftAmt = MIRBuilder.buildConstant(ShiftAmtTy, NewBitSize - 1);
auto LoL = MIRBuilder.buildAShr(HalfTy, InH, AmtExcess); // Lo from Hi part. HiL = MIRBuilder.buildAShr(HalfTy, InH, ShiftAmt); // Sign of Hi part.
}
auto LoL = MIRBuilder.buildInstr(MI.getOpcode(), {HalfTy},
{InH, AmtExcess}); // Lo from Hi part.
auto Lo = MIRBuilder.buildSelect( auto Lo = MIRBuilder.buildSelect(
HalfTy, IsZero, InL, MIRBuilder.buildSelect(HalfTy, IsShort, LoS, LoL)); HalfTy, IsZero, InL, MIRBuilder.buildSelect(HalfTy, IsShort, LoS, LoL));