forked from OSchip/llvm-project
Try to get ahead of Johnny Chen and pro-actively add some more ARM encoding
bits. Johnny, please review -- I do not have a good track record of getting these right. llvm-svn: 85173
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@ -1092,6 +1092,7 @@ defm SBC : AI1_adde_sube_irs<0b0110, "sbc",
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def RSBri : AsI1<0b0011, (outs GPR:$dst), (ins GPR:$a, so_imm:$b), DPFrm,
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IIC_iALUi, "rsb", " $dst, $a, $b",
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[(set GPR:$dst, (sub so_imm:$b, GPR:$a))]> {
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let Inst{20} = 0;
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let Inst{25} = 1;
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}
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@ -1100,6 +1101,7 @@ def RSBrs : AsI1<0b0011, (outs GPR:$dst), (ins GPR:$a, so_reg:$b), DPSoRegFrm,
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[(set GPR:$dst, (sub so_reg:$b, GPR:$a))]> {
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let Inst{4} = 1;
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let Inst{7} = 0;
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let Inst{20} = 0;
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let Inst{25} = 0;
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}
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@ -1126,12 +1128,18 @@ def RSCri : AsI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_imm:$b),
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DPFrm, IIC_iALUi, "rsc", " $dst, $a, $b",
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[(set GPR:$dst, (sube so_imm:$b, GPR:$a))]>,
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Requires<[IsARM, CarryDefIsUnused]> {
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let Inst{20} = 0;
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let Inst{25} = 1;
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}
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def RSCrs : AsI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_reg:$b),
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DPSoRegFrm, IIC_iALUsr, "rsc", " $dst, $a, $b",
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[(set GPR:$dst, (sube so_reg:$b, GPR:$a))]>,
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Requires<[IsARM, CarryDefIsUnused]>;
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Requires<[IsARM, CarryDefIsUnused]> {
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let Inst{4} = 1;
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let Inst{7} = 0;
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let Inst{20} = 0;
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let Inst{25} = 0;
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}
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}
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// FIXME: Allow these to be predicated.
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@ -1140,12 +1148,18 @@ def RSCSri : AXI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_imm:$b),
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DPFrm, IIC_iALUi, "rscs $dst, $a, $b",
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[(set GPR:$dst, (sube so_imm:$b, GPR:$a))]>,
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Requires<[IsARM, CarryDefIsUnused]> {
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let Inst{20} = 1;
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let Inst{25} = 1;
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}
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def RSCSrs : AXI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_reg:$b),
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DPSoRegFrm, IIC_iALUsr, "rscs $dst, $a, $b",
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[(set GPR:$dst, (sube so_reg:$b, GPR:$a))]>,
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Requires<[IsARM, CarryDefIsUnused]>;
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Requires<[IsARM, CarryDefIsUnused]> {
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let Inst{4} = 1;
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let Inst{7} = 0;
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let Inst{20} = 1;
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let Inst{25} = 0;
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}
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}
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// (sub X, imm) gets canonicalized to (add X, -imm). Match this form.
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