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Range'ify some for loops over RecordDecl::fields() 

No functionality change.

llvm-svn: 216183
This commit is contained in:
Hans Wennborg 2014-08-21 16:06:57 +00:00
parent 5e98ff967b
commit a302cd9a5e
4 changed files with 16 additions and 18 deletions
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7
clang/lib/AST/ASTContext.cpp
View File

@ -5617,12 +5617,11 @@ void ASTContext::getObjCEncodingForStructureImpl(RecordDecl *RDecl,
}
unsigned i = 0;
for (RecordDecl::field_iterator Field = RDecl->field_begin(),
FieldEnd = RDecl->field_end();
Field != FieldEnd; ++Field, ++i) {
for (auto *Field : RDecl->fields()) {
uint64_t offs = layout.getFieldOffset(i);
FieldOrBaseOffsets.insert(FieldOrBaseOffsets.upper_bound(offs),
std::make_pair(offs, *Field));
std::make_pair(offs, Field));
++i;
}
if (CXXRec && includeVBases) {

7
clang/lib/AST/Decl.cpp
View File

@ -3277,9 +3277,10 @@ unsigned FieldDecl::getFieldIndex() const {
unsigned Index = 0;
const RecordDecl *RD = getParent();
for (RecordDecl::field_iterator I = RD->field_begin(), E = RD->field_end();
I != E; ++I, ++Index)
I->getCanonicalDecl()->CachedFieldIndex = Index + 1;
for (auto *Field : RD->fields()) {
Field->getCanonicalDecl()->CachedFieldIndex = Index + 1;
++Index;
}
assert(CachedFieldIndex && "failed to find field in parent");
return CachedFieldIndex - 1;

5
clang/lib/AST/Expr.cpp
View File

@ -2734,10 +2734,9 @@ bool Expr::isConstantInitializer(ASTContext &Ctx, bool IsForRef,
if (ILE->getType()->isRecordType()) {
unsigned ElementNo = 0;
RecordDecl *RD = ILE->getType()->getAs<RecordType>()->getDecl();
for (RecordDecl::field_iterator Field = RD->field_begin(),
FieldEnd = RD->field_end(); Field != FieldEnd; ++Field) {
for (const auto *Field : RD->fields()) {
// If this is a union, skip all the fields that aren't being initialized.
if (RD->isUnion() && ILE->getInitializedFieldInUnion() != *Field)
if (RD->isUnion() && ILE->getInitializedFieldInUnion() != Field)
continue;
// Don't emit anonymous bitfields, they just affect layout.

15
clang/lib/CodeGen/TargetInfo.cpp
View File

@ -6415,26 +6415,25 @@ static bool extractFieldType(SmallVectorImpl<FieldEncoding> &FE,
const RecordDecl *RD,
const CodeGen::CodeGenModule &CGM,
TypeStringCache &TSC) {
for (RecordDecl::field_iterator I = RD->field_begin(), E = RD->field_end();
I != E; ++I) {
for (const auto *Field : RD->fields()) {
SmallStringEnc Enc;
Enc += "m(";
Enc += I->getName();
Enc += Field->getName();
Enc += "){";
if (I->isBitField()) {
if (Field->isBitField()) {
Enc += "b(";
llvm::raw_svector_ostream OS(Enc);
OS.resync();
OS << I->getBitWidthValue(CGM.getContext());
OS << Field->getBitWidthValue(CGM.getContext());
OS.flush();
Enc += ':';
}
if (!appendType(Enc, I->getType(), CGM, TSC))
if (!appendType(Enc, Field->getType(), CGM, TSC))
return false;
if (I->isBitField())
if (Field->isBitField())
Enc += ')';
Enc += '}';
FE.push_back(FieldEncoding(!I->getName().empty(), Enc));
FE.push_back(FieldEncoding(!Field->getName().empty(), Enc));
}
return true;
}