forked from OSchip/llvm-project
Teach IVUsers to stop at non-affine expressions unless they are both
outside the loop and reducible. This more completely hides them from LSR, which isn't usually able to do anything meaningful with non-affine expressions anyway, and this consequently hides them from SCEVExpander, which is acutely unprepared for non-affine expressions. Replace test/CodeGen/X86/lsr-nonaffine.ll with a new test that tests the new behavior. This works around the bug in PR10117 / rdar://problem/9633149, and is generally an improvement besides. llvm-svn: 134268
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@ -46,17 +46,20 @@ Pass *llvm::createIVUsersPass() {
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/// used by the given expression, within the context of analyzing the
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/// given loop.
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static bool isInteresting(const SCEV *S, const Instruction *I, const Loop *L,
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ScalarEvolution *SE) {
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ScalarEvolution *SE, LoopInfo *LI) {
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// An addrec is interesting if it's affine or if it has an interesting start.
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if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
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// Keep things simple. Don't touch loop-variant strides.
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// Keep things simple. Don't touch loop-variant strides unless they're
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// only used outside the loop and we can simplify them.
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if (AR->getLoop() == L)
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return AR->isAffine() || !L->contains(I);
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return AR->isAffine() ||
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(!L->contains(I) &&
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SE->getSCEVAtScope(AR, LI->getLoopFor(I->getParent())) != AR);
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// Otherwise recurse to see if the start value is interesting, and that
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// the step value is not interesting, since we don't yet know how to
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// do effective SCEV expansions for addrecs with interesting steps.
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return isInteresting(AR->getStart(), I, L, SE) &&
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!isInteresting(AR->getStepRecurrence(*SE), I, L, SE);
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return isInteresting(AR->getStart(), I, L, SE, LI) &&
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!isInteresting(AR->getStepRecurrence(*SE), I, L, SE, LI);
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}
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// An add is interesting if exactly one of its operands is interesting.
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@ -64,7 +67,7 @@ static bool isInteresting(const SCEV *S, const Instruction *I, const Loop *L,
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bool AnyInterestingYet = false;
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for (SCEVAddExpr::op_iterator OI = Add->op_begin(), OE = Add->op_end();
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OI != OE; ++OI)
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if (isInteresting(*OI, I, L, SE)) {
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if (isInteresting(*OI, I, L, SE, LI)) {
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if (AnyInterestingYet)
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return false;
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AnyInterestingYet = true;
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@ -98,7 +101,7 @@ bool IVUsers::AddUsersIfInteresting(Instruction *I) {
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// If we've come to an uninteresting expression, stop the traversal and
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// call this a user.
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if (!isInteresting(ISE, I, L, SE))
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if (!isInteresting(ISE, I, L, SE, LI))
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return false;
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SmallPtrSet<Instruction *, 4> UniqueUsers;
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@ -1,23 +1,30 @@
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; RUN: llc -march=x86-64 < %s | FileCheck %s
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; RUN: llc -asm-verbose=false -march=x86-64 -o - < %s | FileCheck %s
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; LSR should compute the correct starting values for this loop. Note that
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; it's not necessarily LSR's job to compute loop exit expressions; that's
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; indvars' job.
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; CHECK: movl $12
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; CHECK: movl $42
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; LSR should leave non-affine expressions alone because it currently
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; doesn't know how to do anything with them, and when it tries, it
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; gets SCEVExpander's current expansion for them, which is suboptimal.
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define i32 @real_symmetric_eigen(i32 %n) nounwind {
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while.body127: ; preds = %while.cond122
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br label %while.cond141
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; CHECK: xorl %eax, %eax
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; CHECK-NEXT: align
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; CHECK-NEXT: BB0_1:
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; CHECK-NEXT: movq %rax, (%rdx)
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; CHECK-NEXT: addq %rsi, %rax
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; CHECK-NEXT: cmpq %rdi, %rax
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; CHECK-NEXT: jl
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; CHECK-NEXT: imulq %rax, %rax
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; CHECK-NEXT: ret
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define i64 @foo(i64 %n, i64 %s, i64* %p) nounwind {
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entry:
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br label %loop
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while.cond141: ; preds = %while.cond141, %while.body127
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%0 = phi i32 [ 7, %while.body127 ], [ %indvar.next67, %while.cond141 ] ; <i32> [#uses=3]
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%indvar.next67 = add i32 %0, 1 ; <i32> [#uses=1]
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%t = icmp slt i32 %indvar.next67, %n
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br i1 %t, label %if.then171, label %while.cond141
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loop:
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%i = phi i64 [ 0, %entry ], [ %i.next, %loop ]
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volatile store i64 %i, i64* %p
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%i.next = add i64 %i, %s
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%c = icmp slt i64 %i.next, %n
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br i1 %c, label %loop, label %exit
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if.then171: ; preds = %while.cond141
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%mul150 = mul i32 %0, %0 ; <i32> [#uses=1]
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%add174 = add i32 %mul150, %0 ; <i32> [#uses=1]
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ret i32 %add174
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exit:
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%mul = mul i64 %i.next, %i.next
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ret i64 %mul
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}
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