forked from OSchip/llvm-project
Correct the upper bound for a CBZ/CBNZ branch target.
Summary: Fix for the upper bound check that was causing a build failure. Reviewers: olista01, rengolin, t.p.northover Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D23501 llvm-svn: 278789
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@ -578,8 +578,10 @@ unsigned ARMAsmBackend::adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
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// Offset by 4, and don't encode the low two bits.
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return ((Value - 4) >> 2) & 0xff;
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case ARM::fixup_arm_thumb_cb: {
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// CB instructions can only branch to offsets in [0, 126] in multiples of 2
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if (Ctx && ((int64_t)Value < 0 || Value > 0x3e || Value & 1)) {
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// CB instructions can only branch to offsets in [4, 126] in multiples of 2
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// so ensure that the raw value LSB is zero and it lies in [2, 130].
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// An offset of 2 will be relaxed to a NOP.
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if (Ctx && ((int64_t)Value < 2 || Value > 0x82 || Value & 1)) {
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Ctx->reportError(Fixup.getLoc(), "out of range pc-relative fixup value");
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return 0;
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}
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@ -16,4 +16,16 @@ label0:
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.space 1000
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label1:
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.word 4
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nop
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@ CHECK: out of range pc-relative fixup value
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cbz r0, label2
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.space 130
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label2:
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nop
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@ CHECK-NOT: label3
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cbnz r0, label3
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.space 128
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label3:
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nop
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