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[RISCV] Remove Zbproposedc extension 

This consists of 3 compressed instructions, c.not, c.neg, and c.zext.w.
I believe these have been picked up by the Zce effort using different
encodings. I don't think it makes sense to keep them in bitmanip. It
will eventually cause a conflict if/when Zce is implemented in llvm.

Differential Revision: https://reviews.llvm.org/D110871
This commit is contained in:
Craig Topper 2021-09-30 12:00:31 -07:00
parent 962e503cc8
commit a21c557955
18 changed files with 1 additions and 192 deletions
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6
clang/lib/Basic/Targets/RISCV.cpp
View File

@ -207,9 +207,6 @@ void RISCVTargetInfo::getTargetDefines(const LangOptions &Opts,
if (HasZbp) if (HasZbp)
Builder.defineMacro("__riscv_zbp", "93000"); Builder.defineMacro("__riscv_zbp", "93000");
if (HasZbproposedc)
Builder.defineMacro("__riscv_zbproposedc", "93000");
if (HasZbr) if (HasZbr)
Builder.defineMacro("__riscv_zbr", "93000"); Builder.defineMacro("__riscv_zbr", "93000");
@ -274,7 +271,6 @@ bool RISCVTargetInfo::hasFeature(StringRef Feature) const {
.Case("experimental-zbf", HasZbf) .Case("experimental-zbf", HasZbf)
.Case("experimental-zbm", HasZbm) .Case("experimental-zbm", HasZbm)
.Case("experimental-zbp", HasZbp) .Case("experimental-zbp", HasZbp)
.Case("experimental-zbproposedc", HasZbproposedc)
.Case("experimental-zbr", HasZbr) .Case("experimental-zbr", HasZbr)
.Case("experimental-zbs", HasZbs) .Case("experimental-zbs", HasZbs)
.Case("experimental-zbt", HasZbt) .Case("experimental-zbt", HasZbt)
@ -316,8 +312,6 @@ bool RISCVTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
HasZbm = true; HasZbm = true;
else if (Feature == "+experimental-zbp") else if (Feature == "+experimental-zbp")
HasZbp = true; HasZbp = true;
else if (Feature == "+experimental-zbproposedc")
HasZbproposedc = true;
else if (Feature == "+experimental-zbr") else if (Feature == "+experimental-zbr")
HasZbr = true; HasZbr = true;
else if (Feature == "+experimental-zbs") else if (Feature == "+experimental-zbs")

1
clang/lib/Basic/Targets/RISCV.h
View File

@ -39,7 +39,6 @@ protected:
bool HasZbf = false; bool HasZbf = false;
bool HasZbm = false; bool HasZbm = false;
bool HasZbp = false; bool HasZbp = false;
bool HasZbproposedc = false;
bool HasZbr = false; bool HasZbr = false;
bool HasZbs = false; bool HasZbs = false;
bool HasZbt = false; bool HasZbt = false;

2
clang/lib/Driver/ToolChains/Arch/RISCV.cpp
View File

@ -60,7 +60,7 @@ static Optional<RISCVExtensionVersion>
isExperimentalExtension(StringRef Ext) { isExperimentalExtension(StringRef Ext) {
if (Ext == "b" || Ext == "zba" || Ext == "zbb" || Ext == "zbc" || if (Ext == "b" || Ext == "zba" || Ext == "zbb" || Ext == "zbc" ||
Ext == "zbe" || Ext == "zbf" || Ext == "zbm" || Ext == "zbp" || Ext == "zbe" || Ext == "zbf" || Ext == "zbm" || Ext == "zbp" ||
Ext == "zbr" || Ext == "zbs" || Ext == "zbt" || Ext == "zbproposedc") Ext == "zbr" || Ext == "zbs" || Ext == "zbt")
return RISCVExtensionVersion{"0", "93"}; return RISCVExtensionVersion{"0", "93"};
if (Ext == "v" || Ext == "zvamo" || Ext == "zvlsseg") if (Ext == "v" || Ext == "zvamo" || Ext == "zvlsseg")
return RISCVExtensionVersion{"0", "10"}; return RISCVExtensionVersion{"0", "10"};

10
clang/test/Preprocessor/riscv-target-features.c
View File

@ -25,7 +25,6 @@
// CHECK-NOT: __riscv_zbf // CHECK-NOT: __riscv_zbf
// CHECK-NOT: __riscv_zbm // CHECK-NOT: __riscv_zbm
// CHECK-NOT: __riscv_zbp // CHECK-NOT: __riscv_zbp
// CHECK-NOT: __riscv_zbproposedc
// CHECK-NOT: __riscv_zbr // CHECK-NOT: __riscv_zbr
// CHECK-NOT: __riscv_zbs // CHECK-NOT: __riscv_zbs
// CHECK-NOT: __riscv_zbt // CHECK-NOT: __riscv_zbt
@ -182,15 +181,6 @@
// CHECK-ZBP-NOT: __riscv_b // CHECK-ZBP-NOT: __riscv_b
// CHECK-ZBP-EXT: __riscv_zbp 93000 // CHECK-ZBP-EXT: __riscv_zbp 93000
// RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \
// RUN: -march=rv32izbproposedc0p93 -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBPROPOSEDC-EXT %s
// RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \
// RUN: -march=rv32izbproposedc0p93 -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBPROPOSEDC-EXT %s
// CHECK-ZBPROPOSEDC-NOT: __riscv_b
// CHECK-ZBPROPOSEDC-EXT: __riscv_zbproposedc 93000
// RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \ // RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \
// RUN: -march=rv32izbr0p93 -x c -E -dM %s \ // RUN: -march=rv32izbr0p93 -x c -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZBR-EXT %s // RUN: -o - | FileCheck --check-prefix=CHECK-ZBR-EXT %s

7
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
View File

@ -2078,8 +2078,6 @@ bool RISCVAsmParser::parseDirectiveAttribute() {
clearFeatureBits(RISCV::FeatureStdExtZbf, "experimental-zbf"); clearFeatureBits(RISCV::FeatureStdExtZbf, "experimental-zbf");
clearFeatureBits(RISCV::FeatureStdExtZbm, "experimental-zbm"); clearFeatureBits(RISCV::FeatureStdExtZbm, "experimental-zbm");
clearFeatureBits(RISCV::FeatureStdExtZbp, "experimental-zbp"); clearFeatureBits(RISCV::FeatureStdExtZbp, "experimental-zbp");
clearFeatureBits(RISCV::FeatureStdExtZbproposedc,
"experimental-zbproposedc");
clearFeatureBits(RISCV::FeatureStdExtZbr, "experimental-zbr"); clearFeatureBits(RISCV::FeatureStdExtZbr, "experimental-zbr");
clearFeatureBits(RISCV::FeatureStdExtZbs, "experimental-zbs"); clearFeatureBits(RISCV::FeatureStdExtZbs, "experimental-zbs");
clearFeatureBits(RISCV::FeatureStdExtZbt, "experimental-zbt"); clearFeatureBits(RISCV::FeatureStdExtZbt, "experimental-zbt");
@ -2130,9 +2128,6 @@ bool RISCVAsmParser::parseDirectiveAttribute() {
setFeatureBits(RISCV::FeatureStdExtZbm, "experimental-zbm"); setFeatureBits(RISCV::FeatureStdExtZbm, "experimental-zbm");
else if (Ext == "zbp") else if (Ext == "zbp")
setFeatureBits(RISCV::FeatureStdExtZbp, "experimental-zbp"); setFeatureBits(RISCV::FeatureStdExtZbp, "experimental-zbp");
else if (Ext == "zbproposedc")
setFeatureBits(RISCV::FeatureStdExtZbproposedc,
"experimental-zbproposedc");
else if (Ext == "zbr") else if (Ext == "zbr")
setFeatureBits(RISCV::FeatureStdExtZbr, "experimental-zbr"); setFeatureBits(RISCV::FeatureStdExtZbr, "experimental-zbr");
else if (Ext == "zbs") else if (Ext == "zbs")
@ -2207,8 +2202,6 @@ bool RISCVAsmParser::parseDirectiveAttribute() {
formalArchStr = (Twine(formalArchStr) + "_zbm0p93").str(); formalArchStr = (Twine(formalArchStr) + "_zbm0p93").str();
if (getFeatureBits(RISCV::FeatureStdExtZbp)) if (getFeatureBits(RISCV::FeatureStdExtZbp))
formalArchStr = (Twine(formalArchStr) + "_zbp0p93").str(); formalArchStr = (Twine(formalArchStr) + "_zbp0p93").str();
if (getFeatureBits(RISCV::FeatureStdExtZbproposedc))
formalArchStr = (Twine(formalArchStr) + "_zbproposedc0p93").str();
if (getFeatureBits(RISCV::FeatureStdExtZbr)) if (getFeatureBits(RISCV::FeatureStdExtZbr))
formalArchStr = (Twine(formalArchStr) + "_zbr0p93").str(); formalArchStr = (Twine(formalArchStr) + "_zbr0p93").str();
if (getFeatureBits(RISCV::FeatureStdExtZbs)) if (getFeatureBits(RISCV::FeatureStdExtZbs))

13
llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
View File

@ -449,19 +449,6 @@ DecodeStatus RISCVDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
} }
} }
if (STI.getFeatureBits()[RISCV::FeatureStdExtZbproposedc] &&
STI.getFeatureBits()[RISCV::FeatureStdExtC]) {
LLVM_DEBUG(
dbgs() << "Trying RVBC32 table (BitManip 16-bit Instruction):\n");
// Calling the auto-generated decoder function.
Result = decodeInstruction(DecoderTableRVBC16, MI, Insn, Address,
this, STI);
if (Result != MCDisassembler::Fail) {
Size = 2;
return Result;
}
}
LLVM_DEBUG(dbgs() << "Trying RISCV_C table (16-bit Instruction):\n"); LLVM_DEBUG(dbgs() << "Trying RISCV_C table (16-bit Instruction):\n");
// Calling the auto-generated decoder function. // Calling the auto-generated decoder function.
Result = decodeInstruction(DecoderTable16, MI, Insn, Address, this, STI); Result = decodeInstruction(DecoderTable16, MI, Insn, Address, this, STI);

2
llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
View File

@ -80,8 +80,6 @@ void RISCVTargetStreamer::emitTargetAttributes(const MCSubtargetInfo &STI) {
Arch += "_zbm0p93"; Arch += "_zbm0p93";
if (STI.hasFeature(RISCV::FeatureStdExtZbp)) if (STI.hasFeature(RISCV::FeatureStdExtZbp))
Arch += "_zbp0p93"; Arch += "_zbp0p93";
if (STI.hasFeature(RISCV::FeatureStdExtZbproposedc))
Arch += "_zbproposedc0p93";
if (STI.hasFeature(RISCV::FeatureStdExtZbr)) if (STI.hasFeature(RISCV::FeatureStdExtZbr))
Arch += "_zbr0p93"; Arch += "_zbr0p93";
if (STI.hasFeature(RISCV::FeatureStdExtZbs)) if (STI.hasFeature(RISCV::FeatureStdExtZbs))

7
llvm/lib/Target/RISCV/RISCV.td
View File

@ -135,13 +135,6 @@ def HasStdExtZbbOrZbp
"'Zbb' (Base 'B' Instructions) or " "'Zbb' (Base 'B' Instructions) or "
"'Zbp' (Permutation 'B' Instructions)">; "'Zbp' (Permutation 'B' Instructions)">;
def FeatureStdExtZbproposedc
: SubtargetFeature<"experimental-zbproposedc", "HasStdExtZbproposedc", "true",
"'Zbproposedc' (Proposed Compressed 'B' Instructions)">;
def HasStdExtZbproposedc : Predicate<"Subtarget->hasStdExtZbproposedc()">,
AssemblerPredicate<(all_of FeatureStdExtZbproposedc),
"'Zbproposedc' (Proposed Compressed 'B' Instructions)">;
def FeatureStdExtB def FeatureStdExtB
: SubtargetFeature<"experimental-b", "HasStdExtB", "true", : SubtargetFeature<"experimental-b", "HasStdExtB", "true",
"'B' (Bit Manipulation Instructions)", "'B' (Bit Manipulation Instructions)",

46
llvm/lib/Target/RISCV/RISCVInstrInfoB.td
View File

@ -610,37 +610,6 @@ def ORCB : RVInstI<0b101, OPC_OP_IMM, (outs GPR:$rd), (ins GPR:$rs1),
} }
} // Predicates = [HasStdExtZbbOrZbp] } // Predicates = [HasStdExtZbbOrZbp]
//===----------------------------------------------------------------------===//
// Future compressed instructions
//===----------------------------------------------------------------------===//
// The presence of these instructions in the B extension is purely experimental
// and they should be moved to the C extension as soon as they are ratified.
let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
class RVBInstC<bits<2> funct2, string opcodestr>
: RVInst16<(outs GPRC:$rs_wb), (ins GPRC:$rs), opcodestr, "$rs", [],
InstFormatCR> {
bits<3> rs;
let Constraints = "$rs = $rs_wb";
let Inst{15-12} = 0b0110;
let Inst{11-10} = funct2;
let Inst{9-7} = rs;
let Inst{6-0} = 0b0000001;
}
// The namespace RVBC exists to avoid encoding conflicts with the compressed
// instructions c.addi16sp and c.lui already implemented in the C extension.
let DecoderNamespace = "RVBC", Predicates = [HasStdExtZbproposedc, HasStdExtC] in {
def C_NOT : RVBInstC<0b00, "c.not">, Sched<[]>;
def C_NEG : RVBInstC<0b01, "c.neg">, Sched<[]>;
} // DecoderNamespace = "RVBC", Predicates = [HasStdExtZbproposedc, HasStdExtC]
let DecoderNamespace = "RVBC", Predicates = [HasStdExtZbproposedc, HasStdExtZba, HasStdExtC, IsRV64] in
def C_ZEXTW : RVBInstC<0b10, "c.zext.w">, Sched<[]>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Pseudo Instructions // Pseudo Instructions
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
@ -795,21 +764,6 @@ def : InstAlias<"bext $rd, $rs1, $shamt",
(BEXTI GPR:$rd, GPR:$rs1, uimmlog2xlen:$shamt), 0>; (BEXTI GPR:$rd, GPR:$rs1, uimmlog2xlen:$shamt), 0>;
} // Predicates = [HasStdExtZbs] } // Predicates = [HasStdExtZbs]
//===----------------------------------------------------------------------===//
// Compressed Instruction patterns
//===----------------------------------------------------------------------===//
let Predicates = [HasStdExtZbproposedc, HasStdExtC] in {
def : CompressPat<(XORI GPRC:$rs1, GPRC:$rs1, -1),
(C_NOT GPRC:$rs1)>;
def : CompressPat<(SUB GPRC:$rs1, X0, GPRC:$rs1),
(C_NEG GPRC:$rs1)>;
} // Predicates = [HasStdExtZbproposedc, HasStdExtC]
let Predicates = [HasStdExtZbproposedc, HasStdExtZba, HasStdExtC, IsRV64] in {
def : CompressPat<(ADDUW GPRC:$rs1, GPRC:$rs1, X0),
(C_ZEXTW GPRC:$rs1)>;
} // Predicates = [HasStdExtZbproposedc, HasStdExtC, IsRV64]
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Codegen patterns // Codegen patterns
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//

2
llvm/lib/Target/RISCV/RISCVSubtarget.h
View File

@ -50,7 +50,6 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo {
bool HasStdExtZbr = false; bool HasStdExtZbr = false;
bool HasStdExtZbs = false; bool HasStdExtZbs = false;
bool HasStdExtZbt = false; bool HasStdExtZbt = false;
bool HasStdExtZbproposedc = false;
bool HasStdExtV = false; bool HasStdExtV = false;
bool HasStdExtZvlsseg = false; bool HasStdExtZvlsseg = false;
bool HasStdExtZvamo = false; bool HasStdExtZvamo = false;
@ -118,7 +117,6 @@ public:
bool hasStdExtZbr() const { return HasStdExtZbr; } bool hasStdExtZbr() const { return HasStdExtZbr; }
bool hasStdExtZbs() const { return HasStdExtZbs; } bool hasStdExtZbs() const { return HasStdExtZbs; }
bool hasStdExtZbt() const { return HasStdExtZbt; } bool hasStdExtZbt() const { return HasStdExtZbt; }
bool hasStdExtZbproposedc() const { return HasStdExtZbproposedc; }
bool hasStdExtV() const { return HasStdExtV; } bool hasStdExtV() const { return HasStdExtV; }
bool hasStdExtZvlsseg() const { return HasStdExtZvlsseg; } bool hasStdExtZvlsseg() const { return HasStdExtZvlsseg; }
bool hasStdExtZvamo() const { return HasStdExtZvamo; } bool hasStdExtZvamo() const { return HasStdExtZvamo; }

4
llvm/test/CodeGen/RISCV/attributes.ll
View File

@ -15,7 +15,6 @@
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbf %s -o - | FileCheck --check-prefix=RV32ZBF %s ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbf %s -o - | FileCheck --check-prefix=RV32ZBF %s
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbm %s -o - | FileCheck --check-prefix=RV32ZBM %s ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbm %s -o - | FileCheck --check-prefix=RV32ZBM %s
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbp %s -o - | FileCheck --check-prefix=RV32ZBP %s ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbp %s -o - | FileCheck --check-prefix=RV32ZBP %s
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbproposedc %s -o - | FileCheck --check-prefix=RV32ZBPROPOSEDC %s
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbr %s -o - | FileCheck --check-prefix=RV32ZBR %s ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbr %s -o - | FileCheck --check-prefix=RV32ZBR %s
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbs %s -o - | FileCheck --check-prefix=RV32ZBS %s ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbs %s -o - | FileCheck --check-prefix=RV32ZBS %s
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbt %s -o - | FileCheck --check-prefix=RV32ZBT %s ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbt %s -o - | FileCheck --check-prefix=RV32ZBT %s
@ -35,7 +34,6 @@
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbf %s -o - | FileCheck --check-prefix=RV64ZBF %s ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbf %s -o - | FileCheck --check-prefix=RV64ZBF %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbm %s -o - | FileCheck --check-prefix=RV64ZBM %s ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbm %s -o - | FileCheck --check-prefix=RV64ZBM %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbp %s -o - | FileCheck --check-prefix=RV64ZBP %s ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbp %s -o - | FileCheck --check-prefix=RV64ZBP %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbproposedc %s -o - | FileCheck --check-prefix=RV64ZBPROPOSEDC %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbr %s -o - | FileCheck --check-prefix=RV64ZBR %s ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbr %s -o - | FileCheck --check-prefix=RV64ZBR %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbs %s -o - | FileCheck --check-prefix=RV64ZBS %s ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbs %s -o - | FileCheck --check-prefix=RV64ZBS %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbt %s -o - | FileCheck --check-prefix=RV64ZBT %s ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbt %s -o - | FileCheck --check-prefix=RV64ZBT %s
@ -56,7 +54,6 @@
; RV32ZBF: .attribute 5, "rv32i2p0_zbf0p93" ; RV32ZBF: .attribute 5, "rv32i2p0_zbf0p93"
; RV32ZBM: .attribute 5, "rv32i2p0_zbm0p93" ; RV32ZBM: .attribute 5, "rv32i2p0_zbm0p93"
; RV32ZBP: .attribute 5, "rv32i2p0_zbp0p93" ; RV32ZBP: .attribute 5, "rv32i2p0_zbp0p93"
; RV32ZBPROPOSEDC: .attribute 5, "rv32i2p0_zbproposedc0p93"
; RV32ZBR: .attribute 5, "rv32i2p0_zbr0p93" ; RV32ZBR: .attribute 5, "rv32i2p0_zbr0p93"
; RV32ZBS: .attribute 5, "rv32i2p0_zbs0p93" ; RV32ZBS: .attribute 5, "rv32i2p0_zbs0p93"
; RV32ZBT: .attribute 5, "rv32i2p0_zbt0p93" ; RV32ZBT: .attribute 5, "rv32i2p0_zbt0p93"
@ -76,7 +73,6 @@
; RV64ZBF: .attribute 5, "rv64i2p0_zbf0p93" ; RV64ZBF: .attribute 5, "rv64i2p0_zbf0p93"
; RV64ZBM: .attribute 5, "rv64i2p0_zbm0p93" ; RV64ZBM: .attribute 5, "rv64i2p0_zbm0p93"
; RV64ZBP: .attribute 5, "rv64i2p0_zbp0p93" ; RV64ZBP: .attribute 5, "rv64i2p0_zbp0p93"
; RV64ZBPROPOSEDC: .attribute 5, "rv64i2p0_zbproposedc0p93"
; RV64ZBR: .attribute 5, "rv64i2p0_zbr0p93" ; RV64ZBR: .attribute 5, "rv64i2p0_zbr0p93"
; RV64ZBS: .attribute 5, "rv64i2p0_zbs0p93" ; RV64ZBS: .attribute 5, "rv64i2p0_zbs0p93"
; RV64ZBT: .attribute 5, "rv64i2p0_zbt0p93" ; RV64ZBT: .attribute 5, "rv64i2p0_zbt0p93"

3
llvm/test/MC/RISCV/attribute-arch.s
View File

@ -63,9 +63,6 @@
.attribute arch, "rv32izbp" .attribute arch, "rv32izbp"
# CHECK: attribute 5, "rv32i2p0_zbp0p93" # CHECK: attribute 5, "rv32i2p0_zbp0p93"
.attribute arch, "rv32izbproposedc"
# CHECK: attribute 5, "rv32i2p0_zbproposedc0p93"
.attribute arch, "rv32izbr" .attribute arch, "rv32izbr"
# CHECK: attribute 5, "rv32i2p0_zbr0p93" # CHECK: attribute 5, "rv32i2p0_zbr0p93"

35
llvm/test/MC/RISCV/compress-rv32b.s
View File

@ -1,35 +0,0 @@
# RUN: llvm-mc -triple riscv32 -mattr=+c,+experimental-zbproposedc -show-encoding < %s \
# RUN: | FileCheck -check-prefixes=CHECK,CHECK-ALIAS %s
# RUN: llvm-mc -triple riscv32 -mattr=+c,+experimental-zbproposedc -show-encoding \
# RUN: -riscv-no-aliases < %s | FileCheck -check-prefixes=CHECK,CHECK-INST %s
# RUN: llvm-mc -triple riscv32 -mattr=+c,+experimental-zbproposedc -filetype=obj < %s \
# RUN: | llvm-objdump --triple=riscv32 --mattr=+c,+experimental-zbproposedc -d - \
# RUN: | FileCheck -check-prefixes=CHECK-BYTES,CHECK-ALIAS %s
# RUN: llvm-mc -triple riscv32 -mattr=+c,+experimental-zbproposedc -filetype=obj < %s \
# RUN: | llvm-objdump --triple=riscv32 --mattr=+c,+experimental-zbproposedc -d -M no-aliases - \
# RUN: | FileCheck -check-prefixes=CHECK-BYTES,CHECK-INST %s
# RUN: llvm-mc -triple riscv64 -mattr=+c,+experimental-zbproposedc -show-encoding < %s \
# RUN: | FileCheck -check-prefixes=CHECK-ALIAS %s
# RUN: llvm-mc -triple riscv64 -mattr=+c,+experimental-zbproposedc -show-encoding \
# RUN: -riscv-no-aliases < %s | FileCheck -check-prefixes=CHECK-INST %s
# RUN: llvm-mc -triple riscv64 -mattr=+c,+experimental-zbproposedc -filetype=obj < %s \
# RUN: | llvm-objdump --triple=riscv64 --mattr=+c,+experimental-zbproposedc -d - \
# RUN: | FileCheck -check-prefixes=CHECK-BYTES,CHECK-ALIAS %s
# RUN: llvm-mc -triple riscv64 -mattr=+c,+experimental-zbproposedc -filetype=obj < %s \
# RUN: | llvm-objdump --triple=riscv64 --mattr=+c,+experimental-zbproposedc -d -M no-aliases - \
# RUN: | FileCheck -check-prefixes=CHECK-BYTES,CHECK-INST %s
# Tests bit manipulation instructions available in rv32 and in rv64.
# CHECK-BYTES: 01 60
# CHECK-ALIAS: not s0, s0
# CHECK-INST: c.not s0
# CHECK: # encoding: [0x01,0x60]
not s0, s0
# CHECK-BYTES: 01 64
# CHECK-ALIAS: neg s0, s0
# CHECK-INST: c.neg s0
# CHECK: # encoding: [0x01,0x64]
neg s0, s0

18
llvm/test/MC/RISCV/compress-rv64b.s
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# RUN: llvm-mc -triple riscv64 -mattr=+c,+experimental-zbproposedc,+experimental-b -show-encoding < %s \
# RUN: | FileCheck -check-prefixes=CHECK-ALIAS %s
# RUN: llvm-mc -triple riscv64 -mattr=+c,+experimental-zbproposedc,+experimental-b -show-encoding \
# RUN: -riscv-no-aliases < %s | FileCheck -check-prefixes=CHECK-INST %s
# RUN: llvm-mc -triple riscv64 -mattr=+c,+experimental-zbproposedc,+experimental-b -filetype=obj < %s \
# RUN: | llvm-objdump --triple=riscv64 --mattr=+c,+experimental-zbproposedc,+experimental-b -d - \
# RUN: | FileCheck -check-prefixes=CHECK-BYTES,CHECK-ALIAS %s
# RUN: llvm-mc -triple riscv64 -mattr=+c,+experimental-zbproposedc,+experimental-b -filetype=obj < %s \
# RUN: | llvm-objdump --triple=riscv64 --mattr=+c,+experimental-zbproposedc,+experimental-b -d -M no-aliases - \
# RUN: | FileCheck -check-prefixes=CHECK-BYTES,CHECK-INST %s
# Tests compressed instructions available in rv64 and not in rv32.
# CHECK-BYTES: 01 68
# CHECK-ALIAS: zext.w s0, s0
# CHECK-INST: c.zext.w s0
# CHECK: # encoding: [0x01,0x68]
zext.w s0, s0

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llvm/test/MC/RISCV/rv32zbproposedc-invalid.s
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# RUN: not llvm-mc -triple riscv32 -mattr=+c,+experimental-zbproposedc,+experimental-Zba < %s 2>&1 | FileCheck %s
# Too many operands
c.not s0, s1 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
c.neg s0, s1 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
c.zext.w s0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set

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llvm/test/MC/RISCV/rv32zbproposedc-valid.s
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+c,+experimental-zbproposedc -riscv-no-aliases -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc %s -triple=riscv64 -mattr=+c,+experimental-zbproposedc,+experimental-b -riscv-no-aliases -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+c,+experimental-zbproposedc < %s \
# RUN: | llvm-objdump --mattr=+c,+experimental-zbproposedc -M no-aliases -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+c,+experimental-zbproposedc,+experimental-b < %s \
# RUN: | llvm-objdump --mattr=+c,+experimental-zbproposedc,+experimental-b -M no-aliases -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# CHECK-ASM-AND-OBJ: c.not s0
# CHECK-ASM: encoding: [0x01,0x60]
c.not s0
# CHECK-ASM-AND-OBJ: c.neg s0
# CHECK-ASM: encoding: [0x01,0x64]
c.neg s0

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llvm/test/MC/RISCV/rv64zbproposedc-invalid.s
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# RUN: not llvm-mc -triple riscv64 -mattr=+c,+experimental-zbproposedc,+experimental-b < %s 2>&1 | FileCheck %s
# Too many operands
c.zext.w s0, s1 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction

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llvm/test/MC/RISCV/rv64zbproposedc-valid.s
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# RUN: llvm-mc %s -triple=riscv64 -mattr=+c,+experimental-zbproposedc,+experimental-b -riscv-no-aliases -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+c,+experimental-zbproposedc,+experimental-b < %s \
# RUN: | llvm-objdump --mattr=+c,+experimental-zbproposedc,+experimental-b -M no-aliases -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
# CHECK-ASM-AND-OBJ: c.zext.w s0
# CHECK-ASM: encoding: [0x01,0x68]
c.zext.w s0