forked from OSchip/llvm-project
[XCore] Add ISel pattern for LDWCP
Patch by Robert Lytton. llvm-svn: 185518
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@ -279,12 +279,6 @@ multiclass FRU6_LRU6_backwards_branch<bits<6> opc, string OpcStr> {
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!strconcat(OpcStr, " $a, $b"), []>;
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}
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multiclass FRU6_LRU6_cp<bits<6> opc, string OpcStr> {
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def _ru6: _FRU6<opc, (outs RRegs:$a), (ins i32imm:$b),
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!strconcat(OpcStr, " $a, cp[$b]"), []>;
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def _lru6: _FLRU6<opc, (outs RRegs:$a), (ins i32imm:$b),
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!strconcat(OpcStr, " $a, cp[$b]"), []>;
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}
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// U6
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multiclass FU6_LU6<bits<10> opc, string OpcStr, SDNode OpNode> {
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@ -539,8 +533,13 @@ def STWDP_lru6 : _FLRU6<0b010100, (outs), (ins RRegs:$a, i32imm:$b),
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[(store RRegs:$a, (dprelwrapper tglobaladdr:$b))]>;
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//let Uses = [CP] in ..
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let mayLoad = 1, isReMaterializable = 1, neverHasSideEffects = 1 in
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defm LDWCP : FRU6_LRU6_cp<0b011011, "ldw">;
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let mayLoad = 1, isReMaterializable = 1, neverHasSideEffects = 1 in {
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def LDWCP_ru6 : _FRU6<0b011011, (outs RRegs:$a), (ins i32imm:$b),
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"ldw $a, cp[$b]", []>;
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def LDWCP_lru6: _FLRU6<0b011011, (outs RRegs:$a), (ins i32imm:$b),
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"ldw $a, cp[$b]",
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[(set RRegs:$a, (load (cprelwrapper tglobaladdr:$b)))]>;
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}
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let Uses = [SP] in {
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let mayStore=1 in {
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@ -39,3 +39,12 @@ entry:
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%2 = zext i8 %1 to i32
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ret i32 %2
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}
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@GConst = external constant i32
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define i32 @load_cp() nounwind {
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entry:
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; CHECK: load_cp:
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; CHECK: ldw r0, cp[GConst]
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%0 = load i32* @GConst
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ret i32 %0
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}
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