forked from OSchip/llvm-project
[DAGCombiner] Add (sub_sat x, x) -> 0 combine
llvm-svn: 351073
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@ -2800,6 +2800,10 @@ SDValue DAGCombiner::visitSUBSAT(SDNode *N) {
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if (N0.isUndef() || N1.isUndef())
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return DAG.getConstant(0, DL, VT);
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// fold (sub_sat x, x) -> 0
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if (N0 == N1)
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return DAG.getConstant(0, DL, VT);
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if (DAG.isConstantIntBuildVectorOrConstantInt(N0) &&
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DAG.isConstantIntBuildVectorOrConstantInt(N1)) {
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// fold (sub_sat c1, c2) -> c3
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@ -96,12 +96,6 @@ define i32 @combine_self_i32(i32 %a0) {
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; CHECK-LABEL: combine_self_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: movl %edi, %ecx
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; CHECK-NEXT: subl %edi, %ecx
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; CHECK-NEXT: setns %al
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; CHECK-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF
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; CHECK-NEXT: subl %edi, %edi
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; CHECK-NEXT: cmovnol %edi, %eax
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; CHECK-NEXT: retq
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%1 = call i32 @llvm.ssub.sat.i32(i32 %a0, i32 %a0)
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ret i32 %1
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@ -110,12 +104,12 @@ define i32 @combine_self_i32(i32 %a0) {
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define <8 x i16> @combine_self_v8i16(<8 x i16> %a0) {
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; SSE-LABEL: combine_self_v8i16:
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; SSE: # %bb.0:
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; SSE-NEXT: psubsw %xmm0, %xmm0
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; SSE-NEXT: xorps %xmm0, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: combine_self_v8i16:
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; AVX: # %bb.0:
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; AVX-NEXT: vpsubsw %xmm0, %xmm0, %xmm0
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; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; AVX-NEXT: retq
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%1 = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> %a0, <8 x i16> %a0)
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ret <8 x i16> %1
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@ -96,8 +96,6 @@ define i32 @combine_self_i32(i32 %a0) {
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; CHECK-LABEL: combine_self_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: subl %edi, %edi
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; CHECK-NEXT: cmovael %edi, %eax
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; CHECK-NEXT: retq
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%1 = call i32 @llvm.usub.sat.i32(i32 %a0, i32 %a0)
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ret i32 %1
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@ -106,12 +104,12 @@ define i32 @combine_self_i32(i32 %a0) {
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define <8 x i16> @combine_self_v8i16(<8 x i16> %a0) {
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; SSE-LABEL: combine_self_v8i16:
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; SSE: # %bb.0:
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; SSE-NEXT: psubusw %xmm0, %xmm0
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; SSE-NEXT: xorps %xmm0, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: combine_self_v8i16:
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; AVX: # %bb.0:
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; AVX-NEXT: vpsubusw %xmm0, %xmm0, %xmm0
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; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; AVX-NEXT: retq
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%1 = call <8 x i16> @llvm.usub.sat.v8i16(<8 x i16> %a0, <8 x i16> %a0)
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ret <8 x i16> %1
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