forked from OSchip/llvm-project
[PhaseOrdering] add test for vector trunc; NFC
See discussion in D76983.
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -O2 -S -data-layout="e" < %s | FileCheck %s --check-prefixes=ANY,OLDPM
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; RUN: opt -passes='default<O2>' -S -data-layout="e" < %s | FileCheck %s --check-prefixes=ANY,NEWPM
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define <4 x i16> @truncate(<4 x i32> %x) {
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; ANY-LABEL: @truncate(
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; ANY-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[X:%.*]] to <8 x i16>
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; ANY-NEXT: [[V3:%.*]] = shufflevector <8 x i16> [[TMP1]], <8 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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; ANY-NEXT: ret <4 x i16> [[V3]]
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;
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%x0 = extractelement <4 x i32> %x, i32 0
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%t0 = trunc i32 %x0 to i16
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%v0 = insertelement <4 x i16> undef, i16 %t0, i32 0
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%x1 = extractelement <4 x i32> %x, i32 1
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%t1 = trunc i32 %x1 to i16
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%v1 = insertelement <4 x i16> %v0, i16 %t1, i32 1
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%x2 = extractelement <4 x i32> %x, i32 2
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%t2 = trunc i32 %x2 to i16
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%v2 = insertelement <4 x i16> %v1, i16 %t2, i32 2
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%x3 = extractelement <4 x i32> %x, i32 3
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%t3 = trunc i32 %x3 to i16
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%v3 = insertelement <4 x i16> %v2, i16 %t3, i32 3
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ret <4 x i16> %v3
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}
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