maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[ARM64]Fix a bug cannot select UQSHL/SQSHL with constant i64 shift amount. 

llvm-svn: 207401
This commit is contained in:
Hao Liu 2014-04-28 07:36:12 +00:00
parent 437c3f5188
commit a19a2e2da6
2 changed files with 18 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
clang/lib/CodeGen/CGBuiltin.cpp
View File

@ -5527,10 +5527,8 @@ Value *CodeGenFunction::EmitARM64BuiltinExpr(unsigned BuiltinID,
case NEON::BI__builtin_neon_vqshlud_n_s64: {
Ops.push_back(EmitScalarExpr(E->getArg(1)));
Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty);
llvm::Type *VTy = llvm::VectorType::get(Int64Ty, 1);
Ops[0] = EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm64_neon_sqshlu, VTy),
Ops, "vqshlu_n");
return Builder.CreateBitCast(Ops[0], Int64Ty);
return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm64_neon_sqshlu, Int64Ty),
Ops, "vqshlu_n");
}
case NEON::BI__builtin_neon_vqshld_n_u64:
case NEON::BI__builtin_neon_vqshld_n_s64: {
@ -5539,9 +5537,7 @@ Value *CodeGenFunction::EmitARM64BuiltinExpr(unsigned BuiltinID,
: Intrinsic::arm64_neon_sqshl;
Ops.push_back(EmitScalarExpr(E->getArg(1)));
Ops[1] = Builder.CreateZExt(Ops[1], Int64Ty);
llvm::Type *VTy = llvm::VectorType::get(Int64Ty, 1);
Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, VTy), Ops, "vqshl_n");
return Builder.CreateBitCast(Ops[0], Int64Ty);
return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vqshl_n");
}
case NEON::BI__builtin_neon_vrshrd_n_u64:
case NEON::BI__builtin_neon_vrshrd_n_s64: {
@ -5549,9 +5545,9 @@ Value *CodeGenFunction::EmitARM64BuiltinExpr(unsigned BuiltinID,
? Intrinsic::arm64_neon_urshl
: Intrinsic::arm64_neon_srshl;
Ops.push_back(EmitScalarExpr(E->getArg(1)));
llvm::Type *VTy = llvm::VectorType::get(Int64Ty, 1);
Ops[0] = EmitNeonCall(CGM.getIntrinsic(Int, VTy), Ops, "vrshr_n", 1, true);
return Builder.CreateBitCast(Ops[0], Int64Ty);
int SV = cast<ConstantInt>(Ops[1])->getSExtValue();
Ops[1] = ConstantInt::get(Int64Ty, -SV);
return EmitNeonCall(CGM.getIntrinsic(Int, Int64Ty), Ops, "vrshr_n");
}
case NEON::BI__builtin_neon_vrsrad_n_u64:
case NEON::BI__builtin_neon_vrsrad_n_s64: {

12
clang/test/CodeGen/arm64-scalar-test.c
View File

@ -114,6 +114,12 @@ int64_t test_vqshld_s64(int64_t a, int64_t b) {
// CHECK: sqshl {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
}
// CHECK: test_vqshld_s64_i
int64_t test_vqshld_s64_i(int64_t a) {
return vqshld_s64(a, 36);
// CHECK: sqshl {{d[0-9]+}}, {{d[0-9]+}}, #36
}
// CHECK: test_vqshlb_u8
uint8_t test_vqshlb_u8(uint8_t a, uint8_t b) {
return vqshlb_u8(a, b);
@ -138,6 +144,12 @@ uint64_t test_vqshld_u64(uint64_t a, uint64_t b) {
// CHECK: uqshl {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
}
// CHECK: test_vqshld_u64_i
uint64_t test_vqshld_u64_i(uint64_t a) {
return vqshld_u64(a, 36);
// CHECK: uqshl {{d[0-9]+}}, {{d[0-9]+}}, #36
}
// CHECK: test_vshld_u64
uint64_t test_vshld_u64(uint64_t a, uint64_t b) {
return vshld_u64(a, b);