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First patch in the direction of splitting MachineCodeEmitter in two subclasses: 

JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray

llvm-svn: 72631
This commit is contained in:
Bruno Cardoso Lopes 2009-05-30 20:51:52 +00:00
parent 28486d420b
commit a194c3a69e
33 changed files with 1103 additions and 366 deletions
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322
llvm/include/llvm/CodeGen/JITCodeEmitter.h Normal file
View File

@ -0,0 +1,322 @@
//===-- llvm/CodeGen/JITCodeEmitter.h - Code emission ----------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file defines an abstract interface that is used by the machine code
// emission framework to output the code. This allows machine code emission to
// be separated from concerns such as resolution of call targets, and where the
// machine code will be written (memory or disk, f.e.).
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_JITCODEEMITTER_H
#define LLVM_CODEGEN_JITCODEEMITTER_H
#include <string>
#include "llvm/Support/DataTypes.h"
#include "llvm/Support/Streams.h"
#include "llvm/CodeGen/MachineCodeEmitter.h"
using namespace std;
namespace llvm {
class MachineBasicBlock;
class MachineConstantPool;
class MachineJumpTableInfo;
class MachineFunction;
class MachineModuleInfo;
class MachineRelocation;
class Value;
class GlobalValue;
class Function;
/// JITCodeEmitter - This class defines two sorts of methods: those for
/// emitting the actual bytes of machine code, and those for emitting auxillary
/// structures, such as jump tables, relocations, etc.
///
/// Emission of machine code is complicated by the fact that we don't (in
/// general) know the size of the machine code that we're about to emit before
/// we emit it. As such, we preallocate a certain amount of memory, and set the
/// BufferBegin/BufferEnd pointers to the start and end of the buffer. As we
/// emit machine instructions, we advance the CurBufferPtr to indicate the
/// location of the next byte to emit. In the case of a buffer overflow (we
/// need to emit more machine code than we have allocated space for), the
/// CurBufferPtr will saturate to BufferEnd and ignore stores. Once the entire
/// function has been emitted, the overflow condition is checked, and if it has
/// occurred, more memory is allocated, and we reemit the code into it.
///
class JITCodeEmitter : public MachineCodeEmitter {
public:
virtual ~JITCodeEmitter() {}
/// startFunction - This callback is invoked when the specified function is
/// about to be code generated. This initializes the BufferBegin/End/Ptr
/// fields.
///
virtual void startFunction(MachineFunction &F) = 0;
/// finishFunction - This callback is invoked when the specified function has
/// finished code generation. If a buffer overflow has occurred, this method
/// returns true (the callee is required to try again), otherwise it returns
/// false.
///
virtual bool finishFunction(MachineFunction &F) = 0;
/// startGVStub - This callback is invoked when the JIT needs the
/// address of a GV (e.g. function) that has not been code generated yet.
/// The StubSize specifies the total size required by the stub.
///
virtual void startGVStub(const GlobalValue* GV, unsigned StubSize,
unsigned Alignment = 1) = 0;
/// startGVStub - This callback is invoked when the JIT needs the address of a
/// GV (e.g. function) that has not been code generated yet. Buffer points to
/// memory already allocated for this stub.
///
virtual void startGVStub(const GlobalValue* GV, void *Buffer,
unsigned StubSize) = 0;
/// finishGVStub - This callback is invoked to terminate a GV stub.
///
virtual void *finishGVStub(const GlobalValue* F) = 0;
/// emitByte - This callback is invoked when a byte needs to be written to the
/// output stream.
///
void emitByte(unsigned char B) {
if (CurBufferPtr != BufferEnd)
*CurBufferPtr++ = B;
}
/// emitWordLE - This callback is invoked when a 32-bit word needs to be
/// written to the output stream in little-endian format.
///
void emitWordLE(unsigned W) {
if (4 <= BufferEnd-CurBufferPtr) {
*CurBufferPtr++ = (unsigned char)(W >> 0);
*CurBufferPtr++ = (unsigned char)(W >> 8);
*CurBufferPtr++ = (unsigned char)(W >> 16);
*CurBufferPtr++ = (unsigned char)(W >> 24);
} else {
CurBufferPtr = BufferEnd;
}
}
/// emitWordBE - This callback is invoked when a 32-bit word needs to be
/// written to the output stream in big-endian format.
///
void emitWordBE(unsigned W) {
if (4 <= BufferEnd-CurBufferPtr) {
*CurBufferPtr++ = (unsigned char)(W >> 24);
*CurBufferPtr++ = (unsigned char)(W >> 16);
*CurBufferPtr++ = (unsigned char)(W >> 8);
*CurBufferPtr++ = (unsigned char)(W >> 0);
} else {
CurBufferPtr = BufferEnd;
}
}
/// emitDWordLE - This callback is invoked when a 64-bit word needs to be
/// written to the output stream in little-endian format.
///
void emitDWordLE(uint64_t W) {
if (8 <= BufferEnd-CurBufferPtr) {
*CurBufferPtr++ = (unsigned char)(W >> 0);
*CurBufferPtr++ = (unsigned char)(W >> 8);
*CurBufferPtr++ = (unsigned char)(W >> 16);
*CurBufferPtr++ = (unsigned char)(W >> 24);
*CurBufferPtr++ = (unsigned char)(W >> 32);
*CurBufferPtr++ = (unsigned char)(W >> 40);
*CurBufferPtr++ = (unsigned char)(W >> 48);
*CurBufferPtr++ = (unsigned char)(W >> 56);
} else {
CurBufferPtr = BufferEnd;
}
}
/// emitDWordBE - This callback is invoked when a 64-bit word needs to be
/// written to the output stream in big-endian format.
///
void emitDWordBE(uint64_t W) {
if (8 <= BufferEnd-CurBufferPtr) {
*CurBufferPtr++ = (unsigned char)(W >> 56);
*CurBufferPtr++ = (unsigned char)(W >> 48);
*CurBufferPtr++ = (unsigned char)(W >> 40);
*CurBufferPtr++ = (unsigned char)(W >> 32);
*CurBufferPtr++ = (unsigned char)(W >> 24);
*CurBufferPtr++ = (unsigned char)(W >> 16);
*CurBufferPtr++ = (unsigned char)(W >> 8);
*CurBufferPtr++ = (unsigned char)(W >> 0);
} else {
CurBufferPtr = BufferEnd;
}
}
/// emitAlignment - Move the CurBufferPtr pointer up the the specified
/// alignment (saturated to BufferEnd of course).
void emitAlignment(unsigned Alignment) {
if (Alignment == 0) Alignment = 1;
if(Alignment <= (uintptr_t)(BufferEnd-CurBufferPtr)) {
// Move the current buffer ptr up to the specified alignment.
CurBufferPtr =
(unsigned char*)(((uintptr_t)CurBufferPtr+Alignment-1) &
~(uintptr_t)(Alignment-1));
} else {
CurBufferPtr = BufferEnd;
}
}
/// emitULEB128Bytes - This callback is invoked when a ULEB128 needs to be
/// written to the output stream.
void emitULEB128Bytes(unsigned Value) {
do {
unsigned char Byte = Value & 0x7f;
Value >>= 7;
if (Value) Byte |= 0x80;
emitByte(Byte);
} while (Value);
}
/// emitSLEB128Bytes - This callback is invoked when a SLEB128 needs to be
/// written to the output stream.
void emitSLEB128Bytes(int Value) {
int Sign = Value >> (8 * sizeof(Value) - 1);
bool IsMore;
do {
unsigned char Byte = Value & 0x7f;
Value >>= 7;
IsMore = Value != Sign || ((Byte ^ Sign) & 0x40) != 0;
if (IsMore) Byte |= 0x80;
emitByte(Byte);
} while (IsMore);
}
/// emitString - This callback is invoked when a String needs to be
/// written to the output stream.
void emitString(const std::string &String) {
for (unsigned i = 0, N = static_cast<unsigned>(String.size());
i < N; ++i) {
unsigned char C = String[i];
emitByte(C);
}
emitByte(0);
}
/// emitInt32 - Emit a int32 directive.
void emitInt32(int Value) {
if (4 <= BufferEnd-CurBufferPtr) {
*((uint32_t*)CurBufferPtr) = Value;
CurBufferPtr += 4;
} else {
CurBufferPtr = BufferEnd;
}
}
/// emitInt64 - Emit a int64 directive.
void emitInt64(uint64_t Value) {
if (8 <= BufferEnd-CurBufferPtr) {
*((uint64_t*)CurBufferPtr) = Value;
CurBufferPtr += 8;
} else {
CurBufferPtr = BufferEnd;
}
}
/// emitInt32At - Emit the Int32 Value in Addr.
void emitInt32At(uintptr_t *Addr, uintptr_t Value) {
if (Addr >= (uintptr_t*)BufferBegin && Addr < (uintptr_t*)BufferEnd)
(*(uint32_t*)Addr) = (uint32_t)Value;
}
/// emitInt64At - Emit the Int64 Value in Addr.
void emitInt64At(uintptr_t *Addr, uintptr_t Value) {
if (Addr >= (uintptr_t*)BufferBegin && Addr < (uintptr_t*)BufferEnd)
(*(uint64_t*)Addr) = (uint64_t)Value;
}
/// emitLabel - Emits a label
virtual void emitLabel(uint64_t LabelID) = 0;
/// allocateSpace - Allocate a block of space in the current output buffer,
/// returning null (and setting conditions to indicate buffer overflow) on
/// failure. Alignment is the alignment in bytes of the buffer desired.
virtual void *allocateSpace(uintptr_t Size, unsigned Alignment) {
emitAlignment(Alignment);
void *Result;
// Check for buffer overflow.
if (Size >= (uintptr_t)(BufferEnd-CurBufferPtr)) {
CurBufferPtr = BufferEnd;
Result = 0;
} else {
// Allocate the space.
Result = CurBufferPtr;
CurBufferPtr += Size;
}
return Result;
}
/// StartMachineBasicBlock - This should be called by the target when a new
/// basic block is about to be emitted. This way the MCE knows where the
/// start of the block is, and can implement getMachineBasicBlockAddress.
virtual void StartMachineBasicBlock(MachineBasicBlock *MBB) = 0;
/// getCurrentPCValue - This returns the address that the next emitted byte
/// will be output to.
///
virtual uintptr_t getCurrentPCValue() const {
return (uintptr_t)CurBufferPtr;
}
/// getCurrentPCOffset - Return the offset from the start of the emitted
/// buffer that we are currently writing to.
uintptr_t getCurrentPCOffset() const {
return CurBufferPtr-BufferBegin;
}
/// addRelocation - Whenever a relocatable address is needed, it should be
/// noted with this interface.
virtual void addRelocation(const MachineRelocation &MR) = 0;
/// FIXME: These should all be handled with relocations!
/// getConstantPoolEntryAddress - Return the address of the 'Index' entry in
/// the constant pool that was last emitted with the emitConstantPool method.
///
virtual uintptr_t getConstantPoolEntryAddress(unsigned Index) const = 0;
/// getJumpTableEntryAddress - Return the address of the jump table with index
/// 'Index' in the function that last called initJumpTableInfo.
///
virtual uintptr_t getJumpTableEntryAddress(unsigned Index) const = 0;
/// getMachineBasicBlockAddress - Return the address of the specified
/// MachineBasicBlock, only usable after the label for the MBB has been
/// emitted.
///
virtual uintptr_t getMachineBasicBlockAddress(MachineBasicBlock *MBB) const= 0;
/// getLabelAddress - Return the address of the specified LabelID, only usable
/// after the LabelID has been emitted.
///
virtual uintptr_t getLabelAddress(uint64_t LabelID) const = 0;
/// Specifies the MachineModuleInfo object. This is used for exception handling
/// purposes.
virtual void setModuleInfo(MachineModuleInfo* Info) = 0;
};
} // End llvm namespace
#endif

16
llvm/include/llvm/Target/TargetJITInfo.h
View File

@ -23,7 +23,7 @@
namespace llvm {
class Function;
class GlobalValue;
class MachineCodeEmitter;
class JITCodeEmitter;
class MachineRelocation;
/// TargetJITInfo - Target specific information required by the Just-In-Time
@ -39,29 +39,29 @@ namespace llvm {
///
virtual void replaceMachineCodeForFunction(void *Old, void *New) = 0;
/// emitGlobalValueIndirectSym - Use the specified MachineCodeEmitter object
/// emitGlobalValueIndirectSym - Use the specified JITCodeEmitter object
/// to emit an indirect symbol which contains the address of the specified
/// ptr.
virtual void *emitGlobalValueIndirectSym(const GlobalValue* GV, void *ptr,
MachineCodeEmitter &MCE) {
JITCodeEmitter &JCE) {
assert(0 && "This target doesn't implement emitGlobalValueIndirectSym!");
return 0;
}
/// emitFunctionStub - Use the specified MachineCodeEmitter object to emit a
/// emitFunctionStub - Use the specified JITCodeEmitter object to emit a
/// small native function that simply calls the function at the specified
/// address. Return the address of the resultant function.
virtual void *emitFunctionStub(const Function* F, void *Fn,
MachineCodeEmitter &MCE) {
JITCodeEmitter &JCE) {
assert(0 && "This target doesn't implement emitFunctionStub!");
return 0;
}
/// emitFunctionStubAtAddr - Use the specified MachineCodeEmitter object to
/// emitFunctionStubAtAddr - Use the specified JITCodeEmitter object to
/// emit a small native function that simply calls Fn. Emit the stub into
/// the supplied buffer.
virtual void emitFunctionStubAtAddr(const Function* F, void *Fn,
void *Buffer, MachineCodeEmitter &MCE) {
void *Buffer, JITCodeEmitter &JCE) {
assert(0 && "This target doesn't implement emitFunctionStubAtAddr!");
}
@ -125,7 +125,7 @@ namespace llvm {
/// allocateSeparateGVMemory - If true, globals should be placed in
/// separately allocated heap memory rather than in the same
/// code memory allocated by MachineCodeEmitter.
/// code memory allocated by JITCodeEmitter.
virtual bool allocateSeparateGVMemory() const { return false; }
protected:
bool useGOT;

58
llvm/include/llvm/Target/TargetMachine.h
View File

@ -28,6 +28,7 @@ class TargetJITInfo;
class TargetLowering;
class TargetFrameInfo;
class MachineCodeEmitter;
class JITCodeEmitter;
class TargetRegisterInfo;
class Module;
class PassManagerBase;
@ -236,6 +237,16 @@ public:
return true;
}
/// addPassesToEmitFileFinish - If the passes to emit the specified file had
/// to be split up (e.g., to add an object writer pass), this method can be
/// used to finish up adding passes to emit the file, if necessary.
///
virtual bool addPassesToEmitFileFinish(PassManagerBase &,
JITCodeEmitter *,
CodeGenOpt::Level) {
return true;
}
/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
/// get machine code emitted. This uses a MachineCodeEmitter object to handle
/// actually outputting the machine code and resolving things like the address
@ -248,6 +259,18 @@ public:
return true;
}
/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
/// get machine code emitted. This uses a MachineCodeEmitter object to handle
/// actually outputting the machine code and resolving things like the address
/// of functions. This method returns true if machine code emission is
/// not supported.
///
virtual bool addPassesToEmitMachineCode(PassManagerBase &,
JITCodeEmitter &,
CodeGenOpt::Level) {
return true;
}
/// addPassesToEmitWholeFile - This method can be implemented by targets that
/// require having the entire module at once. This is not recommended, do not
/// use this.
@ -297,6 +320,14 @@ public:
MachineCodeEmitter *MCE,
CodeGenOpt::Level);
/// addPassesToEmitFileFinish - If the passes to emit the specified file had
/// to be split up (e.g., to add an object writer pass), this method can be
/// used to finish up adding passes to emit the file, if necessary.
///
virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
JITCodeEmitter *MCE,
CodeGenOpt::Level);
/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
/// get machine code emitted. This uses a MachineCodeEmitter object to handle
/// actually outputting the machine code and resolving things like the address
@ -307,6 +338,16 @@ public:
MachineCodeEmitter &MCE,
CodeGenOpt::Level);
/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
/// get machine code emitted. This uses a MachineCodeEmitter object to handle
/// actually outputting the machine code and resolving things like the address
/// of functions. This method returns true if machine code emission is
/// not supported.
///
virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
JITCodeEmitter &MCE,
CodeGenOpt::Level);
/// Target-Independent Code Generator Pass Configuration Options.
/// addInstSelector - This method should add any "last minute" LLVM->LLVM
@ -355,6 +396,14 @@ public:
return true;
}
/// addCodeEmitter - This pass should be overridden by the target to add a
/// code emitter, if supported. If this is not supported, 'true' should be
/// returned. If DumpAsm is true, the generated assembly is printed to cerr.
virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
bool /*DumpAsm*/, JITCodeEmitter &) {
return true;
}
/// addSimpleCodeEmitter - This pass should be overridden by the target to add
/// a code emitter (without setting flags), if supported. If this is not
/// supported, 'true' should be returned. If DumpAsm is true, the generated
@ -364,6 +413,15 @@ public:
return true;
}
/// addSimpleCodeEmitter - This pass should be overridden by the target to add
/// a code emitter (without setting flags), if supported. If this is not
/// supported, 'true' should be returned. If DumpAsm is true, the generated
/// assembly is printed to cerr.
virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
bool /*DumpAsm*/, JITCodeEmitter &) {
return true;
}
/// getEnableTailMergeDefault - the default setting for -enable-tail-merge
/// on this target. User flag overrides.
virtual bool getEnableTailMergeDefault() const { return true; }

43
llvm/lib/CodeGen/LLVMTargetMachine.cpp
View File

@ -109,6 +109,23 @@ bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM,
return false; // success!
}
/// addPassesToEmitFileFinish - If the passes to emit the specified file had to
/// be split up (e.g., to add an object writer pass), this method can be used to
/// finish up adding passes to emit the file, if necessary.
bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM,
JITCodeEmitter *JCE,
CodeGenOpt::Level OptLevel) {
if (JCE)
addSimpleCodeEmitter(PM, OptLevel, PrintEmittedAsm, *JCE);
PM.add(createGCInfoDeleter());
// Delete machine code for this function
PM.add(createMachineCodeDeleter());
return false; // success!
}
/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
/// get machine code emitted. This uses a MachineCodeEmitter object to handle
/// actually outputting the machine code and resolving things like the address
@ -135,6 +152,32 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
return false; // success!
}
/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
/// get machine code emitted. This uses a MachineCodeEmitter object to handle
/// actually outputting the machine code and resolving things like the address
/// of functions. This method should returns true if machine code emission is
/// not supported.
///
bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
JITCodeEmitter &JCE,
CodeGenOpt::Level OptLevel) {
// Add common CodeGen passes.
if (addCommonCodeGenPasses(PM, OptLevel))
return true;
if (addPreEmitPass(PM, OptLevel) && PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
addCodeEmitter(PM, OptLevel, PrintEmittedAsm, JCE);
PM.add(createGCInfoDeleter());
// Delete machine code for this function
PM.add(createMachineCodeDeleter());
return false; // success!
}
static void printAndVerify(PassManagerBase &PM,
bool allowDoubleDefs = false) {
if (PrintMachineCode)

18
llvm/lib/ExecutionEngine/JIT/JIT.cpp
View File

@ -19,7 +19,7 @@
#include "llvm/GlobalVariable.h"
#include "llvm/Instructions.h"
#include "llvm/ModuleProvider.h"
#include "llvm/CodeGen/MachineCodeEmitter.h"
#include "llvm/CodeGen/JITCodeEmitter.h"
#include "llvm/ExecutionEngine/GenericValue.h"
#include "llvm/CodeGen/MachineCodeInfo.h"
#include "llvm/Target/TargetData.h"
@ -214,8 +214,8 @@ JIT::JIT(ModuleProvider *MP, TargetMachine &tm, TargetJITInfo &tji,
jitstate = new JITState(MP);
// Initialize MCE
MCE = createEmitter(*this, JMM);
// Initialize JCE
JCE = createEmitter(*this, JMM);
// Add target data
MutexGuard locked(lock);
@ -224,7 +224,7 @@ JIT::JIT(ModuleProvider *MP, TargetMachine &tm, TargetJITInfo &tji,
// Turn the machine code intermediate representation into bytes in memory that
// may be executed.
if (TM.addPassesToEmitMachineCode(PM, *MCE, OptLevel)) {
if (TM.addPassesToEmitMachineCode(PM, *JCE, OptLevel)) {
cerr << "Target does not support machine code emission!\n";
abort();
}
@ -253,7 +253,7 @@ JIT::JIT(ModuleProvider *MP, TargetMachine &tm, TargetJITInfo &tji,
JIT::~JIT() {
delete jitstate;
delete MCE;
delete JCE;
delete &TM;
}
@ -273,7 +273,7 @@ void JIT::addModuleProvider(ModuleProvider *MP) {
// Turn the machine code intermediate representation into bytes in memory
// that may be executed.
if (TM.addPassesToEmitMachineCode(PM, *MCE, CodeGenOpt::Default)) {
if (TM.addPassesToEmitMachineCode(PM, *JCE, CodeGenOpt::Default)) {
cerr << "Target does not support machine code emission!\n";
abort();
}
@ -306,7 +306,7 @@ Module *JIT::removeModuleProvider(ModuleProvider *MP, std::string *E) {
// Turn the machine code intermediate representation into bytes in memory
// that may be executed.
if (TM.addPassesToEmitMachineCode(PM, *MCE, CodeGenOpt::Default)) {
if (TM.addPassesToEmitMachineCode(PM, *JCE, CodeGenOpt::Default)) {
cerr << "Target does not support machine code emission!\n";
abort();
}
@ -338,7 +338,7 @@ void JIT::deleteModuleProvider(ModuleProvider *MP, std::string *E) {
// Turn the machine code intermediate representation into bytes in memory
// that may be executed.
if (TM.addPassesToEmitMachineCode(PM, *MCE, CodeGenOpt::Default)) {
if (TM.addPassesToEmitMachineCode(PM, *JCE, CodeGenOpt::Default)) {
cerr << "Target does not support machine code emission!\n";
abort();
}
@ -654,7 +654,7 @@ void *JIT::getOrEmitGlobalVariable(const GlobalVariable *GV) {
Ptr = (char*)Ptr + (MisAligned ? (A-MisAligned) : 0);
}
} else {
Ptr = MCE->allocateSpace(S, A);
Ptr = JCE->allocateSpace(S, A);
}
addGlobalMapping(GV, Ptr);
EmitGlobalVariable(GV);

6
llvm/lib/ExecutionEngine/JIT/JIT.h
View File

@ -51,7 +51,7 @@ public:
class JIT : public ExecutionEngine {
TargetMachine &TM; // The current target we are compiling to
TargetJITInfo &TJI; // The JITInfo for the target we are compiling to
MachineCodeEmitter *MCE; // MCE object
JITCodeEmitter *JCE; // JCE object
JITState *jitstate;
@ -147,7 +147,7 @@ public:
void addPendingFunction(Function *F);
/// getCodeEmitter - Return the code emitter this JIT is emitting into.
MachineCodeEmitter *getCodeEmitter() const { return MCE; }
JITCodeEmitter *getCodeEmitter() const { return JCE; }
static ExecutionEngine *createJIT(ModuleProvider *MP, std::string *Err,
JITMemoryManager *JMM,
@ -158,7 +158,7 @@ public:
void runJITOnFunction(Function *F, MachineCodeInfo *MCI = 0);
private:
static MachineCodeEmitter *createEmitter(JIT &J, JITMemoryManager *JMM);
static JITCodeEmitter *createEmitter(JIT &J, JITMemoryManager *JMM);
void registerMachineCodeInfo(MachineCodeInfo *MCI);
void runJITOnFunctionUnlocked(Function *F, const MutexGuard &locked);
void updateFunctionStub(Function *F);

174
llvm/lib/ExecutionEngine/JIT/JITDwarfEmitter.cpp
View File

@ -16,7 +16,7 @@
#include "JITDwarfEmitter.h"
#include "llvm/Function.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/CodeGen/MachineCodeEmitter.h"
#include "llvm/CodeGen/JITCodeEmitter.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineLocation.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
@ -34,7 +34,7 @@ JITDwarfEmitter::JITDwarfEmitter(JIT& theJit) : Jit(theJit) {}
unsigned char* JITDwarfEmitter::EmitDwarfTable(MachineFunction& F,
MachineCodeEmitter& mce,
JITCodeEmitter& jce,
unsigned char* StartFunction,
unsigned char* EndFunction) {
const TargetMachine& TM = F.getTarget();
@ -42,7 +42,7 @@ unsigned char* JITDwarfEmitter::EmitDwarfTable(MachineFunction& F,
needsIndirectEncoding = TM.getTargetAsmInfo()->getNeedsIndirectEncoding();
stackGrowthDirection = TM.getFrameInfo()->getStackGrowthDirection();
RI = TM.getRegisterInfo();
MCE = &mce;
JCE = &jce;
unsigned char* ExceptionTable = EmitExceptionTable(&F, StartFunction,
EndFunction);
@ -81,15 +81,15 @@ JITDwarfEmitter::EmitFrameMoves(intptr_t BaseLabelPtr,
}
intptr_t LabelPtr = 0;
if (LabelID) LabelPtr = MCE->getLabelAddress(LabelID);
if (LabelID) LabelPtr = JCE->getLabelAddress(LabelID);
const MachineLocation &Dst = Move.getDestination();
const MachineLocation &Src = Move.getSource();
// Advance row if new location.
if (BaseLabelPtr && LabelID && (BaseLabelID != LabelID || !IsLocal)) {
MCE->emitByte(dwarf::DW_CFA_advance_loc4);
MCE->emitInt32(LabelPtr - BaseLabelPtr);
JCE->emitByte(dwarf::DW_CFA_advance_loc4);
JCE->emitInt32(LabelPtr - BaseLabelPtr);
BaseLabelID = LabelID;
BaseLabelPtr = LabelPtr;
@ -100,23 +100,23 @@ JITDwarfEmitter::EmitFrameMoves(intptr_t BaseLabelPtr,
if (Dst.isReg() && Dst.getReg() == MachineLocation::VirtualFP) {
if (!Src.isReg()) {
if (Src.getReg() == MachineLocation::VirtualFP) {
MCE->emitByte(dwarf::DW_CFA_def_cfa_offset);
JCE->emitByte(dwarf::DW_CFA_def_cfa_offset);
} else {
MCE->emitByte(dwarf::DW_CFA_def_cfa);
MCE->emitULEB128Bytes(RI->getDwarfRegNum(Src.getReg(), true));
JCE->emitByte(dwarf::DW_CFA_def_cfa);
JCE->emitULEB128Bytes(RI->getDwarfRegNum(Src.getReg(), true));
}
int Offset = -Src.getOffset();
MCE->emitULEB128Bytes(Offset);
JCE->emitULEB128Bytes(Offset);
} else {
assert(0 && "Machine move no supported yet.");
}
} else if (Src.isReg() &&
Src.getReg() == MachineLocation::VirtualFP) {
if (Dst.isReg()) {
MCE->emitByte(dwarf::DW_CFA_def_cfa_register);
MCE->emitULEB128Bytes(RI->getDwarfRegNum(Dst.getReg(), true));
JCE->emitByte(dwarf::DW_CFA_def_cfa_register);
JCE->emitULEB128Bytes(RI->getDwarfRegNum(Dst.getReg(), true));
} else {
assert(0 && "Machine move no supported yet.");
}
@ -125,16 +125,16 @@ JITDwarfEmitter::EmitFrameMoves(intptr_t BaseLabelPtr,
int Offset = Dst.getOffset() / stackGrowth;
if (Offset < 0) {
MCE->emitByte(dwarf::DW_CFA_offset_extended_sf);
MCE->emitULEB128Bytes(Reg);
MCE->emitSLEB128Bytes(Offset);
JCE->emitByte(dwarf::DW_CFA_offset_extended_sf);
JCE->emitULEB128Bytes(Reg);
JCE->emitSLEB128Bytes(Offset);
} else if (Reg < 64) {
MCE->emitByte(dwarf::DW_CFA_offset + Reg);
MCE->emitULEB128Bytes(Offset);
JCE->emitByte(dwarf::DW_CFA_offset + Reg);
JCE->emitULEB128Bytes(Offset);
} else {
MCE->emitByte(dwarf::DW_CFA_offset_extended);
MCE->emitULEB128Bytes(Reg);
MCE->emitULEB128Bytes(Offset);
JCE->emitByte(dwarf::DW_CFA_offset_extended);
JCE->emitULEB128Bytes(Reg);
JCE->emitULEB128Bytes(Offset);
}
}
}
@ -403,24 +403,24 @@ unsigned char* JITDwarfEmitter::EmitExceptionTable(MachineFunction* MF,
unsigned SizeAlign = (4 - TotalSize) & 3;
// Begin the exception table.
MCE->emitAlignment(4);
JCE->emitAlignment(4);
for (unsigned i = 0; i != SizeAlign; ++i) {
MCE->emitByte(0);
JCE->emitByte(0);
// Asm->EOL("Padding");
}
unsigned char* DwarfExceptionTable = (unsigned char*)MCE->getCurrentPCValue();
unsigned char* DwarfExceptionTable = (unsigned char*)JCE->getCurrentPCValue();
// Emit the header.
MCE->emitByte(dwarf::DW_EH_PE_omit);
JCE->emitByte(dwarf::DW_EH_PE_omit);
// Asm->EOL("LPStart format (DW_EH_PE_omit)");
MCE->emitByte(dwarf::DW_EH_PE_absptr);
JCE->emitByte(dwarf::DW_EH_PE_absptr);
// Asm->EOL("TType format (DW_EH_PE_absptr)");
MCE->emitULEB128Bytes(TypeOffset);
JCE->emitULEB128Bytes(TypeOffset);
// Asm->EOL("TType base offset");
MCE->emitByte(dwarf::DW_EH_PE_udata4);
JCE->emitByte(dwarf::DW_EH_PE_udata4);
// Asm->EOL("Call site format (DW_EH_PE_udata4)");
MCE->emitULEB128Bytes(SizeSites);
JCE->emitULEB128Bytes(SizeSites);
// Asm->EOL("Call-site table length");
// Emit the landing pad site information.
@ -431,32 +431,32 @@ unsigned char* JITDwarfEmitter::EmitExceptionTable(MachineFunction* MF,
if (!S.BeginLabel) {
BeginLabelPtr = (intptr_t)StartFunction;
MCE->emitInt32(0);
JCE->emitInt32(0);
} else {
BeginLabelPtr = MCE->getLabelAddress(S.BeginLabel);
MCE->emitInt32(BeginLabelPtr - (intptr_t)StartFunction);
BeginLabelPtr = JCE->getLabelAddress(S.BeginLabel);
JCE->emitInt32(BeginLabelPtr - (intptr_t)StartFunction);
}
// Asm->EOL("Region start");
if (!S.EndLabel) {
EndLabelPtr = (intptr_t)EndFunction;
MCE->emitInt32((intptr_t)EndFunction - BeginLabelPtr);
JCE->emitInt32((intptr_t)EndFunction - BeginLabelPtr);
} else {
EndLabelPtr = MCE->getLabelAddress(S.EndLabel);
MCE->emitInt32(EndLabelPtr - BeginLabelPtr);
EndLabelPtr = JCE->getLabelAddress(S.EndLabel);
JCE->emitInt32(EndLabelPtr - BeginLabelPtr);
}
//Asm->EOL("Region length");
if (!S.PadLabel) {
MCE->emitInt32(0);
JCE->emitInt32(0);
} else {
unsigned PadLabelPtr = MCE->getLabelAddress(S.PadLabel);
MCE->emitInt32(PadLabelPtr - (intptr_t)StartFunction);
unsigned PadLabelPtr = JCE->getLabelAddress(S.PadLabel);
JCE->emitInt32(PadLabelPtr - (intptr_t)StartFunction);
}
// Asm->EOL("Landing pad");
MCE->emitULEB128Bytes(S.Action);
JCE->emitULEB128Bytes(S.Action);
// Asm->EOL("Action");
}
@ -464,9 +464,9 @@ unsigned char* JITDwarfEmitter::EmitExceptionTable(MachineFunction* MF,
for (unsigned I = 0, N = Actions.size(); I != N; ++I) {
ActionEntry &Action = Actions[I];
MCE->emitSLEB128Bytes(Action.ValueForTypeID);
JCE->emitSLEB128Bytes(Action.ValueForTypeID);
//Asm->EOL("TypeInfo index");
MCE->emitSLEB128Bytes(Action.NextAction);
JCE->emitSLEB128Bytes(Action.NextAction);
//Asm->EOL("Next action");
}
@ -476,15 +476,15 @@ unsigned char* JITDwarfEmitter::EmitExceptionTable(MachineFunction* MF,
if (GV) {
if (TD->getPointerSize() == sizeof(int32_t)) {
MCE->emitInt32((intptr_t)Jit.getOrEmitGlobalVariable(GV));
JCE->emitInt32((intptr_t)Jit.getOrEmitGlobalVariable(GV));
} else {
MCE->emitInt64((intptr_t)Jit.getOrEmitGlobalVariable(GV));
JCE->emitInt64((intptr_t)Jit.getOrEmitGlobalVariable(GV));
}
} else {
if (TD->getPointerSize() == sizeof(int32_t))
MCE->emitInt32(0);
JCE->emitInt32(0);
else
MCE->emitInt64(0);
JCE->emitInt64(0);
}
// Asm->EOL("TypeInfo");
}
@ -492,11 +492,11 @@ unsigned char* JITDwarfEmitter::EmitExceptionTable(MachineFunction* MF,
// Emit the filter typeids.
for (unsigned j = 0, M = FilterIds.size(); j < M; ++j) {
unsigned TypeID = FilterIds[j];
MCE->emitULEB128Bytes(TypeID);
JCE->emitULEB128Bytes(TypeID);
//Asm->EOL("Filter TypeInfo index");
}
MCE->emitAlignment(4);
JCE->emitAlignment(4);
return DwarfExceptionTable;
}
@ -507,48 +507,48 @@ JITDwarfEmitter::EmitCommonEHFrame(const Function* Personality) const {
int stackGrowth = stackGrowthDirection == TargetFrameInfo::StackGrowsUp ?
PointerSize : -PointerSize;
unsigned char* StartCommonPtr = (unsigned char*)MCE->getCurrentPCValue();
unsigned char* StartCommonPtr = (unsigned char*)JCE->getCurrentPCValue();
// EH Common Frame header
MCE->allocateSpace(4, 0);
unsigned char* FrameCommonBeginPtr = (unsigned char*)MCE->getCurrentPCValue();
MCE->emitInt32((int)0);
MCE->emitByte(dwarf::DW_CIE_VERSION);
MCE->emitString(Personality ? "zPLR" : "zR");
MCE->emitULEB128Bytes(1);
MCE->emitSLEB128Bytes(stackGrowth);
MCE->emitByte(RI->getDwarfRegNum(RI->getRARegister(), true));
JCE->allocateSpace(4, 0);
unsigned char* FrameCommonBeginPtr = (unsigned char*)JCE->getCurrentPCValue();
JCE->emitInt32((int)0);
JCE->emitByte(dwarf::DW_CIE_VERSION);
JCE->emitString(Personality ? "zPLR" : "zR");
JCE->emitULEB128Bytes(1);
JCE->emitSLEB128Bytes(stackGrowth);
JCE->emitByte(RI->getDwarfRegNum(RI->getRARegister(), true));
if (Personality) {
// Augmentation Size: 3 small ULEBs of one byte each, and the personality
// function which size is PointerSize.
MCE->emitULEB128Bytes(3 + PointerSize);
JCE->emitULEB128Bytes(3 + PointerSize);
// We set the encoding of the personality as direct encoding because we use
// the function pointer. The encoding is not relative because the current
// PC value may be bigger than the personality function pointer.
if (PointerSize == 4) {
MCE->emitByte(dwarf::DW_EH_PE_sdata4);
MCE->emitInt32(((intptr_t)Jit.getPointerToGlobal(Personality)));
JCE->emitByte(dwarf::DW_EH_PE_sdata4);
JCE->emitInt32(((intptr_t)Jit.getPointerToGlobal(Personality)));
} else {
MCE->emitByte(dwarf::DW_EH_PE_sdata8);
MCE->emitInt64(((intptr_t)Jit.getPointerToGlobal(Personality)));
JCE->emitByte(dwarf::DW_EH_PE_sdata8);
JCE->emitInt64(((intptr_t)Jit.getPointerToGlobal(Personality)));
}
MCE->emitULEB128Bytes(dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4);
MCE->emitULEB128Bytes(dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4);
JCE->emitULEB128Bytes(dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4);
JCE->emitULEB128Bytes(dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4);
} else {
MCE->emitULEB128Bytes(1);
MCE->emitULEB128Bytes(dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4);
JCE->emitULEB128Bytes(1);
JCE->emitULEB128Bytes(dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4);
}
std::vector<MachineMove> Moves;
RI->getInitialFrameState(Moves);
EmitFrameMoves(0, Moves);
MCE->emitAlignment(PointerSize);
JCE->emitAlignment(PointerSize);
MCE->emitInt32At((uintptr_t*)StartCommonPtr,
(uintptr_t)((unsigned char*)MCE->getCurrentPCValue() -
JCE->emitInt32At((uintptr_t*)StartCommonPtr,
(uintptr_t)((unsigned char*)JCE->getCurrentPCValue() -
FrameCommonBeginPtr));
return StartCommonPtr;
@ -564,46 +564,46 @@ JITDwarfEmitter::EmitEHFrame(const Function* Personality,
unsigned PointerSize = TD->getPointerSize();
// EH frame header.
unsigned char* StartEHPtr = (unsigned char*)MCE->getCurrentPCValue();
MCE->allocateSpace(4, 0);
unsigned char* FrameBeginPtr = (unsigned char*)MCE->getCurrentPCValue();
unsigned char* StartEHPtr = (unsigned char*)JCE->getCurrentPCValue();
JCE->allocateSpace(4, 0);
unsigned char* FrameBeginPtr = (unsigned char*)JCE->getCurrentPCValue();
// FDE CIE Offset
MCE->emitInt32(FrameBeginPtr - StartCommonPtr);
MCE->emitInt32(StartFunction - (unsigned char*)MCE->getCurrentPCValue());
MCE->emitInt32(EndFunction - StartFunction);
JCE->emitInt32(FrameBeginPtr - StartCommonPtr);
JCE->emitInt32(StartFunction - (unsigned char*)JCE->getCurrentPCValue());
JCE->emitInt32(EndFunction - StartFunction);
// If there is a personality and landing pads then point to the language
// specific data area in the exception table.
if (MMI->getPersonalityIndex()) {
MCE->emitULEB128Bytes(4);
JCE->emitULEB128Bytes(4);
if (!MMI->getLandingPads().empty()) {
MCE->emitInt32(ExceptionTable - (unsigned char*)MCE->getCurrentPCValue());
JCE->emitInt32(ExceptionTable - (unsigned char*)JCE->getCurrentPCValue());
} else {
MCE->emitInt32((int)0);
JCE->emitInt32((int)0);
}
} else {
MCE->emitULEB128Bytes(0);
JCE->emitULEB128Bytes(0);
}
// Indicate locations of function specific callee saved registers in
// frame.
EmitFrameMoves((intptr_t)StartFunction, MMI->getFrameMoves());
MCE->emitAlignment(PointerSize);
JCE->emitAlignment(PointerSize);
// Indicate the size of the table
MCE->emitInt32At((uintptr_t*)StartEHPtr,
(uintptr_t)((unsigned char*)MCE->getCurrentPCValue() -
JCE->emitInt32At((uintptr_t*)StartEHPtr,
(uintptr_t)((unsigned char*)JCE->getCurrentPCValue() -
StartEHPtr));
// Double zeroes for the unwind runtime
if (PointerSize == 8) {
MCE->emitInt64(0);
MCE->emitInt64(0);
JCE->emitInt64(0);
JCE->emitInt64(0);
} else {
MCE->emitInt32(0);
MCE->emitInt32(0);
JCE->emitInt32(0);
JCE->emitInt32(0);
}
@ -611,7 +611,7 @@ JITDwarfEmitter::EmitEHFrame(const Function* Personality,
}
unsigned JITDwarfEmitter::GetDwarfTableSizeInBytes(MachineFunction& F,
MachineCodeEmitter& mce,
JITCodeEmitter& jce,
unsigned char* StartFunction,
unsigned char* EndFunction) {
const TargetMachine& TM = F.getTarget();
@ -619,7 +619,7 @@ unsigned JITDwarfEmitter::GetDwarfTableSizeInBytes(MachineFunction& F,
needsIndirectEncoding = TM.getTargetAsmInfo()->getNeedsIndirectEncoding();
stackGrowthDirection = TM.getFrameInfo()->getStackGrowthDirection();
RI = TM.getRegisterInfo();
MCE = &mce;
JCE = &jce;
unsigned FinalSize = 0;
FinalSize += GetExceptionTableSizeInBytes(&F);
@ -733,7 +733,7 @@ JITDwarfEmitter::GetFrameMovesSizeInBytes(intptr_t BaseLabelPtr,
}
intptr_t LabelPtr = 0;
if (LabelID) LabelPtr = MCE->getLabelAddress(LabelID);
if (LabelID) LabelPtr = JCE->getLabelAddress(LabelID);
const MachineLocation &Dst = Move.getDestination();
const MachineLocation &Src = Move.getSource();

8
llvm/lib/ExecutionEngine/JIT/JITDwarfEmitter.h
View File

@ -18,7 +18,7 @@
namespace llvm {
class Function;
class MachineCodeEmitter;
class JITCodeEmitter;
class MachineFunction;
class MachineModuleInfo;
class MachineMove;
@ -28,7 +28,7 @@ class TargetRegisterInfo;
class JITDwarfEmitter {
const TargetData* TD;
MachineCodeEmitter* MCE;
JITCodeEmitter* JCE;
const TargetRegisterInfo* RI;
MachineModuleInfo* MMI;
JIT& Jit;
@ -66,13 +66,13 @@ public:
JITDwarfEmitter(JIT& jit);
unsigned char* EmitDwarfTable(MachineFunction& F,
MachineCodeEmitter& MCE,
JITCodeEmitter& JCE,
unsigned char* StartFunction,
unsigned char* EndFunction);
unsigned GetDwarfTableSizeInBytes(MachineFunction& F,
MachineCodeEmitter& MCE,
JITCodeEmitter& JCE,
unsigned char* StartFunction,
unsigned char* EndFunction);

36
llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp
View File

@ -18,7 +18,7 @@
#include "llvm/Constants.h"
#include "llvm/Module.h"
#include "llvm/DerivedTypes.h"
#include "llvm/CodeGen/MachineCodeEmitter.h"
#include "llvm/CodeGen/JITCodeEmitter.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
@ -546,7 +546,7 @@ static void RemoveFunctionFromSymbolTable(void *FnStart) {
namespace {
/// JITEmitter - The JIT implementation of the MachineCodeEmitter, which is
/// used to output functions to memory for execution.
class JITEmitter : public MachineCodeEmitter {
class JITEmitter : public JITCodeEmitter {
JITMemoryManager *MemMgr;
// When outputting a function stub in the context of some other function, we
@ -1289,7 +1289,7 @@ void JITEmitter::deallocateMemForFunction(Function *F) {
void* JITEmitter::allocateSpace(uintptr_t Size, unsigned Alignment) {
if (BufferBegin)
return MachineCodeEmitter::allocateSpace(Size, Alignment);
return JITCodeEmitter::allocateSpace(Size, Alignment);
// create a new memory block if there is no active one.
// care must be taken so that BufferBegin is invalidated when a
@ -1460,7 +1460,7 @@ uintptr_t JITEmitter::getJumpTableEntryAddress(unsigned Index) const {
// Public interface to this file
//===----------------------------------------------------------------------===//
MachineCodeEmitter *JIT::createEmitter(JIT &jit, JITMemoryManager *JMM) {
JITCodeEmitter *JIT::createEmitter(JIT &jit, JITMemoryManager *JMM) {
return new JITEmitter(jit, JMM);
}
@ -1487,13 +1487,13 @@ void *JIT::getPointerToFunctionOrStub(Function *F) {
return Addr;
// Get a stub if the target supports it.
assert(isa<JITEmitter>(MCE) && "Unexpected MCE?");
assert(isa<JITEmitter>(JCE) && "Unexpected MCE?");
JITEmitter *JE = cast<JITEmitter>(getCodeEmitter());
return JE->getJITResolver().getFunctionStub(F);
}
void JIT::registerMachineCodeInfo(MachineCodeInfo *mc) {
assert(isa<JITEmitter>(MCE) && "Unexpected MCE?");
assert(isa<JITEmitter>(JCE) && "Unexpected MCE?");
JITEmitter *JE = cast<JITEmitter>(getCodeEmitter());
JE->setMachineCodeInfo(mc);
@ -1501,7 +1501,7 @@ void JIT::registerMachineCodeInfo(MachineCodeInfo *mc) {
void JIT::updateFunctionStub(Function *F) {
// Get the empty stub we generated earlier.
assert(isa<JITEmitter>(MCE) && "Unexpected MCE?");
assert(isa<JITEmitter>(JCE) && "Unexpected MCE?");
JITEmitter *JE = cast<JITEmitter>(getCodeEmitter());
void *Stub = JE->getJITResolver().getFunctionStub(F);
@ -1515,7 +1515,7 @@ void JIT::updateFunctionStub(Function *F) {
/// that were emitted during code generation.
///
void JIT::updateDlsymStubTable() {
assert(isa<JITEmitter>(MCE) && "Unexpected MCE?");
assert(isa<JITEmitter>(JCE) && "Unexpected MCE?");
JITEmitter *JE = cast<JITEmitter>(getCodeEmitter());
SmallVector<GlobalValue*, 8> GVs;
@ -1553,11 +1553,11 @@ void JIT::updateDlsymStubTable() {
JE->startGVStub(0, offset, 4);
// Emit the number of records
MCE->emitInt32(nStubs);
JE->emitInt32(nStubs);
// Emit the string offsets
for (unsigned i = 0; i != nStubs; ++i)
MCE->emitInt32(Offsets[i]);
JE->emitInt32(Offsets[i]);
// Emit the pointers. Verify that they are at least 2-byte aligned, and set
// the low bit to 0 == GV, 1 == Function, so that the client code doing the
@ -1571,26 +1571,26 @@ void JIT::updateDlsymStubTable() {
Ptr |= (intptr_t)1;
if (sizeof(Ptr) == 8)
MCE->emitInt64(Ptr);
JE->emitInt64(Ptr);
else
MCE->emitInt32(Ptr);
JE->emitInt32(Ptr);
}
for (StringMapConstIterator<void*> i = ExtFns.begin(), e = ExtFns.end();
i != e; ++i) {
intptr_t Ptr = (intptr_t)i->second | 1;
if (sizeof(Ptr) == 8)
MCE->emitInt64(Ptr);
JE->emitInt64(Ptr);
else
MCE->emitInt32(Ptr);
JE->emitInt32(Ptr);
}
// Emit the strings.
for (unsigned i = 0; i != GVs.size(); ++i)
MCE->emitString(GVs[i]->getName());
JE->emitString(GVs[i]->getName());
for (StringMapConstIterator<void*> i = ExtFns.begin(), e = ExtFns.end();
i != e; ++i)
MCE->emitString(i->first());
JE->emitString(i->first());
// Tell the JIT memory manager where it is. The JIT Memory Manager will
// deallocate space for the old one, if one existed.
@ -1609,7 +1609,7 @@ void JIT::freeMachineCodeForFunction(Function *F) {
RemoveFunctionFromSymbolTable(OldPtr);
// Free the actual memory for the function body and related stuff.
assert(isa<JITEmitter>(MCE) && "Unexpected MCE?");
cast<JITEmitter>(MCE)->deallocateMemForFunction(F);
assert(isa<JITEmitter>(JCE) && "Unexpected MCE?");
cast<JITEmitter>(JCE)->deallocateMemForFunction(F);
}

12
llvm/lib/Target/ARM/ARM.h
View File

@ -23,6 +23,7 @@ namespace llvm {
class ARMTargetMachine;
class FunctionPass;
class MachineCodeEmitter;
class JITCodeEmitter;
class raw_ostream;
// Enums corresponding to ARM condition codes
@ -96,6 +97,17 @@ FunctionPass *createARMCodePrinterPass(raw_ostream &O,
bool Verbose);
FunctionPass *createARMCodeEmitterPass(ARMTargetMachine &TM,
MachineCodeEmitter &MCE);
FunctionPass *createARMCodeEmitterPass(
ARMTargetMachine &TM, MachineCodeEmitter &MCE);
/*
template< class machineCodeEmitter>
FunctionPass *createARMCodeEmitterPass(
ARMTargetMachine &TM, machineCodeEmitter &MCE);
*/
FunctionPass *createARMJITCodeEmitterPass(
ARMTargetMachine &TM, JITCodeEmitter &JCE);
FunctionPass *createARMLoadStoreOptimizationPass();
FunctionPass *createARMConstantIslandPass();

157
llvm/lib/Target/ARM/ARMCodeEmitter.cpp
View File

@ -25,6 +25,7 @@
#include "llvm/Function.h"
#include "llvm/PassManager.h"
#include "llvm/CodeGen/MachineCodeEmitter.h"
#include "llvm/CodeGen/JITCodeEmitter.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
@ -41,23 +42,37 @@ using namespace llvm;
STATISTIC(NumEmitted, "Number of machine instructions emitted");
namespace {
class VISIBILITY_HIDDEN ARMCodeEmitter : public MachineFunctionPass {
class ARMCodeEmitter {
public:
/// getBinaryCodeForInstr - This function, generated by the
/// CodeEmitterGenerator using TableGen, produces the binary encoding for
/// machine instructions.
unsigned getBinaryCodeForInstr(const MachineInstr &MI);
};
template< class machineCodeEmitter>
class VISIBILITY_HIDDEN Emitter : public MachineFunctionPass,
public ARMCodeEmitter
{
ARMJITInfo *JTI;
const ARMInstrInfo *II;
const TargetData *TD;
TargetMachine &TM;
MachineCodeEmitter &MCE;
machineCodeEmitter &MCE;
const std::vector<MachineConstantPoolEntry> *MCPEs;
const std::vector<MachineJumpTableEntry> *MJTEs;
bool IsPIC;
public:
static char ID;
explicit ARMCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce)
explicit Emitter(TargetMachine &tm, machineCodeEmitter &mce)
: MachineFunctionPass(&ID), JTI(0), II(0), TD(0), TM(tm),
MCE(mce), MCPEs(0), MJTEs(0),
IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
ARMCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce,
Emitter(TargetMachine &tm, machineCodeEmitter &mce,
const ARMInstrInfo &ii, const TargetData &td)
: MachineFunctionPass(&ID), JTI(0), II(&ii), TD(&td), TM(tm),
MCE(mce), MCPEs(0), MJTEs(0),
@ -134,12 +149,6 @@ namespace {
void emitMiscInstruction(const MachineInstr &MI);
/// getBinaryCodeForInstr - This function, generated by the
/// CodeEmitterGenerator using TableGen, produces the binary encoding for
/// machine instructions.
///
unsigned getBinaryCodeForInstr(const MachineInstr &MI);
/// getMachineOpValue - Return binary encoding of operand. If the machine
/// operand requires relocation, record the relocation and return zero.
unsigned getMachineOpValue(const MachineInstr &MI,const MachineOperand &MO);
@ -161,17 +170,30 @@ namespace {
void emitMachineBasicBlock(MachineBasicBlock *BB, unsigned Reloc,
intptr_t JTBase = 0);
};
char ARMCodeEmitter::ID = 0;
template <class machineCodeEmitter>
char Emitter<machineCodeEmitter>::ID = 0;
}
/// createARMCodeEmitterPass - Return a pass that emits the collected ARM code
/// to the specified MCE object.
FunctionPass *llvm::createARMCodeEmitterPass(ARMTargetMachine &TM,
MachineCodeEmitter &MCE) {
return new ARMCodeEmitter(TM, MCE);
namespace llvm {
FunctionPass *createARMCodeEmitterPass(
ARMTargetMachine &TM, MachineCodeEmitter &MCE)
{
return new Emitter<MachineCodeEmitter>(TM, MCE);
}
FunctionPass *createARMJITCodeEmitterPass(
ARMTargetMachine &TM, JITCodeEmitter &JCE)
{
return new Emitter<JITCodeEmitter>(TM, JCE);
}
bool ARMCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
} // end namespace llvm
template< class machineCodeEmitter>
bool Emitter< machineCodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
MF.getTarget().getRelocationModel() != Reloc::Static) &&
"JIT relocation model must be set to static or default!");
@ -200,7 +222,8 @@ bool ARMCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
/// getShiftOp - Return the shift opcode (bit[6:5]) of the immediate value.
///
unsigned ARMCodeEmitter::getShiftOp(unsigned Imm) const {
template< class machineCodeEmitter>
unsigned Emitter< machineCodeEmitter>::getShiftOp(unsigned Imm) const {
switch (ARM_AM::getAM2ShiftOpc(Imm)) {
default: assert(0 && "Unknown shift opc!");
case ARM_AM::asr: return 2;
@ -214,7 +237,8 @@ unsigned ARMCodeEmitter::getShiftOp(unsigned Imm) const {
/// getMachineOpValue - Return binary encoding of operand. If the machine
/// operand requires relocation, record the relocation and return zero.
unsigned ARMCodeEmitter::getMachineOpValue(const MachineInstr &MI,
template< class machineCodeEmitter>
unsigned Emitter< machineCodeEmitter>::getMachineOpValue(const MachineInstr &MI,
const MachineOperand &MO) {
if (MO.isReg())
return ARMRegisterInfo::getRegisterNumbering(MO.getReg());
@ -243,7 +267,8 @@ unsigned ARMCodeEmitter::getMachineOpValue(const MachineInstr &MI,
/// emitGlobalAddress - Emit the specified address to the code stream.
///
void ARMCodeEmitter::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
bool NeedStub, intptr_t ACPV) {
MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(),
Reloc, GV, ACPV, NeedStub));
@ -252,7 +277,8 @@ void ARMCodeEmitter::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
/// emitExternalSymbolAddress - Arrange for the address of an external symbol to
/// be emitted to the current location in the function, and allow it to be PC
/// relative.
void ARMCodeEmitter::emitExternalSymbolAddress(const char *ES, unsigned Reloc) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitExternalSymbolAddress(const char *ES, unsigned Reloc) {
MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
Reloc, ES));
}
@ -260,7 +286,8 @@ void ARMCodeEmitter::emitExternalSymbolAddress(const char *ES, unsigned Reloc) {
/// emitConstPoolAddress - Arrange for the address of an constant pool
/// to be emitted to the current location in the function, and allow it to be PC
/// relative.
void ARMCodeEmitter::emitConstPoolAddress(unsigned CPI, unsigned Reloc) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitConstPoolAddress(unsigned CPI, unsigned Reloc) {
// Tell JIT emitter we'll resolve the address.
MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
Reloc, CPI, 0, true));
@ -269,19 +296,22 @@ void ARMCodeEmitter::emitConstPoolAddress(unsigned CPI, unsigned Reloc) {
/// emitJumpTableAddress - Arrange for the address of a jump table to
/// be emitted to the current location in the function, and allow it to be PC
/// relative.
void ARMCodeEmitter::emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) {
MCE.addRelocation(MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(),
Reloc, JTIndex, 0, true));
}
/// emitMachineBasicBlock - Emit the specified address basic block.
void ARMCodeEmitter::emitMachineBasicBlock(MachineBasicBlock *BB,
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitMachineBasicBlock(MachineBasicBlock *BB,
unsigned Reloc, intptr_t JTBase) {
MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
Reloc, BB, JTBase));
}
void ARMCodeEmitter::emitWordLE(unsigned Binary) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitWordLE(unsigned Binary) {
#ifndef NDEBUG
DOUT << " 0x" << std::hex << std::setw(8) << std::setfill('0')
<< Binary << std::dec << "\n";
@ -289,7 +319,8 @@ void ARMCodeEmitter::emitWordLE(unsigned Binary) {
MCE.emitWordLE(Binary);
}
void ARMCodeEmitter::emitDWordLE(uint64_t Binary) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitDWordLE(uint64_t Binary) {
#ifndef NDEBUG
DOUT << " 0x" << std::hex << std::setw(8) << std::setfill('0')
<< (unsigned)Binary << std::dec << "\n";
@ -299,7 +330,8 @@ void ARMCodeEmitter::emitDWordLE(uint64_t Binary) {
MCE.emitDWordLE(Binary);
}
void ARMCodeEmitter::emitInstruction(const MachineInstr &MI) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitInstruction(const MachineInstr &MI) {
DOUT << "JIT: " << (void*)MCE.getCurrentPCValue() << ":\t" << MI;
NumEmitted++; // Keep track of the # of mi's emitted
@ -365,7 +397,8 @@ void ARMCodeEmitter::emitInstruction(const MachineInstr &MI) {
}
}
void ARMCodeEmitter::emitConstPoolInstruction(const MachineInstr &MI) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitConstPoolInstruction(const MachineInstr &MI) {
unsigned CPI = MI.getOperand(0).getImm(); // CP instruction index.
unsigned CPIndex = MI.getOperand(1).getIndex(); // Actual cp entry index.
const MachineConstantPoolEntry &MCPE = (*MCPEs)[CPIndex];
@ -432,7 +465,8 @@ void ARMCodeEmitter::emitConstPoolInstruction(const MachineInstr &MI) {
}
}
void ARMCodeEmitter::emitMOVi2piecesInstruction(const MachineInstr &MI) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitMOVi2piecesInstruction(const MachineInstr &MI) {
const MachineOperand &MO0 = MI.getOperand(0);
const MachineOperand &MO1 = MI.getOperand(1);
assert(MO1.isImm() && "Not a valid so_imm value!");
@ -473,7 +507,8 @@ void ARMCodeEmitter::emitMOVi2piecesInstruction(const MachineInstr &MI) {
emitWordLE(Binary);
}
void ARMCodeEmitter::emitLEApcrelJTInstruction(const MachineInstr &MI) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitLEApcrelJTInstruction(const MachineInstr &MI) {
// It's basically add r, pc, (LJTI - $+8)
const TargetInstrDesc &TID = MI.getDesc();
@ -501,7 +536,8 @@ void ARMCodeEmitter::emitLEApcrelJTInstruction(const MachineInstr &MI) {
emitWordLE(Binary);
}
void ARMCodeEmitter::emitPseudoMoveInstruction(const MachineInstr &MI) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitPseudoMoveInstruction(const MachineInstr &MI) {
unsigned Opcode = MI.getDesc().Opcode;
// Part of binary is determined by TableGn.
@ -540,13 +576,15 @@ void ARMCodeEmitter::emitPseudoMoveInstruction(const MachineInstr &MI) {
emitWordLE(Binary);
}
void ARMCodeEmitter::addPCLabel(unsigned LabelID) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::addPCLabel(unsigned LabelID) {
DOUT << " ** LPC" << LabelID << " @ "
<< (void*)MCE.getCurrentPCValue() << '\n';
JTI->addPCLabelAddr(LabelID, MCE.getCurrentPCValue());
}
void ARMCodeEmitter::emitPseudoInstruction(const MachineInstr &MI) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitPseudoInstruction(const MachineInstr &MI) {
unsigned Opcode = MI.getDesc().Opcode;
switch (Opcode) {
default:
@ -615,8 +653,8 @@ void ARMCodeEmitter::emitPseudoInstruction(const MachineInstr &MI) {
}
}
unsigned ARMCodeEmitter::getMachineSoRegOpValue(const MachineInstr &MI,
template< class machineCodeEmitter>
unsigned Emitter< machineCodeEmitter>::getMachineSoRegOpValue(const MachineInstr &MI,
const TargetInstrDesc &TID,
const MachineOperand &MO,
unsigned OpIdx) {
@ -674,7 +712,8 @@ unsigned ARMCodeEmitter::getMachineSoRegOpValue(const MachineInstr &MI,
return Binary | ARM_AM::getSORegOffset(MO2.getImm()) << 7;
}
unsigned ARMCodeEmitter::getMachineSoImmOpValue(unsigned SoImm) {
template< class machineCodeEmitter>
unsigned Emitter< machineCodeEmitter>::getMachineSoImmOpValue(unsigned SoImm) {
// Encode rotate_imm.
unsigned Binary = (ARM_AM::getSOImmValRot(SoImm) >> 1)
<< ARMII::SoRotImmShift;
@ -684,7 +723,8 @@ unsigned ARMCodeEmitter::getMachineSoImmOpValue(unsigned SoImm) {
return Binary;
}
unsigned ARMCodeEmitter::getAddrModeSBit(const MachineInstr &MI,
template< class machineCodeEmitter>
unsigned Emitter< machineCodeEmitter>::getAddrModeSBit(const MachineInstr &MI,
const TargetInstrDesc &TID) const {
for (unsigned i = MI.getNumOperands(), e = TID.getNumOperands(); i != e; --i){
const MachineOperand &MO = MI.getOperand(i-1);
@ -694,7 +734,8 @@ unsigned ARMCodeEmitter::getAddrModeSBit(const MachineInstr &MI,
return 0;
}
void ARMCodeEmitter::emitDataProcessingInstruction(const MachineInstr &MI,
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitDataProcessingInstruction(const MachineInstr &MI,
unsigned ImplicitRd,
unsigned ImplicitRn) {
const TargetInstrDesc &TID = MI.getDesc();
@ -757,7 +798,8 @@ void ARMCodeEmitter::emitDataProcessingInstruction(const MachineInstr &MI,
emitWordLE(Binary);
}
void ARMCodeEmitter::emitLoadStoreInstruction(const MachineInstr &MI,
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitLoadStoreInstruction(const MachineInstr &MI,
unsigned ImplicitRd,
unsigned ImplicitRn) {
const TargetInstrDesc &TID = MI.getDesc();
@ -831,7 +873,8 @@ void ARMCodeEmitter::emitLoadStoreInstruction(const MachineInstr &MI,
emitWordLE(Binary);
}
void ARMCodeEmitter::emitMiscLoadStoreInstruction(const MachineInstr &MI,
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitMiscLoadStoreInstruction(const MachineInstr &MI,
unsigned ImplicitRn) {
const TargetInstrDesc &TID = MI.getDesc();
unsigned Form = TID.TSFlags & ARMII::FormMask;
@ -914,7 +957,8 @@ static unsigned getAddrModeUPBits(unsigned Mode) {
return Binary;
}
void ARMCodeEmitter::emitLoadStoreMultipleInstruction(const MachineInstr &MI) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitLoadStoreMultipleInstruction(const MachineInstr &MI) {
// Part of binary is determined by TableGn.
unsigned Binary = getBinaryCodeForInstr(MI);
@ -946,7 +990,8 @@ void ARMCodeEmitter::emitLoadStoreMultipleInstruction(const MachineInstr &MI) {
emitWordLE(Binary);
}
void ARMCodeEmitter::emitMulFrmInstruction(const MachineInstr &MI) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitMulFrmInstruction(const MachineInstr &MI) {
const TargetInstrDesc &TID = MI.getDesc();
// Part of binary is determined by TableGn.
@ -983,7 +1028,8 @@ void ARMCodeEmitter::emitMulFrmInstruction(const MachineInstr &MI) {
emitWordLE(Binary);
}
void ARMCodeEmitter::emitExtendInstruction(const MachineInstr &MI) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitExtendInstruction(const MachineInstr &MI) {
const TargetInstrDesc &TID = MI.getDesc();
// Part of binary is determined by TableGn.
@ -1020,7 +1066,8 @@ void ARMCodeEmitter::emitExtendInstruction(const MachineInstr &MI) {
emitWordLE(Binary);
}
void ARMCodeEmitter::emitMiscArithInstruction(const MachineInstr &MI) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitMiscArithInstruction(const MachineInstr &MI) {
const TargetInstrDesc &TID = MI.getDesc();
// Part of binary is determined by TableGn.
@ -1058,7 +1105,8 @@ void ARMCodeEmitter::emitMiscArithInstruction(const MachineInstr &MI) {
emitWordLE(Binary);
}
void ARMCodeEmitter::emitBranchInstruction(const MachineInstr &MI) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitBranchInstruction(const MachineInstr &MI) {
const TargetInstrDesc &TID = MI.getDesc();
if (TID.Opcode == ARM::TPsoft)
@ -1076,7 +1124,8 @@ void ARMCodeEmitter::emitBranchInstruction(const MachineInstr &MI) {
emitWordLE(Binary);
}
void ARMCodeEmitter::emitInlineJumpTable(unsigned JTIndex) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitInlineJumpTable(unsigned JTIndex) {
// Remember the base address of the inline jump table.
uintptr_t JTBase = MCE.getCurrentPCValue();
JTI->addJumpTableBaseAddr(JTIndex, JTBase);
@ -1095,7 +1144,8 @@ void ARMCodeEmitter::emitInlineJumpTable(unsigned JTIndex) {
}
}
void ARMCodeEmitter::emitMiscBranchInstruction(const MachineInstr &MI) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitMiscBranchInstruction(const MachineInstr &MI) {
const TargetInstrDesc &TID = MI.getDesc();
// Handle jump tables.
@ -1175,7 +1225,8 @@ static unsigned encodeVFPRm(const MachineInstr &MI, unsigned OpIdx) {
return Binary;
}
void ARMCodeEmitter::emitVFPArithInstruction(const MachineInstr &MI) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitVFPArithInstruction(const MachineInstr &MI) {
const TargetInstrDesc &TID = MI.getDesc();
// Part of binary is determined by TableGn.
@ -1214,7 +1265,8 @@ void ARMCodeEmitter::emitVFPArithInstruction(const MachineInstr &MI) {
emitWordLE(Binary);
}
void ARMCodeEmitter::emitVFPConversionInstruction(const MachineInstr &MI) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitVFPConversionInstruction(const MachineInstr &MI) {
const TargetInstrDesc &TID = MI.getDesc();
unsigned Form = TID.TSFlags & ARMII::FormMask;
@ -1270,7 +1322,8 @@ void ARMCodeEmitter::emitVFPConversionInstruction(const MachineInstr &MI) {
emitWordLE(Binary);
}
void ARMCodeEmitter::emitVFPLoadStoreInstruction(const MachineInstr &MI) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitVFPLoadStoreInstruction(const MachineInstr &MI) {
// Part of binary is determined by TableGn.
unsigned Binary = getBinaryCodeForInstr(MI);
@ -1304,8 +1357,8 @@ void ARMCodeEmitter::emitVFPLoadStoreInstruction(const MachineInstr &MI) {
emitWordLE(Binary);
}
void
ARMCodeEmitter::emitVFPLoadStoreMultipleInstruction(const MachineInstr &MI) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitVFPLoadStoreMultipleInstruction(const MachineInstr &MI) {
// Part of binary is determined by TableGn.
unsigned Binary = getBinaryCodeForInstr(MI);
@ -1339,7 +1392,8 @@ ARMCodeEmitter::emitVFPLoadStoreMultipleInstruction(const MachineInstr &MI) {
emitWordLE(Binary);
}
void ARMCodeEmitter::emitMiscInstruction(const MachineInstr &MI) {
template< class machineCodeEmitter>
void Emitter< machineCodeEmitter>::emitMiscInstruction(const MachineInstr &MI) {
// Part of binary is determined by TableGn.
unsigned Binary = getBinaryCodeForInstr(MI);
@ -1350,3 +1404,4 @@ void ARMCodeEmitter::emitMiscInstruction(const MachineInstr &MI) {
}
#include "ARMGenCodeEmitter.inc"

48
llvm/lib/Target/ARM/ARMJITInfo.cpp
View File

@ -18,7 +18,7 @@
#include "ARMRelocations.h"
#include "ARMSubtarget.h"
#include "llvm/Function.h"
#include "llvm/CodeGen/MachineCodeEmitter.h"
#include "llvm/CodeGen/JITCodeEmitter.h"
#include "llvm/Config/alloca.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Streams.h"
@ -141,16 +141,16 @@ ARMJITInfo::getLazyResolverFunction(JITCompilerFn F) {
}
void *ARMJITInfo::emitGlobalValueIndirectSym(const GlobalValue *GV, void *Ptr,
MachineCodeEmitter &MCE) {
MCE.startGVStub(GV, 4, 4);
MCE.emitWordLE((intptr_t)Ptr);
void *PtrAddr = MCE.finishGVStub(GV);
JITCodeEmitter &JCE) {
JCE.startGVStub(GV, 4, 4);
JCE.emitWordLE((intptr_t)Ptr);
void *PtrAddr = JCE.finishGVStub(GV);
addIndirectSymAddr(Ptr, (intptr_t)PtrAddr);
return PtrAddr;
}
void *ARMJITInfo::emitFunctionStub(const Function* F, void *Fn,
MachineCodeEmitter &MCE) {
JITCodeEmitter &JCE) {
// If this is just a call to an external function, emit a branch instead of a
// call. The code is the same except for one bit of the last instruction.
if (Fn != (void*)(intptr_t)ARMCompilationCallback) {
@ -160,7 +160,7 @@ void *ARMJITInfo::emitFunctionStub(const Function* F, void *Fn,
intptr_t LazyPtr = getIndirectSymAddr(Fn);
if (!LazyPtr) {
// In PIC mode, the function stub is loading a lazy-ptr.
LazyPtr= (intptr_t)emitGlobalValueIndirectSym((GlobalValue*)F, Fn, MCE);
LazyPtr= (intptr_t)emitGlobalValueIndirectSym((GlobalValue*)F, Fn, JCE);
if (F)
DOUT << "JIT: Indirect symbol emitted at [" << LazyPtr << "] for GV '"
<< F->getName() << "'\n";
@ -168,19 +168,19 @@ void *ARMJITInfo::emitFunctionStub(const Function* F, void *Fn,
DOUT << "JIT: Stub emitted at [" << LazyPtr
<< "] for external function at '" << Fn << "'\n";
}
MCE.startGVStub(F, 16, 4);
intptr_t Addr = (intptr_t)MCE.getCurrentPCValue();
MCE.emitWordLE(0xe59fc004); // ldr pc, [pc, #+4]
MCE.emitWordLE(0xe08fc00c); // L_func$scv: add ip, pc, ip
MCE.emitWordLE(0xe59cf000); // ldr pc, [ip]
MCE.emitWordLE(LazyPtr - (Addr+4+8)); // func - (L_func$scv+8)
JCE.startGVStub(F, 16, 4);
intptr_t Addr = (intptr_t)JCE.getCurrentPCValue();
JCE.emitWordLE(0xe59fc004); // ldr pc, [pc, #+4]
JCE.emitWordLE(0xe08fc00c); // L_func$scv: add ip, pc, ip
JCE.emitWordLE(0xe59cf000); // ldr pc, [ip]
JCE.emitWordLE(LazyPtr - (Addr+4+8)); // func - (L_func$scv+8)
sys::Memory::InvalidateInstructionCache((void*)Addr, 16);
} else {
// The stub is 8-byte size and 4-aligned.
MCE.startGVStub(F, 8, 4);
intptr_t Addr = (intptr_t)MCE.getCurrentPCValue();
MCE.emitWordLE(0xe51ff004); // ldr pc, [pc, #-4]
MCE.emitWordLE((intptr_t)Fn); // addr of function
JCE.startGVStub(F, 8, 4);
intptr_t Addr = (intptr_t)JCE.getCurrentPCValue();
JCE.emitWordLE(0xe51ff004); // ldr pc, [pc, #-4]
JCE.emitWordLE((intptr_t)Fn); // addr of function
sys::Memory::InvalidateInstructionCache((void*)Addr, 8);
}
} else {
@ -191,22 +191,22 @@ void *ARMJITInfo::emitFunctionStub(const Function* F, void *Fn,
//
// Branch and link to the compilation callback.
// The stub is 16-byte size and 4-byte aligned.
MCE.startGVStub(F, 16, 4);
intptr_t Addr = (intptr_t)MCE.getCurrentPCValue();
JCE.startGVStub(F, 16, 4);
intptr_t Addr = (intptr_t)JCE.getCurrentPCValue();
// Save LR so the callback can determine which stub called it.
// The compilation callback is responsible for popping this prior
// to returning.
MCE.emitWordLE(0xe92d4000); // push {lr}
JCE.emitWordLE(0xe92d4000); // push {lr}
// Set the return address to go back to the start of this stub.
MCE.emitWordLE(0xe24fe00c); // sub lr, pc, #12
JCE.emitWordLE(0xe24fe00c); // sub lr, pc, #12
// Invoke the compilation callback.
MCE.emitWordLE(0xe51ff004); // ldr pc, [pc, #-4]
JCE.emitWordLE(0xe51ff004); // ldr pc, [pc, #-4]
// The address of the compilation callback.
MCE.emitWordLE((intptr_t)ARMCompilationCallback);
JCE.emitWordLE((intptr_t)ARMCompilationCallback);
sys::Memory::InvalidateInstructionCache((void*)Addr, 16);
}
return MCE.finishGVStub(F);
return JCE.finishGVStub(F);
}
intptr_t ARMJITInfo::resolveRelocDestAddr(MachineRelocation *MR) const {

10
llvm/lib/Target/ARM/ARMJITInfo.h
View File

@ -55,17 +55,17 @@ namespace llvm {
///
virtual void replaceMachineCodeForFunction(void *Old, void *New);
/// emitGlobalValueIndirectSym - Use the specified MachineCodeEmitter object
/// emitGlobalValueIndirectSym - Use the specified JITCodeEmitter object
/// to emit an indirect symbol which contains the address of the specified
/// ptr.
virtual void *emitGlobalValueIndirectSym(const GlobalValue* GV, void *ptr,
MachineCodeEmitter &MCE);
JITCodeEmitter &JCE);
/// emitFunctionStub - Use the specified MachineCodeEmitter object to emit a
/// emitFunctionStub - Use the specified JITCodeEmitter object to emit a
/// small native function that simply calls the function at the specified
/// address.
virtual void *emitFunctionStub(const Function* F, void *Fn,
MachineCodeEmitter &MCE);
JITCodeEmitter &JCE);
/// getLazyResolverFunction - Expose the lazy resolver to the JIT.
virtual LazyResolverFn getLazyResolverFunction(JITCompilerFn);
@ -86,7 +86,7 @@ namespace llvm {
/// allocateSeparateGVMemory - If true, globals should be placed in
/// separately allocated heap memory rather than in the same
/// code memory allocated by MachineCodeEmitter.
/// code memory allocated by JITCodeEmitter.
virtual bool allocateSeparateGVMemory() const {
#ifdef __APPLE__
return true;

36
llvm/lib/Target/ARM/ARMTargetMachine.cpp
View File

@ -190,6 +190,25 @@ bool ARMTargetMachine::addCodeEmitter(PassManagerBase &PM,
return false;
}
bool ARMTargetMachine::addCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
bool DumpAsm,
JITCodeEmitter &JCE) {
// FIXME: Move this to TargetJITInfo!
if (DefRelocModel == Reloc::Default)
setRelocationModel(Reloc::Static);
// Machine code emitter pass for ARM.
PM.add(createARMJITCodeEmitterPass(*this, JCE));
if (DumpAsm) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
}
return false;
}
bool ARMTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
bool DumpAsm,
@ -204,3 +223,20 @@ bool ARMTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
return false;
}
bool ARMTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
bool DumpAsm,
JITCodeEmitter &JCE) {
// Machine code emitter pass for ARM.
PM.add(createARMJITCodeEmitterPass(*this, JCE));
if (DumpAsm) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
}
return false;
}

6
llvm/lib/Target/ARM/ARMTargetMachine.h
View File

@ -77,10 +77,16 @@ public:
bool Verbose, raw_ostream &Out);
virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
bool DumpAsm, JITCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
bool DumpAsm,
MachineCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
bool DumpAsm,
JITCodeEmitter &MCE);
};
/// ThumbTargetMachine - Thumb target machine.

2
llvm/lib/Target/Alpha/Alpha.h
View File

@ -32,6 +32,8 @@ namespace llvm {
FunctionPass *createAlphaPatternInstructionSelector(TargetMachine &TM);
FunctionPass *createAlphaCodeEmitterPass(AlphaTargetMachine &TM,
MachineCodeEmitter &MCE);
FunctionPass *createAlphaJITCodeEmitterPass(AlphaTargetMachine &TM,
JITCodeEmitter &JCE);
FunctionPass *createAlphaLLRPPass(AlphaTargetMachine &tm);
FunctionPass *createAlphaBranchSelectionPass();

72
llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp
View File

@ -18,31 +18,50 @@
#include "Alpha.h"
#include "llvm/PassManager.h"
#include "llvm/CodeGen/MachineCodeEmitter.h"
#include "llvm/CodeGen/JITCodeEmitter.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Function.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
using namespace llvm;
namespace {
class AlphaCodeEmitter : public MachineFunctionPass {
const AlphaInstrInfo *II;
TargetMachine &TM;
MachineCodeEmitter &MCE;
class AlphaCodeEmitter {
MachineCodeEmitter &MCE;
public:
AlphaCodeEmitter( MachineCodeEmitter &mce) : MCE(mce) {}
/// getBinaryCodeForInstr - This function, generated by the
/// CodeEmitterGenerator using TableGen, produces the binary encoding for
/// machine instructions.
unsigned getBinaryCodeForInstr(const MachineInstr &MI);
/// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
///
unsigned getMachineOpValue(const MachineInstr &MI,
const MachineOperand &MO);
unsigned getMachineOpValue(const MachineInstr &MI, const MachineOperand &MO);
};
template <class machineCodeEmitter>
class VISIBILITY_HIDDEN Emitter : public MachineFunctionPass,
public AlphaCodeEmitter
{
const AlphaInstrInfo *II;
TargetMachine &TM;
machineCodeEmitter &MCE;
public:
static char ID;
explicit AlphaCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce)
: MachineFunctionPass(&ID), II(0), TM(tm), MCE(mce) {}
AlphaCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce,
explicit Emitter(TargetMachine &tm, machineCodeEmitter &mce)
: MachineFunctionPass(&ID), AlphaCodeEmitter( mce),
II(0), TM(tm), MCE(mce) {}
Emitter(TargetMachine &tm, machineCodeEmitter &mce,
const AlphaInstrInfo& ii)
: MachineFunctionPass(&ID), II(&ii), TM(tm), MCE(mce) {}
: MachineFunctionPass(&ID), AlphaCodeEmitter( mce),
II(&ii), TM(tm), MCE(mce) {}
bool runOnMachineFunction(MachineFunction &MF);
@ -52,27 +71,29 @@ namespace {
void emitInstruction(const MachineInstr &MI);
/// getBinaryCodeForInstr - This function, generated by the
/// CodeEmitterGenerator using TableGen, produces the binary encoding for
/// machine instructions.
///
unsigned getBinaryCodeForInstr(const MachineInstr &MI);
private:
void emitBasicBlock(MachineBasicBlock &MBB);
};
char AlphaCodeEmitter::ID = 0;
template <class machineCodeEmitter>
char Emitter<machineCodeEmitter>::ID = 0;
}
/// createAlphaCodeEmitterPass - Return a pass that emits the collected Alpha code
/// to the specified MCE object.
FunctionPass *llvm::createAlphaCodeEmitterPass(AlphaTargetMachine &TM,
FunctionPass *llvm::createAlphaCodeEmitterPass( AlphaTargetMachine &TM,
MachineCodeEmitter &MCE) {
return new AlphaCodeEmitter(TM, MCE);
return new Emitter<MachineCodeEmitter>(TM, MCE);
}
bool AlphaCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
FunctionPass *llvm::createAlphaJITCodeEmitterPass( AlphaTargetMachine &TM,
JITCodeEmitter &JCE) {
return new Emitter<JITCodeEmitter>(TM, JCE);
}
template <class machineCodeEmitter>
bool Emitter<machineCodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
II = ((AlphaTargetMachine&)MF.getTarget()).getInstrInfo();
do {
@ -84,7 +105,8 @@ bool AlphaCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
return false;
}
void AlphaCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
template <class machineCodeEmitter>
void Emitter<machineCodeEmitter>::emitBasicBlock(MachineBasicBlock &MBB) {
MCE.StartMachineBasicBlock(&MBB);
for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
I != E; ++I) {
@ -143,7 +165,7 @@ static unsigned getAlphaRegNumber(unsigned Reg) {
}
unsigned AlphaCodeEmitter::getMachineOpValue(const MachineInstr &MI,
const MachineOperand &MO) {
const MachineOperand &MO) {
unsigned rv = 0; // Return value; defaults to 0 for unhandled cases
// or things that get fixed up later by the JIT.
@ -215,6 +237,6 @@ unsigned AlphaCodeEmitter::getMachineOpValue(const MachineInstr &MI,
return rv;
}
#include "AlphaGenCodeEmitter.inc"

12
llvm/lib/Target/Alpha/AlphaJITInfo.cpp
View File

@ -15,7 +15,7 @@
#include "AlphaJITInfo.h"
#include "AlphaRelocations.h"
#include "llvm/Function.h"
#include "llvm/CodeGen/MachineCodeEmitter.h"
#include "llvm/CodeGen/JITCodeEmitter.h"
#include "llvm/Config/alloca.h"
#include "llvm/Support/Debug.h"
#include <cstdlib>
@ -192,16 +192,16 @@ extern "C" {
}
void *AlphaJITInfo::emitFunctionStub(const Function* F, void *Fn,
MachineCodeEmitter &MCE) {
JITCodeEmitter &JCE) {
//assert(Fn == AlphaCompilationCallback && "Where are you going?\n");
//Do things in a stupid slow way!
MCE.startGVStub(F, 19*4);
void* Addr = (void*)(intptr_t)MCE.getCurrentPCValue();
JCE.startGVStub(F, 19*4);
void* Addr = (void*)(intptr_t)JCE.getCurrentPCValue();
for (int x = 0; x < 19; ++ x)
MCE.emitWordLE(0);
JCE.emitWordLE(0);
EmitBranchToAt(Addr, Fn);
DOUT << "Emitting Stub to " << Fn << " at [" << Addr << "]\n";
return MCE.finishGVStub(F);
return JCE.finishGVStub(F);
}
TargetJITInfo::LazyResolverFn

2
llvm/lib/Target/Alpha/AlphaJITInfo.h
View File

@ -27,7 +27,7 @@ namespace llvm {
{ useGOT = true; }
virtual void *emitFunctionStub(const Function* F, void *Fn,
MachineCodeEmitter &MCE);
JITCodeEmitter &JCE);
virtual LazyResolverFn getLazyResolverFunction(JITCompilerFn);
virtual void relocate(void *Function, MachineRelocation *MR,
unsigned NumRelocs, unsigned char* GOTBase);

15
llvm/lib/Target/Alpha/AlphaTargetMachine.cpp
View File

@ -103,9 +103,24 @@ bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
PM.add(createAlphaCodePrinterPass(errs(), *this, OptLevel, true));
return false;
}
bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
bool DumpAsm, JITCodeEmitter &JCE) {
PM.add(createAlphaJITCodeEmitterPass(*this, JCE));
if (DumpAsm)
PM.add(createAlphaCodePrinterPass(errs(), *this, OptLevel, true));
return false;
}
bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
bool DumpAsm,
MachineCodeEmitter &MCE) {
return addCodeEmitter(PM, OptLevel, DumpAsm, MCE);
}
bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
bool DumpAsm,
JITCodeEmitter &JCE) {
return addCodeEmitter(PM, OptLevel, DumpAsm, JCE);
}

6
llvm/lib/Target/Alpha/AlphaTargetMachine.h
View File

@ -65,10 +65,16 @@ public:
bool Verbose, raw_ostream &Out);
virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
bool DumpAsm, JITCodeEmitter &JCE);
virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
bool DumpAsm,
MachineCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
bool DumpAsm,
JITCodeEmitter &JCE);
};
} // end namespace llvm

2
llvm/lib/Target/PowerPC/PPC.h
View File

@ -33,6 +33,8 @@ FunctionPass *createPPCAsmPrinterPass(raw_ostream &OS,
CodeGenOpt::Level OptLevel, bool Verbose);
FunctionPass *createPPCCodeEmitterPass(PPCTargetMachine &TM,
MachineCodeEmitter &MCE);
FunctionPass *createPPCJITCodeEmitterPass(PPCTargetMachine &TM,
JITCodeEmitter &MCE);
} // end namespace llvm;
// Defines symbolic names for PowerPC registers. This defines a mapping from

62
llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp
View File

@ -18,6 +18,7 @@
#include "llvm/Module.h"
#include "llvm/PassManager.h"
#include "llvm/CodeGen/MachineCodeEmitter.h"
#include "llvm/CodeGen/JITCodeEmitter.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
@ -28,18 +29,36 @@
using namespace llvm;
namespace {
class VISIBILITY_HIDDEN PPCCodeEmitter : public MachineFunctionPass {
class PPCCodeEmitter {
TargetMachine &TM;
MachineCodeEmitter &MCE;
public:
PPCCodeEmitter( TargetMachine &tm, MachineCodeEmitter &mce) :
TM( tm), MCE( mce) {}
/// getBinaryCodeForInstr - This function, generated by the
/// CodeEmitterGenerator using TableGen, produces the binary encoding for
/// machine instructions.
unsigned getBinaryCodeForInstr(const MachineInstr &MI);
/// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
unsigned getMachineOpValue(const MachineInstr &MI, const MachineOperand &MO);
/// MovePCtoLROffset - When/if we see a MovePCtoLR instruction, we record
/// its address in the function into this pointer.
void *MovePCtoLROffset;
/// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
///
unsigned getMachineOpValue(const MachineInstr &MI, const MachineOperand &MO);
};
template <class machineCodeEmitter>
class VISIBILITY_HIDDEN Emitter : public MachineFunctionPass,
public PPCCodeEmitter
{
TargetMachine &TM;
machineCodeEmitter &MCE;
void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<MachineModuleInfo>();
MachineFunctionPass::getAnalysisUsage(AU);
@ -47,8 +66,8 @@ namespace {
public:
static char ID;
PPCCodeEmitter(TargetMachine &T, MachineCodeEmitter &M)
: MachineFunctionPass(&ID), TM(T), MCE(M) {}
Emitter(TargetMachine &tm, machineCodeEmitter &mce)
: MachineFunctionPass(&ID), PPCCodeEmitter( tm, mce), TM(tm), MCE(mce) {}
const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
@ -63,24 +82,26 @@ namespace {
/// getValueBit - return the particular bit of Val
///
unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; }
/// getBinaryCodeForInstr - This function, generated by the
/// CodeEmitterGenerator using TableGen, produces the binary encoding for
/// machine instructions.
///
unsigned getBinaryCodeForInstr(const MachineInstr &MI);
};
char PPCCodeEmitter::ID = 0;
}
template <class machineCodeEmitter>
char Emitter<machineCodeEmitter>::ID = 0;
}
/// createPPCCodeEmitterPass - Return a pass that emits the collected PPC code
/// to the specified MCE object.
FunctionPass *llvm::createPPCCodeEmitterPass(PPCTargetMachine &TM,
MachineCodeEmitter &MCE) {
return new PPCCodeEmitter(TM, MCE);
MachineCodeEmitter &MCE) {
return new Emitter<MachineCodeEmitter>(TM, MCE);
}
bool PPCCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
FunctionPass *llvm::createPPCJITCodeEmitterPass(PPCTargetMachine &TM,
JITCodeEmitter &JCE) {
return new Emitter<JITCodeEmitter>(TM, JCE);
}
template <class machineCodeEmitter>
bool Emitter<machineCodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
MF.getTarget().getRelocationModel() != Reloc::Static) &&
"JIT relocation model must be set to static or default!");
@ -96,7 +117,8 @@ bool PPCCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
return false;
}
void PPCCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
template <class machineCodeEmitter>
void Emitter<machineCodeEmitter>::emitBasicBlock(MachineBasicBlock &MBB) {
MCE.StartMachineBasicBlock(&MBB);
for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){

63
llvm/lib/Target/PowerPC/PPCJITInfo.cpp
View File

@ -16,7 +16,6 @@
#include "PPCRelocations.h"
#include "PPCTargetMachine.h"
#include "llvm/Function.h"
#include "llvm/CodeGen/MachineCodeEmitter.h"
#include "llvm/System/Memory.h"
#include "llvm/Support/Debug.h"
using namespace llvm;
@ -330,51 +329,51 @@ extern "C" void sys_icache_invalidate(const void *Addr, size_t len);
#endif
void *PPCJITInfo::emitFunctionStub(const Function* F, void *Fn,
MachineCodeEmitter &MCE) {
JITCodeEmitter &JCE) {
// If this is just a call to an external function, emit a branch instead of a
// call. The code is the same except for one bit of the last instruction.
if (Fn != (void*)(intptr_t)PPC32CompilationCallback &&
Fn != (void*)(intptr_t)PPC64CompilationCallback) {
MCE.startGVStub(F, 7*4);
intptr_t Addr = (intptr_t)MCE.getCurrentPCValue();
MCE.emitWordBE(0);
MCE.emitWordBE(0);
MCE.emitWordBE(0);
MCE.emitWordBE(0);
MCE.emitWordBE(0);
MCE.emitWordBE(0);
MCE.emitWordBE(0);
JCE.startGVStub(F, 7*4);
intptr_t Addr = (intptr_t)JCE.getCurrentPCValue();
JCE.emitWordBE(0);
JCE.emitWordBE(0);
JCE.emitWordBE(0);
JCE.emitWordBE(0);
JCE.emitWordBE(0);
JCE.emitWordBE(0);
JCE.emitWordBE(0);
EmitBranchToAt(Addr, (intptr_t)Fn, false, is64Bit);
sys::Memory::InvalidateInstructionCache((void*)Addr, 7*4);
return MCE.finishGVStub(F);
return JCE.finishGVStub(F);
}
MCE.startGVStub(F, 10*4);
intptr_t Addr = (intptr_t)MCE.getCurrentPCValue();
JCE.startGVStub(F, 10*4);
intptr_t Addr = (intptr_t)JCE.getCurrentPCValue();
if (is64Bit) {
MCE.emitWordBE(0xf821ffb1); // stdu r1,-80(r1)
MCE.emitWordBE(0x7d6802a6); // mflr r11
MCE.emitWordBE(0xf9610060); // std r11, 96(r1)
JCE.emitWordBE(0xf821ffb1); // stdu r1,-80(r1)
JCE.emitWordBE(0x7d6802a6); // mflr r11
JCE.emitWordBE(0xf9610060); // std r11, 96(r1)
} else if (TM.getSubtargetImpl()->isMachoABI()){
MCE.emitWordBE(0x9421ffe0); // stwu r1,-32(r1)
MCE.emitWordBE(0x7d6802a6); // mflr r11
MCE.emitWordBE(0x91610028); // stw r11, 40(r1)
JCE.emitWordBE(0x9421ffe0); // stwu r1,-32(r1)
JCE.emitWordBE(0x7d6802a6); // mflr r11
JCE.emitWordBE(0x91610028); // stw r11, 40(r1)
} else {
MCE.emitWordBE(0x9421ffe0); // stwu r1,-32(r1)
MCE.emitWordBE(0x7d6802a6); // mflr r11
MCE.emitWordBE(0x91610024); // stw r11, 36(r1)
JCE.emitWordBE(0x9421ffe0); // stwu r1,-32(r1)
JCE.emitWordBE(0x7d6802a6); // mflr r11
JCE.emitWordBE(0x91610024); // stw r11, 36(r1)
}
intptr_t BranchAddr = (intptr_t)MCE.getCurrentPCValue();
MCE.emitWordBE(0);
MCE.emitWordBE(0);
MCE.emitWordBE(0);
MCE.emitWordBE(0);
MCE.emitWordBE(0);
MCE.emitWordBE(0);
MCE.emitWordBE(0);
intptr_t BranchAddr = (intptr_t)JCE.getCurrentPCValue();
JCE.emitWordBE(0);
JCE.emitWordBE(0);
JCE.emitWordBE(0);
JCE.emitWordBE(0);
JCE.emitWordBE(0);
JCE.emitWordBE(0);
JCE.emitWordBE(0);
EmitBranchToAt(BranchAddr, (intptr_t)Fn, true, is64Bit);
sys::Memory::InvalidateInstructionCache((void*)Addr, 10*4);
return MCE.finishGVStub(F);
return JCE.finishGVStub(F);
}

3
llvm/lib/Target/PowerPC/PPCJITInfo.h
View File

@ -15,6 +15,7 @@
#define POWERPC_JITINFO_H
#include "llvm/Target/TargetJITInfo.h"
#include "llvm/CodeGen/JITCodeEmitter.h"
namespace llvm {
class PPCTargetMachine;
@ -30,7 +31,7 @@ namespace llvm {
}
virtual void *emitFunctionStub(const Function* F, void *Fn,
MachineCodeEmitter &MCE);
JITCodeEmitter &JCE);
virtual LazyResolverFn getLazyResolverFunction(JITCompilerFn);
virtual void relocate(void *Function, MachineRelocation *MR,
unsigned NumRelocs, unsigned char* GOTBase);

47
llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
View File

@ -186,6 +186,38 @@ bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
return false;
}
bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
bool DumpAsm, JITCodeEmitter &JCE) {
// The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
// FIXME: This should be moved to TargetJITInfo!!
if (Subtarget.isPPC64()) {
// We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
// instructions to materialize arbitrary global variable + function +
// constant pool addresses.
setRelocationModel(Reloc::PIC_);
// Temporary workaround for the inability of PPC64 JIT to handle jump
// tables.
DisableJumpTables = true;
} else {
setRelocationModel(Reloc::Static);
}
// Inform the subtarget that we are in JIT mode. FIXME: does this break macho
// writing?
Subtarget.SetJITMode();
// Machine code emitter pass for PowerPC.
PM.add(createPPCJITCodeEmitterPass(*this, JCE));
if (DumpAsm) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
}
return false;
}
bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
bool DumpAsm, MachineCodeEmitter &MCE) {
@ -199,3 +231,18 @@ bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
return false;
}
bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
bool DumpAsm, JITCodeEmitter &JCE) {
// Machine code emitter pass for PowerPC.
PM.add(createPPCJITCodeEmitterPass(*this, JCE));
if (DumpAsm) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
}
return false;
}

5
llvm/lib/Target/PowerPC/PPCTargetMachine.h
View File

@ -84,9 +84,14 @@ public:
bool Verbose, raw_ostream &Out);
virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
bool DumpAsm, JITCodeEmitter &JCE);
virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
bool DumpAsm, JITCodeEmitter &JCE);
virtual bool getEnableTailMergeDefault() const;
};

8
llvm/lib/Target/X86/X86.h
View File

@ -22,6 +22,7 @@ namespace llvm {
class X86TargetMachine;
class FunctionPass;
class MachineCodeEmitter;
class JITCodeEmitter;
class raw_ostream;
/// createX86ISelDag - This pass converts a legalized DAG into a
@ -51,8 +52,11 @@ FunctionPass *createX86CodePrinterPass(raw_ostream &o,
/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
/// to the specified MCE object.
FunctionPass *createX86CodeEmitterPass(X86TargetMachine &TM,
MachineCodeEmitter &MCE);
FunctionPass *createX86CodeEmitterPass(
X86TargetMachine &TM, MachineCodeEmitter &MCE);
FunctionPass *createX86JITCodeEmitterPass(
X86TargetMachine &TM, JITCodeEmitter &JCE);
/// createX86EmitCodeToMemory - Returns a pass that converts a register
/// allocated function into raw machine code in a dynamically

78
llvm/lib/Target/X86/X86CodeEmitter.cpp
View File

@ -21,6 +21,7 @@
#include "X86.h"
#include "llvm/PassManager.h"
#include "llvm/CodeGen/MachineCodeEmitter.h"
#include "llvm/CodeGen/JITCodeEmitter.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
@ -35,21 +36,22 @@ using namespace llvm;
STATISTIC(NumEmitted, "Number of machine instructions emitted");
namespace {
template< class machineCodeEmitter>
class VISIBILITY_HIDDEN Emitter : public MachineFunctionPass {
const X86InstrInfo *II;
const TargetData *TD;
X86TargetMachine &TM;
MachineCodeEmitter &MCE;
machineCodeEmitter &MCE;
intptr_t PICBaseOffset;
bool Is64BitMode;
bool IsPIC;
public:
static char ID;
explicit Emitter(X86TargetMachine &tm, MachineCodeEmitter &mce)
explicit Emitter(X86TargetMachine &tm, machineCodeEmitter &mce)
: MachineFunctionPass(&ID), II(0), TD(0), TM(tm),
MCE(mce), PICBaseOffset(0), Is64BitMode(false),
IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
Emitter(X86TargetMachine &tm, MachineCodeEmitter &mce,
Emitter(X86TargetMachine &tm, machineCodeEmitter &mce,
const X86InstrInfo &ii, const TargetData &td, bool is64)
: MachineFunctionPass(&ID), II(&ii), TD(&td), TM(tm),
MCE(mce), PICBaseOffset(0), Is64BitMode(is64),
@ -96,17 +98,31 @@ namespace {
bool gvNeedsNonLazyPtr(const GlobalValue *GV);
};
char Emitter::ID = 0;
template< class machineCodeEmitter>
char Emitter<machineCodeEmitter>::ID = 0;
}
/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
/// to the specified MCE object.
FunctionPass *llvm::createX86CodeEmitterPass(X86TargetMachine &TM,
MachineCodeEmitter &MCE) {
return new Emitter(TM, MCE);
/// to the specified templated MachineCodeEmitter object.
namespace llvm {
FunctionPass *createX86CodeEmitterPass(
X86TargetMachine &TM, MachineCodeEmitter &MCE)
{
return new Emitter<MachineCodeEmitter>(TM, MCE);
}
FunctionPass *createX86JITCodeEmitterPass(
X86TargetMachine &TM, JITCodeEmitter &JCE)
{
return new Emitter<JITCodeEmitter>(TM, JCE);
}
bool Emitter::runOnMachineFunction(MachineFunction &MF) {
} // end namespace llvm
template< class machineCodeEmitter>
bool Emitter<machineCodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
MCE.setModuleInfo(&getAnalysis<MachineModuleInfo>());
@ -140,7 +156,8 @@ bool Emitter::runOnMachineFunction(MachineFunction &MF) {
/// necessary to resolve the address of this block later and emits a dummy
/// value.
///
void Emitter::emitPCRelativeBlockAddress(MachineBasicBlock *MBB) {
template< class machineCodeEmitter>
void Emitter<machineCodeEmitter>::emitPCRelativeBlockAddress(MachineBasicBlock *MBB) {
// Remember where this reference was and where it is to so we can
// deal with it later.
MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
@ -151,7 +168,8 @@ void Emitter::emitPCRelativeBlockAddress(MachineBasicBlock *MBB) {
/// emitGlobalAddress - Emit the specified address to the code stream assuming
/// this is part of a "take the address of a global" instruction.
///
void Emitter::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
template< class machineCodeEmitter>
void Emitter<machineCodeEmitter>::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
intptr_t Disp /* = 0 */,
intptr_t PCAdj /* = 0 */,
bool NeedStub /* = false */,
@ -177,7 +195,8 @@ void Emitter::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
/// emitExternalSymbolAddress - Arrange for the address of an external symbol to
/// be emitted to the current location in the function, and allow it to be PC
/// relative.
void Emitter::emitExternalSymbolAddress(const char *ES, unsigned Reloc) {
template< class machineCodeEmitter>
void Emitter<machineCodeEmitter>::emitExternalSymbolAddress(const char *ES, unsigned Reloc) {
intptr_t RelocCST = (Reloc == X86::reloc_picrel_word) ? PICBaseOffset : 0;
MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
Reloc, ES, RelocCST));
@ -190,7 +209,8 @@ void Emitter::emitExternalSymbolAddress(const char *ES, unsigned Reloc) {
/// emitConstPoolAddress - Arrange for the address of an constant pool
/// to be emitted to the current location in the function, and allow it to be PC
/// relative.
void Emitter::emitConstPoolAddress(unsigned CPI, unsigned Reloc,
template< class machineCodeEmitter>
void Emitter<machineCodeEmitter>::emitConstPoolAddress(unsigned CPI, unsigned Reloc,
intptr_t Disp /* = 0 */,
intptr_t PCAdj /* = 0 */) {
intptr_t RelocCST = 0;
@ -210,7 +230,8 @@ void Emitter::emitConstPoolAddress(unsigned CPI, unsigned Reloc,
/// emitJumpTableAddress - Arrange for the address of a jump table to
/// be emitted to the current location in the function, and allow it to be PC
/// relative.
void Emitter::emitJumpTableAddress(unsigned JTI, unsigned Reloc,
template< class machineCodeEmitter>
void Emitter<machineCodeEmitter>::emitJumpTableAddress(unsigned JTI, unsigned Reloc,
intptr_t PCAdj /* = 0 */) {
intptr_t RelocCST = 0;
if (Reloc == X86::reloc_picrel_word)
@ -226,7 +247,8 @@ void Emitter::emitJumpTableAddress(unsigned JTI, unsigned Reloc,
MCE.emitWordLE(0);
}
unsigned Emitter::getX86RegNum(unsigned RegNo) const {
template< class machineCodeEmitter>
unsigned Emitter<machineCodeEmitter>::getX86RegNum(unsigned RegNo) const {
return II->getRegisterInfo().getX86RegNum(RegNo);
}
@ -236,20 +258,24 @@ inline static unsigned char ModRMByte(unsigned Mod, unsigned RegOpcode,
return RM | (RegOpcode << 3) | (Mod << 6);
}
void Emitter::emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeFld){
template< class machineCodeEmitter>
void Emitter<machineCodeEmitter>::emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeFld){
MCE.emitByte(ModRMByte(3, RegOpcodeFld, getX86RegNum(ModRMReg)));
}
void Emitter::emitRegModRMByte(unsigned RegOpcodeFld) {
template< class machineCodeEmitter>
void Emitter<machineCodeEmitter>::emitRegModRMByte(unsigned RegOpcodeFld) {
MCE.emitByte(ModRMByte(3, RegOpcodeFld, 0));
}
void Emitter::emitSIBByte(unsigned SS, unsigned Index, unsigned Base) {
template< class machineCodeEmitter>
void Emitter<machineCodeEmitter>::emitSIBByte(unsigned SS, unsigned Index, unsigned Base) {
// SIB byte is in the same format as the ModRMByte...
MCE.emitByte(ModRMByte(SS, Index, Base));
}
void Emitter::emitConstant(uint64_t Val, unsigned Size) {
template< class machineCodeEmitter>
void Emitter<machineCodeEmitter>::emitConstant(uint64_t Val, unsigned Size) {
// Output the constant in little endian byte order...
for (unsigned i = 0; i != Size; ++i) {
MCE.emitByte(Val & 255);
@ -263,14 +289,16 @@ static bool isDisp8(int Value) {
return Value == (signed char)Value;
}
bool Emitter::gvNeedsNonLazyPtr(const GlobalValue *GV) {
template< class machineCodeEmitter>
bool Emitter<machineCodeEmitter>::gvNeedsNonLazyPtr(const GlobalValue *GV) {
// For Darwin, simulate the linktime GOT by using the same non-lazy-pointer
// mechanism as 32-bit mode.
return (!Is64BitMode || TM.getSubtarget<X86Subtarget>().isTargetDarwin()) &&
TM.getSubtarget<X86Subtarget>().GVRequiresExtraLoad(GV, TM, false);
}
void Emitter::emitDisplacementField(const MachineOperand *RelocOp,
template< class machineCodeEmitter>
void Emitter<machineCodeEmitter>::emitDisplacementField(const MachineOperand *RelocOp,
int DispVal, intptr_t PCAdj) {
// If this is a simple integer displacement that doesn't require a relocation,
// emit it now.
@ -304,7 +332,8 @@ void Emitter::emitDisplacementField(const MachineOperand *RelocOp,
}
}
void Emitter::emitMemModRMByte(const MachineInstr &MI,
template< class machineCodeEmitter>
void Emitter<machineCodeEmitter>::emitMemModRMByte(const MachineInstr &MI,
unsigned Op, unsigned RegOpcodeField,
intptr_t PCAdj) {
const MachineOperand &Op3 = MI.getOperand(Op+3);
@ -421,7 +450,9 @@ void Emitter::emitMemModRMByte(const MachineInstr &MI,
}
}
void Emitter::emitInstruction(const MachineInstr &MI,
template< class machineCodeEmitter>
void Emitter<machineCodeEmitter>::emitInstruction(
const MachineInstr &MI,
const TargetInstrDesc *Desc) {
DOUT << MI;
@ -773,3 +804,4 @@ void Emitter::emitInstruction(const MachineInstr &MI,
abort();
}
}

81
llvm/lib/Target/X86/X86JITInfo.cpp
View File

@ -16,7 +16,6 @@
#include "X86Relocations.h"
#include "X86Subtarget.h"
#include "llvm/Function.h"
#include "llvm/CodeGen/MachineCodeEmitter.h"
#include "llvm/Config/alloca.h"
#include "llvm/Support/Compiler.h"
#include <cstdlib>
@ -430,20 +429,20 @@ X86JITInfo::getLazyResolverFunction(JITCompilerFn F) {
}
void *X86JITInfo::emitGlobalValueIndirectSym(const GlobalValue* GV, void *ptr,
MachineCodeEmitter &MCE) {
JITCodeEmitter &JCE) {
#if defined (X86_64_JIT)
MCE.startGVStub(GV, 8, 8);
MCE.emitWordLE((unsigned)(intptr_t)ptr);
MCE.emitWordLE((unsigned)(((intptr_t)ptr) >> 32));
JCE.startGVStub(GV, 8, 8);
JCE.emitWordLE((unsigned)(intptr_t)ptr);
JCE.emitWordLE((unsigned)(((intptr_t)ptr) >> 32));
#else
MCE.startGVStub(GV, 4, 4);
MCE.emitWordLE((intptr_t)ptr);
JCE.startGVStub(GV, 4, 4);
JCE.emitWordLE((intptr_t)ptr);
#endif
return MCE.finishGVStub(GV);
return JCE.finishGVStub(GV);
}
void *X86JITInfo::emitFunctionStub(const Function* F, void *Fn,
MachineCodeEmitter &MCE) {
JITCodeEmitter &JCE) {
// Note, we cast to intptr_t here to silence a -pedantic warning that
// complains about casting a function pointer to a normal pointer.
#if defined (X86_32_JIT) && !defined (_MSC_VER)
@ -454,55 +453,55 @@ void *X86JITInfo::emitFunctionStub(const Function* F, void *Fn,
#endif
if (NotCC) {
#if defined (X86_64_JIT)
MCE.startGVStub(F, 13, 4);
MCE.emitByte(0x49); // REX prefix
MCE.emitByte(0xB8+2); // movabsq r10
MCE.emitWordLE((unsigned)(intptr_t)Fn);
MCE.emitWordLE((unsigned)(((intptr_t)Fn) >> 32));
MCE.emitByte(0x41); // REX prefix
MCE.emitByte(0xFF); // jmpq *r10
MCE.emitByte(2 | (4 << 3) | (3 << 6));
JCE.startGVStub(F, 13, 4);
JCE.emitByte(0x49); // REX prefix
JCE.emitByte(0xB8+2); // movabsq r10
JCE.emitWordLE((unsigned)(intptr_t)Fn);
JCE.emitWordLE((unsigned)(((intptr_t)Fn) >> 32));
JCE.emitByte(0x41); // REX prefix
JCE.emitByte(0xFF); // jmpq *r10
JCE.emitByte(2 | (4 << 3) | (3 << 6));
#else
MCE.startGVStub(F, 5, 4);
MCE.emitByte(0xE9);
MCE.emitWordLE((intptr_t)Fn-MCE.getCurrentPCValue()-4);
JCE.startGVStub(F, 5, 4);
JCE.emitByte(0xE9);
JCE.emitWordLE((intptr_t)Fn-JCE.getCurrentPCValue()-4);
#endif
return MCE.finishGVStub(F);
return JCE.finishGVStub(F);
}
#if defined (X86_64_JIT)
MCE.startGVStub(F, 14, 4);
MCE.emitByte(0x49); // REX prefix
MCE.emitByte(0xB8+2); // movabsq r10
MCE.emitWordLE((unsigned)(intptr_t)Fn);
MCE.emitWordLE((unsigned)(((intptr_t)Fn) >> 32));
MCE.emitByte(0x41); // REX prefix
MCE.emitByte(0xFF); // callq *r10
MCE.emitByte(2 | (2 << 3) | (3 << 6));
JCE.startGVStub(F, 14, 4);
JCE.emitByte(0x49); // REX prefix
JCE.emitByte(0xB8+2); // movabsq r10
JCE.emitWordLE((unsigned)(intptr_t)Fn);
JCE.emitWordLE((unsigned)(((intptr_t)Fn) >> 32));
JCE.emitByte(0x41); // REX prefix
JCE.emitByte(0xFF); // callq *r10
JCE.emitByte(2 | (2 << 3) | (3 << 6));
#else
MCE.startGVStub(F, 6, 4);
MCE.emitByte(0xE8); // Call with 32 bit pc-rel destination...
JCE.startGVStub(F, 6, 4);
JCE.emitByte(0xE8); // Call with 32 bit pc-rel destination...
MCE.emitWordLE((intptr_t)Fn-MCE.getCurrentPCValue()-4);
JCE.emitWordLE((intptr_t)Fn-JCE.getCurrentPCValue()-4);
#endif
MCE.emitByte(0xCD); // Interrupt - Just a marker identifying the stub!
return MCE.finishGVStub(F);
JCE.emitByte(0xCD); // Interrupt - Just a marker identifying the stub!
return JCE.finishGVStub(F);
}
void X86JITInfo::emitFunctionStubAtAddr(const Function* F, void *Fn, void *Stub,
MachineCodeEmitter &MCE) {
JITCodeEmitter &JCE) {
// Note, we cast to intptr_t here to silence a -pedantic warning that
// complains about casting a function pointer to a normal pointer.
MCE.startGVStub(F, Stub, 5);
MCE.emitByte(0xE9);
JCE.startGVStub(F, Stub, 5);
JCE.emitByte(0xE9);
#if defined (X86_64_JIT)
assert(((((intptr_t)Fn-MCE.getCurrentPCValue()-5) << 32) >> 32) ==
((intptr_t)Fn-MCE.getCurrentPCValue()-5)
assert(((((intptr_t)Fn-JCE.getCurrentPCValue()-5) << 32) >> 32) ==
((intptr_t)Fn-JCE.getCurrentPCValue()-5)
&& "PIC displacement does not fit in displacement field!");
#endif
MCE.emitWordLE((intptr_t)Fn-MCE.getCurrentPCValue()-4);
MCE.finishGVStub(F);
JCE.emitWordLE((intptr_t)Fn-JCE.getCurrentPCValue()-4);
JCE.finishGVStub(F);
}
/// getPICJumpTableEntry - Returns the value of the jumptable entry for the

13
llvm/lib/Target/X86/X86JITInfo.h
View File

@ -15,6 +15,7 @@
#define X86JITINFO_H
#include "llvm/Function.h"
#include "llvm/CodeGen/JITCodeEmitter.h"
#include "llvm/Target/TargetJITInfo.h"
namespace llvm {
@ -37,23 +38,23 @@ namespace llvm {
///
virtual void replaceMachineCodeForFunction(void *Old, void *New);
/// emitGlobalValueIndirectSym - Use the specified MachineCodeEmitter object
/// emitGlobalValueIndirectSym - Use the specified JITCodeEmitter object
/// to emit an indirect symbol which contains the address of the specified
/// ptr.
virtual void *emitGlobalValueIndirectSym(const GlobalValue* GV, void *ptr,
MachineCodeEmitter &MCE);
JITCodeEmitter &JCE);
/// emitFunctionStub - Use the specified MachineCodeEmitter object to emit a
/// emitFunctionStub - Use the specified JITCodeEmitter object to emit a
/// small native function that simply calls the function at the specified
/// address.
virtual void *emitFunctionStub(const Function* F, void *Fn,
MachineCodeEmitter &MCE);
JITCodeEmitter &JCE);
/// emitFunctionStubAtAddr - Use the specified MachineCodeEmitter object to
/// emitFunctionStubAtAddr - Use the specified JITCodeEmitter object to
/// emit a small native function that simply calls Fn. Emit the stub into
/// the supplied buffer.
virtual void emitFunctionStubAtAddr(const Function* F, void *Fn,
void *Buffer, MachineCodeEmitter &MCE);
void *Buffer, JITCodeEmitter &JCE);
/// getPICJumpTableEntry - Returns the value of the jumptable entry for the
/// specific basic block.

43
llvm/lib/Target/X86/X86TargetMachine.cpp
View File

@ -248,6 +248,35 @@ bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
return false;
}
bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
bool DumpAsm, JITCodeEmitter &JCE) {
// FIXME: Move this to TargetJITInfo!
// On Darwin, do not override 64-bit setting made in X86TargetMachine().
if (DefRelocModel == Reloc::Default &&
(!Subtarget.isTargetDarwin() || !Subtarget.is64Bit()))
setRelocationModel(Reloc::Static);
// 64-bit JIT places everything in the same buffer except external functions.
// On Darwin, use small code model but hack the call instruction for
// externals. Elsewhere, do not assume globals are in the lower 4G.
if (Subtarget.is64Bit()) {
if (Subtarget.isTargetDarwin())
setCodeModel(CodeModel::Small);
else
setCodeModel(CodeModel::Large);
}
PM.add(createX86JITCodeEmitterPass(*this, JCE));
if (DumpAsm) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
}
return false;
}
bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
bool DumpAsm,
@ -262,6 +291,20 @@ bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
return false;
}
bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
bool DumpAsm,
JITCodeEmitter &JCE) {
PM.add(createX86JITCodeEmitterPass(*this, JCE));
if (DumpAsm) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
}
return false;
}
/// symbolicAddressesAreRIPRel - Return true if symbolic addresses are
/// RIP-relative on this machine, taking into consideration the relocation
/// model and subtarget. RIP-relative addresses cannot have a separate

5
llvm/lib/Target/X86/X86TargetMachine.h
View File

@ -83,9 +83,14 @@ public:
bool Verbose, raw_ostream &Out);
virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
bool DumpAsm, JITCodeEmitter &JCE);
virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel,
bool DumpAsm, JITCodeEmitter &JCE);
/// symbolicAddressesAreRIPRel - Return true if symbolic addresses are
/// RIP-relative on this machine, taking into consideration the relocation