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Add type constraints to masked_load/masked_store to ensure the mask vector has the same number of elements as the other vectors. 

llvm-svn: 254137
This commit is contained in:
Craig Topper 2015-11-26 06:30:42 +00:00
parent 25ce6b82c6
commit a193510da2
1 changed files with 3 additions and 2 deletions
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5
llvm/include/llvm/Target/TargetSelectionDAG.td
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@ -205,11 +205,12 @@ def SDTIStore : SDTypeProfile<1, 3, [ // indexed store
]>;
def SDTMaskedStore: SDTypeProfile<0, 3, [ // masked store
SDTCisPtrTy<0>, SDTCisVec<1>, SDTCisVec<2>
SDTCisPtrTy<0>, SDTCisVec<1>, SDTCisVec<2>, SDTCisSameNumEltsAs<1, 2>
]>;
def SDTMaskedLoad: SDTypeProfile<1, 3, [ // masked load
SDTCisVec<0>, SDTCisPtrTy<1>, SDTCisVec<2>, SDTCisSameAs<0, 3>
SDTCisVec<0>, SDTCisPtrTy<1>, SDTCisVec<2>, SDTCisSameAs<0, 3>,
SDTCisSameNumEltsAs<0, 2>
]>;
def SDTMaskedGather: SDTypeProfile<2, 3, [ // masked gather