maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[Hexagon] Use MachineOperand::readsReg instead of isUse 

llvm-svn: 274381
This commit is contained in:
Krzysztof Parzyszek 2016-07-01 20:28:30 +00:00
parent 7f8827576c
commit a17250d8e0
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
View File

@ -349,7 +349,7 @@ void HexagonExpandCondsets::updateKillFlags(unsigned Reg) {
// Set the <kill> flag on a use of Reg whose lane mask is contained in LM.
MachineInstr *MI = LIS->getInstructionFromIndex(K);
for (auto &Op : MI->operands()) {
if (!Op.isReg() || !Op.isUse() || Op.getReg() != Reg)
if (!Op.isReg() || !Op.readsReg() || Op.getReg() != Reg)
continue;
LaneBitmask SLM = getLaneMask(Reg, Op.getSubReg());
if ((SLM & LM) == SLM) {