forked from OSchip/llvm-project
[InstCombine] Support (X ^ C1) & C2 --> (X & C2) ^ (C1&C2) for vector splats.
llvm-svn: 310233
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@ -126,14 +126,6 @@ Instruction *InstCombiner::OptAndOp(BinaryOperator *Op,
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switch (Op->getOpcode()) {
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default: break;
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case Instruction::Xor:
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if (Op->hasOneUse()) {
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// (X ^ C1) & C2 --> (X & C2) ^ (C1&C2)
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Value *And = Builder.CreateAnd(X, AndRHS);
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And->takeName(Op);
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return BinaryOperator::CreateXor(And, Together);
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}
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break;
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case Instruction::Or:
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if (Op->hasOneUse()){
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ConstantInt *TogetherCI = dyn_cast<ConstantInt>(Together);
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@ -1280,6 +1272,15 @@ Instruction *InstCombiner::visitAnd(BinaryOperator &I) {
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return new ZExtInst(IsZero, I.getType());
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}
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const APInt *XorC;
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if (match(Op0, m_OneUse(m_Xor(m_Value(X), m_APInt(XorC))))) {
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// (X ^ C1) & C2 --> (X & C2) ^ (C1&C2)
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Constant *NewC = ConstantInt::get(I.getType(), *C & *XorC);
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Value *And = Builder.CreateAnd(X, Op1);
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And->takeName(Op0);
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return BinaryOperator::CreateXor(And, NewC);
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}
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// If the mask is only needed on one incoming arm, push the 'and' op up.
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if (match(Op0, m_OneUse(m_Xor(m_Value(X), m_Value(Y)))) ||
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match(Op0, m_OneUse(m_Or(m_Value(X), m_Value(Y))))) {
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@ -1298,6 +1299,7 @@ Instruction *InstCombiner::visitAnd(BinaryOperator &I) {
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return BinaryOperator::Create(BinOp, NewLHS, Y);
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}
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}
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}
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if (ConstantInt *AndRHS = dyn_cast<ConstantInt>(Op1)) {
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@ -39,8 +39,8 @@ define i32 @flip_and_mask(i32 %x) {
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define <2 x i8> @flip_and_mask_splat(<2 x i8> %x) {
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; CHECK-LABEL: @flip_and_mask_splat(
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; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i8> %x, <i8 1, i8 1>
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; CHECK-NEXT: [[INC:%.*]] = and <2 x i8> [[TMP1]], <i8 1, i8 1>
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; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> %x, <i8 1, i8 1>
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; CHECK-NEXT: [[INC:%.*]] = xor <2 x i8> [[TMP1]], <i8 1, i8 1>
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; CHECK-NEXT: ret <2 x i8> [[INC]]
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;
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%shl = shl <2 x i8> %x, <i8 7, i8 7>
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