forked from OSchip/llvm-project
AMDGPU/GlobalISel: Fix fixed ABI special VGPR function arguments
I forgot to copy the new fixed function ABI into GlobalISel, so this was mismatched with the DAG compiled calling function. This was allocating part of the argument list to v31, which was supposed to be reserved for the workitem IDs.
This commit is contained in:
Matt Arsenault
parent
5804a8b122
commit
a162048a47
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@ -16,6 +16,7 @@
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#include "AMDGPU.h"
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#include "AMDGPUISelLowering.h"
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#include "AMDGPUSubtarget.h"
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#include "AMDGPUTargetMachine.h"
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#include "SIISelLowering.h"
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#include "SIMachineFunctionInfo.h"
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#include "SIRegisterInfo.h"
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@ -797,11 +798,17 @@ bool AMDGPUCallLowering::lowerFormalArguments(
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if (!MBB.empty())
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B.setInstr(*MBB.begin());
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if (!IsEntryFunc) {
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// For the fixed ABI, pass workitem IDs in the last argument register.
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if (AMDGPUTargetMachine::EnableFixedFunctionABI)
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TLI.allocateSpecialInputVGPRsFixed(CCInfo, MF, *TRI, *Info);
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}
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FormalArgHandler Handler(B, MRI, AssignFn);
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if (!handleAssignments(CCInfo, ArgLocs, B, SplitArgs, Handler))
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return false;
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if (!IsEntryFunc) {
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if (!IsEntryFunc && !AMDGPUTargetMachine::EnableFixedFunctionABI) {
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// Special inputs come after user arguments.
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TLI.allocateSpecialInputVGPRs(CCInfo, MF, *TRI, *Info);
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}
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@ -0,0 +1,92 @@
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; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -amdgpu-fixed-function-abi=1 -stop-after=irtranslator -o - %s | FileCheck -check-prefixes=COMMON,FIXED %s
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; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -amdgpu-fixed-function-abi=0 -stop-after=irtranslator -o - %s | FileCheck -check-prefixes=COMMON,VARABI %s
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; Make sure arg1 is not allocated in v31, which is reserved for
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; workitem IDs with -amdgpu-fixed-function-abi.
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define void @void_a31i32_i32([31 x i32] %arg0, i32 %arg1) {
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; FIXED-LABEL: name: void_a31i32_i32
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; FIXED: bb.1 (%ir-block.0):
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; FIXED: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $sgpr30_sgpr31
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; FIXED: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; FIXED: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; FIXED: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
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; FIXED: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
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; FIXED: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
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; FIXED: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
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; FIXED: [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
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; FIXED: [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
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; FIXED: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
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; FIXED: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
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; FIXED: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
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; FIXED: [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
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; FIXED: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
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; FIXED: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
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; FIXED: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
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; FIXED: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr15
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; FIXED: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr16
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; FIXED: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr17
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; FIXED: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr18
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; FIXED: [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr19
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; FIXED: [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr20
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; FIXED: [[COPY21:%[0-9]+]]:_(s32) = COPY $vgpr21
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; FIXED: [[COPY22:%[0-9]+]]:_(s32) = COPY $vgpr22
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; FIXED: [[COPY23:%[0-9]+]]:_(s32) = COPY $vgpr23
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; FIXED: [[COPY24:%[0-9]+]]:_(s32) = COPY $vgpr24
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; FIXED: [[COPY25:%[0-9]+]]:_(s32) = COPY $vgpr25
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; FIXED: [[COPY26:%[0-9]+]]:_(s32) = COPY $vgpr26
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; FIXED: [[COPY27:%[0-9]+]]:_(s32) = COPY $vgpr27
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; FIXED: [[COPY28:%[0-9]+]]:_(s32) = COPY $vgpr28
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; FIXED: [[COPY29:%[0-9]+]]:_(s32) = COPY $vgpr29
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; FIXED: [[COPY30:%[0-9]+]]:_(s32) = COPY $vgpr30
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; FIXED: [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
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; FIXED: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load 4 from %fixed-stack.0, align 16, addrspace 5)
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; FIXED: [[COPY31:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
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; FIXED: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
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; FIXED: G_STORE [[LOAD]](s32), [[DEF]](p1) :: (store 4 into `i32 addrspace(1)* undef`, addrspace 1)
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; FIXED: [[COPY32:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY31]]
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; FIXED: S_SETPC_B64_return [[COPY32]]
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; VARABI-LABEL: name: void_a31i32_i32
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; VARABI: bb.1 (%ir-block.0):
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; VARABI: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $sgpr30_sgpr31
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; VARABI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; VARABI: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; VARABI: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
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; VARABI: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
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; VARABI: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
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; VARABI: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
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; VARABI: [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
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; VARABI: [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
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; VARABI: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
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; VARABI: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
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; VARABI: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
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; VARABI: [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
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; VARABI: [[COPY12:%[0-9]+]]:_(s32) = COPY $vgpr12
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; VARABI: [[COPY13:%[0-9]+]]:_(s32) = COPY $vgpr13
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; VARABI: [[COPY14:%[0-9]+]]:_(s32) = COPY $vgpr14
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; VARABI: [[COPY15:%[0-9]+]]:_(s32) = COPY $vgpr15
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; VARABI: [[COPY16:%[0-9]+]]:_(s32) = COPY $vgpr16
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; VARABI: [[COPY17:%[0-9]+]]:_(s32) = COPY $vgpr17
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; VARABI: [[COPY18:%[0-9]+]]:_(s32) = COPY $vgpr18
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; VARABI: [[COPY19:%[0-9]+]]:_(s32) = COPY $vgpr19
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; VARABI: [[COPY20:%[0-9]+]]:_(s32) = COPY $vgpr20
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; VARABI: [[COPY21:%[0-9]+]]:_(s32) = COPY $vgpr21
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; VARABI: [[COPY22:%[0-9]+]]:_(s32) = COPY $vgpr22
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; VARABI: [[COPY23:%[0-9]+]]:_(s32) = COPY $vgpr23
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; VARABI: [[COPY24:%[0-9]+]]:_(s32) = COPY $vgpr24
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; VARABI: [[COPY25:%[0-9]+]]:_(s32) = COPY $vgpr25
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; VARABI: [[COPY26:%[0-9]+]]:_(s32) = COPY $vgpr26
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; VARABI: [[COPY27:%[0-9]+]]:_(s32) = COPY $vgpr27
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; VARABI: [[COPY28:%[0-9]+]]:_(s32) = COPY $vgpr28
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; VARABI: [[COPY29:%[0-9]+]]:_(s32) = COPY $vgpr29
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; VARABI: [[COPY30:%[0-9]+]]:_(s32) = COPY $vgpr30
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; VARABI: [[COPY31:%[0-9]+]]:_(s32) = COPY $vgpr31
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; VARABI: [[COPY32:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
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; VARABI: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
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; VARABI: G_STORE [[COPY31]](s32), [[DEF]](p1) :: (store 4 into `i32 addrspace(1)* undef`, addrspace 1)
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; VARABI: [[COPY33:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY32]]
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; VARABI: S_SETPC_B64_return [[COPY33]]
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store i32 %arg1, i32 addrspace(1)* undef
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ret void
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}
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