forked from OSchip/llvm-project
Local register allocator shouldn't assume only the entry and landing pad basic blocks have live-ins.
llvm-svn: 63323
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@ -710,24 +710,21 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
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DEBUG(const BasicBlock *LBB = MBB.getBasicBlock();
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if (LBB) DOUT << "\nStarting RegAlloc of BB: " << LBB->getName());
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// If this is the first basic block in the machine function, add live-in
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// registers as active.
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if (&MBB == &*MF->begin() || MBB.isLandingPad()) {
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for (MachineBasicBlock::livein_iterator I = MBB.livein_begin(),
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// Add live-in registers as active.
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for (MachineBasicBlock::livein_iterator I = MBB.livein_begin(),
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E = MBB.livein_end(); I != E; ++I) {
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unsigned Reg = *I;
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MF->getRegInfo().setPhysRegUsed(Reg);
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PhysRegsUsed[Reg] = 0; // It is free and reserved now
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AddToPhysRegsUseOrder(Reg);
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for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
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*SubRegs; ++SubRegs) {
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if (PhysRegsUsed[*SubRegs] != -2) {
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AddToPhysRegsUseOrder(*SubRegs);
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PhysRegsUsed[*SubRegs] = 0; // It is free and reserved now
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MF->getRegInfo().setPhysRegUsed(*SubRegs);
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}
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unsigned Reg = *I;
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MF->getRegInfo().setPhysRegUsed(Reg);
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PhysRegsUsed[Reg] = 0; // It is free and reserved now
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AddToPhysRegsUseOrder(Reg);
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for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
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*SubRegs; ++SubRegs) {
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if (PhysRegsUsed[*SubRegs] != -2) {
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AddToPhysRegsUseOrder(*SubRegs);
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PhysRegsUsed[*SubRegs] = 0; // It is free and reserved now
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MF->getRegInfo().setPhysRegUsed(*SubRegs);
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}
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}
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}
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}
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ComputeLocalLiveness(MBB);
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@ -0,0 +1,38 @@
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; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9.6 -regalloc=local -disable-fp-elim
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; rdar://6538384
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%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
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%struct.Lit = type { i32 }
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%struct.StreamBuffer = type { %struct.FILE*, [1048576 x i8], i32, i32 }
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%struct.__sFILEX = type opaque
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%struct.__sbuf = type { i8*, i32 }
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declare fastcc i32 @_Z8parseIntI12StreamBufferEiRT_(%struct.StreamBuffer*)
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declare i8* @llvm.eh.exception() nounwind
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define i32 @main(i32 %argc, i8** nocapture %argv) noreturn {
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entry:
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%0 = invoke fastcc i32 @_Z8parseIntI12StreamBufferEiRT_(%struct.StreamBuffer* null)
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to label %bb1.i16.i.i unwind label %lpad.i.i ; <i32> [#uses=0]
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bb1.i16.i.i: ; preds = %entry
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br i1 false, label %bb.i.i.i.i, label %_ZN3vecI3LitE4pushERKS0_.exit.i.i.i
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bb.i.i.i.i: ; preds = %bb1.i16.i.i
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br label %_ZN3vecI3LitE4pushERKS0_.exit.i.i.i
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_ZN3vecI3LitE4pushERKS0_.exit.i.i.i: ; preds = %bb.i.i.i.i, %bb1.i16.i.i
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%lits.i.i.0.0 = phi %struct.Lit* [ null, %bb1.i16.i.i ], [ null, %bb.i.i.i.i ] ; <%struct.Lit*> [#uses=1]
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%1 = invoke fastcc i32 @_Z8parseIntI12StreamBufferEiRT_(%struct.StreamBuffer* null)
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to label %.noexc21.i.i unwind label %lpad.i.i ; <i32> [#uses=0]
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.noexc21.i.i: ; preds = %_ZN3vecI3LitE4pushERKS0_.exit.i.i.i
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unreachable
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lpad.i.i: ; preds = %_ZN3vecI3LitE4pushERKS0_.exit.i.i.i, %entry
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%lits.i.i.0.3 = phi %struct.Lit* [ %lits.i.i.0.0, %_ZN3vecI3LitE4pushERKS0_.exit.i.i.i ], [ null, %entry ] ; <%struct.Lit*> [#uses=1]
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%eh_ptr.i.i = call i8* @llvm.eh.exception() ; <i8*> [#uses=0]
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free %struct.Lit* %lits.i.i.0.3
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unreachable
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}
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