Rename llvm-uselistorder => verify-uselistorder

llvm-svn: 214318

llvm/test/Bitcode/2006-12-11-Cast-ConstExpr.ll

@@ -1,7 +1,7 @@
 ; This test ensures that we get a bitcast constant expression in and out,
 ; not a sitofp constant expression. 
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 ; CHECK: bitcast (
 
 @G = external global i32

llvm/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis -disable-output
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 ; PR4373
 
 @foo = weak global { i32 } zeroinitializer              

llvm/test/Bitcode/aggregateInstructions.3.2.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; aggregateOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not misread instructions with aggregate operands

llvm/test/Bitcode/arm32_neon_vcnt_upgrade.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 ; Tests vclz and vcnt
 
 define <4 x i16> @vclz16(<4 x i16>* %A) nounwind {

llvm/test/Bitcode/atomic.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-as %s -o - | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 
 define void @test_cmpxchg(i32* %addr, i32 %desired, i32 %new) {
   cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst seq_cst

llvm/test/Bitcode/attributes-3.3.ll

@@ -1,5 +1,5 @@
 ; RUN:  llvm-dis < %s.bc| FileCheck %s
-; RUN:  llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN:  verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; attributes-3.3.ll.bc was generated by passing this file to llvm-as-3.3.
 ; The test checks that LLVM does not silently misread attributes of

llvm/test/Bitcode/attributes.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 ; PR12696
 
 define void @f1(i8 zeroext)

llvm/test/Bitcode/binaryFloatInstructions.3.2.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; BinaryFloatOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not misread binary float instructions from

llvm/test/Bitcode/binaryIntInstructions.3.2.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; BinaryIntOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not misread binary integer instructions from

llvm/test/Bitcode/bitwiseInstructions.3.2.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; bitwiseOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not misread bitwise instructions from

llvm/test/Bitcode/calling-conventions.3.2.ll

@@ -1,5 +1,5 @@
 ; RUN:  llvm-dis < %s.bc| FileCheck %s
-; RUN:  llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN:  verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; calling-conventions.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not silently misread calling conventions of

llvm/test/Bitcode/case-ranges-3.3.ll

@@ -1,5 +1,5 @@
 ; RUN:  llvm-dis < %s.bc| FileCheck %s
-; RUN:  llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN:  verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; case-ranges.ll.bc was generated by passing this file to llvm-as from the 3.3
 ; release of LLVM. This tests that the bitcode for switches from that release

llvm/test/Bitcode/cmpxchg-upgrade.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-dis < %s.bc | FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; cmpxchg-upgrade.ll.bc was produced by running a version of llvm-as from just
 ; before the IR change on this file.

llvm/test/Bitcode/conversionInstructions.3.2.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; conversionOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not misread conversion instructions from

llvm/test/Bitcode/drop-debug-info.ll

@@ -1,6 +1,6 @@
 ; RUN: llvm-as < %s -o %t.bc 2>&1 >/dev/null | FileCheck -check-prefix=WARN %s
 ; RUN: llvm-dis < %t.bc | FileCheck %s
-; RUN: llvm-uselistorder < %t.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %t.bc -preserve-bc-use-list-order -num-shuffles=5
 
 define i32 @main() {
 entry:

llvm/test/Bitcode/extractelement.ll

@@ -1,5 +1,5 @@
 ; RUN: opt < %s -constprop | llvm-dis -disable-output
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 ; PR3465
 
 define double @test() {

llvm/test/Bitcode/flags.ll

@@ -1,7 +1,7 @@
 ; RUN: llvm-as < %s | llvm-dis > %t0
 ; RUN: opt -S < %s > %t1
 ; RUN: diff %t0 %t1
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 ; PR6140
 
 ; Make sure the flags are serialized/deserialized properly for both

llvm/test/Bitcode/function-encoding-rel-operands.ll

@@ -1,7 +1,7 @@
 ; Basic sanity test to check that instruction operands are encoded with
 ; relative IDs.
 ; RUN: llvm-as < %s | llvm-bcanalyzer -dump | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 
 ; CHECK: FUNCTION_BLOCK
 ; CHECK: INST_BINOP {{.*}}op0=1 op1=1

llvm/test/Bitcode/global-variables.3.2.ll

@@ -1,5 +1,5 @@
 ; RUN:  llvm-dis < %s.bc| FileCheck %s
-; RUN:  llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN:  verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; global-variables.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not silently misread global variables attributes of

llvm/test/Bitcode/inalloca.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 
 ; inalloca should roundtrip.
 

llvm/test/Bitcode/linkage-types-3.2.ll

@@ -1,5 +1,5 @@
 ; RUN:  llvm-dis < %s.bc| FileCheck %s
-; RUN:  llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN:  verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; linkage-types-3.2.ll.bc was generated by passing this file to llvm-as-3.2
 ; The test checks that LLVM does not silently misread linkage types of

llvm/test/Bitcode/local-linkage-default-visibility.3.4.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-dis < %s.bc | FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; local-linkage-default-visibility.3.4.ll.bc was generated by passing this file
 ; to llvm-as-3.4.  The test checks that LLVM upgrades visibility of symbols

llvm/test/Bitcode/memInstructions.3.2.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; memOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not misread memory related instructions of

llvm/test/Bitcode/metadata.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis -disable-output
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 
 !llvm.foo = !{!0}
 !0 = metadata !{i32 42}

llvm/test/Bitcode/old-aliases.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-dis < %s.bc | FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; old-aliases.bc consist of this file assembled with an old llvm-as (3.5 trunk)
 ; from when aliases contained a ConstantExpr.

llvm/test/Bitcode/ptest-new.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 
 define i32 @foo(<2 x i64> %bar) nounwind {
 entry:

llvm/test/Bitcode/ptest-old.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 
 define i32 @foo(<4 x float> %bar) nounwind {
 entry:

llvm/test/Bitcode/select.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 
 define <2 x i32> @main() {
   ret <2 x i32> select (<2 x i1> <i1 false, i1 undef>, <2 x i32> zeroinitializer, <2 x i32> <i32 0, i32 undef>)

llvm/test/Bitcode/shuffle.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis -disable-output
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 
 ; <rdar://problem/8622574>
 ; tests the bitcodereader can handle the case where the reader will initially

llvm/test/Bitcode/tailcall.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 
 ; Check that musttail and tail roundtrip.
 

llvm/test/Bitcode/terminatorInstructions.3.2.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; TerminatorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not misread terminator instructions from

llvm/test/Bitcode/upgrade-global-ctors.ll

@@ -1,4 +1,4 @@
 ; RUN:  llvm-dis < %s.bc| FileCheck %s
-; RUN:  llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN:  verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; CHECK: @llvm.global_ctors = appending global [0 x { i32, void ()*, i8* }] zeroinitializer

llvm/test/Bitcode/upgrade-loop-metadata.ll

@@ -1,7 +1,7 @@
 ; Test to make sure loop vectorizer metadata is automatically upgraded.
 ;
 ; RUN: llvm-dis < %s.bc | FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 define void @_Z28loop_with_vectorize_metadatav() {
 entry:

llvm/test/Bitcode/upgrade-tbaa.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 
 ; Function Attrs: nounwind
 define void @_Z4testPiPf(i32* nocapture %pI, float* nocapture %pF) #0 {

llvm/test/Bitcode/use-list-order.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5
 
 @a = global [4 x i1] [i1 0, i1 1, i1 0, i1 1]
 @b = alias i1* getelementptr ([4 x i1]* @a, i64 0, i64 2)

llvm/test/Bitcode/vectorInstructions.3.2.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-dis < %s.bc| FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; vectorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not misread vector operations of

llvm/test/Bitcode/visibility-styles.3.2.ll

@@ -1,5 +1,5 @@
 ; RUN:  llvm-dis < %s.bc| FileCheck %s
-; RUN:  llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN:  verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; visibility-styles.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
 ; The test checks that LLVM does not silently misread visibility styles of

llvm/test/Bitcode/weak-cmpxchg-upgrade.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-dis < %s.bc | FileCheck %s
-; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
+; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5
 
 ; cmpxchg-upgrade.ll.bc was produced by running a version of llvm-as from just
 ; before the IR change on this file.

llvm/test/CMakeLists.txt

@@ -44,7 +44,6 @@ set(LLVM_TEST_DEPENDS
           llvm-rtdyld
           llvm-symbolizer
           llvm-tblgen
-          llvm-uselistorder
           llvm-vtabledump
           macho-dump
           opt
@@ -53,6 +52,7 @@ set(LLVM_TEST_DEPENDS
           not
           yaml2obj
           obj2yaml
+          verify-uselistorder
         )
 
 # If Intel JIT events are supported, depend on a tool that tests the listener.

llvm/test/lit.cfg

@@ -228,7 +228,6 @@ for pattern in [r"\bbugpoint\b(?!-)",
                 r"\bllvm-rtdyld\b",
                 r"\bllvm-size\b",
                 r"\bllvm-tblgen\b",
-                r"\bllvm-uselistorder\b",
                 r"\bllvm-vtabledump\b",
                 r"\bllvm-c-test\b",
                 r"\bmacho-dump\b",
@@ -236,6 +235,7 @@ for pattern in [r"\bbugpoint\b(?!-)",
                 r"\bFileCheck\b",
                 r"\bobj2yaml\b",
                 r"\byaml2obj\b",
+                r"\bverify-uselistorder\b",
                 # Handle these specially as they are strings searched
                 # for during testing.
                 r"\| \bcount\b",

llvm/tools/CMakeLists.txt

@@ -43,7 +43,7 @@ add_llvm_tool_subdirectory(llvm-bcanalyzer)
 add_llvm_tool_subdirectory(llvm-stress)
 add_llvm_tool_subdirectory(llvm-mcmarkup)
 
-add_llvm_tool_subdirectory(llvm-uselistorder)
+add_llvm_tool_subdirectory(verify-uselistorder)
 
 add_llvm_tool_subdirectory(llvm-symbolizer)
 

llvm/tools/LLVMBuild.txt

@@ -16,7 +16,7 @@
 ;===------------------------------------------------------------------------===;
 
 [common]
-subdirectories = bugpoint llc lli llvm-ar llvm-as llvm-bcanalyzer llvm-cov llvm-diff llvm-dis llvm-dwarfdump llvm-extract llvm-jitlistener llvm-link llvm-lto llvm-mc llvm-nm llvm-objdump llvm-profdata llvm-rtdyld llvm-size macho-dump opt llvm-mcmarkup llvm-uselistorder
+subdirectories = bugpoint llc lli llvm-ar llvm-as llvm-bcanalyzer llvm-cov llvm-diff llvm-dis llvm-dwarfdump llvm-extract llvm-jitlistener llvm-link llvm-lto llvm-mc llvm-nm llvm-objdump llvm-profdata llvm-rtdyld llvm-size macho-dump opt llvm-mcmarkup verify-uselistorder
 
 [component_0]
 type = Group

llvm/tools/Makefile

@@ -32,7 +32,7 @@ PARALLEL_DIRS := opt llvm-as llvm-dis llc llvm-ar llvm-nm llvm-link \
                  macho-dump llvm-objdump llvm-readobj llvm-rtdyld \
                  llvm-dwarfdump llvm-cov llvm-size llvm-stress llvm-mcmarkup \
                  llvm-profdata llvm-symbolizer obj2yaml yaml2obj llvm-c-test \
-                 llvm-vtabledump llvm-uselistorder
+                 llvm-vtabledump verify-uselistorder
 
 # If Intel JIT Events support is configured, build an extra tool to test it.
 ifeq ($(USE_INTEL_JITEVENTS), 1)

llvm/tools/verify-uselistorder/CMakeLists.txt

@@ -7,6 +7,6 @@ set(LLVM_LINK_COMPONENTS
   Support
   )
 
-add_llvm_tool(llvm-uselistorder
-  llvm-uselistorder.cpp
+add_llvm_tool(verify-uselistorder
+  verify-uselistorder.cpp
   )

llvm/tools/verify-uselistorder/LLVMBuild.txt

@@ -1,4 +1,4 @@
-;===- ./tools/llvm-uselistorder/LLVMBuild.txt ------------------*- Conf -*--===;
+;===- ./tools/verify-uselistorder/LLVMBuild.txt ----------------*- Conf -*--===;
 ;
 ;                     The LLVM Compiler Infrastructure
 ;
@@ -17,6 +17,6 @@
 
 [component_0]
 type = Tool
-name = llvm-uselistorder
+name = verify-uselistorder
 parent = Tools
 required_libraries = IRReader BitWriter Support

llvm/tools/verify-uselistorder/Makefile

@@ -1,4 +1,4 @@
-##===- tools/llvm-uselistorder/Makefile --------------------*- Makefile -*-===##
+##===- tools/verify-uselistorder/Makefile ------------------*- Makefile -*-===##
 #
 #                     The LLVM Compiler Infrastructure
 #
@@ -8,7 +8,7 @@
 ##===----------------------------------------------------------------------===##
 
 LEVEL := ../..
-TOOLNAME := llvm-uselistorder
+TOOLNAME := verify-uselistorder
 LINK_COMPONENTS := AsmParser BitReader BitWriter Core IRReader Support
 
 # This tool has no plugins, optimize startup time.

llvm/tools/verify-uselistorder/verify-uselistorder.cpp

@@ -1,4 +1,4 @@
-//===- llvm-uselistorder.cpp - The LLVM Modular Optimizer -----------------===//
+//===- verify-uselistorder.cpp - The LLVM Modular Optimizer ---------------===//
 //
 //                     The LLVM Compiler Infrastructure
 //