Add xor reg-reg pattern

llvm-svn: 75915

llvm/lib/Target/SystemZ/SystemZInstrInfo.td

@@ -77,5 +77,12 @@ def OR64rr : Pseudo<(outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
 }
 // FIXME: provide patterns for masked or-with-imm
 
+let isCommutable = 1 in { // X = XOR Y, Z  == X = XOR Z, Y
+// FIXME: Provide proper encoding!
+def XOR64rr : Pseudo<(outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
+                     "xgr\t{$dst, $src2}",
+                     [(set GR64:$dst, (xor GR64:$src1, GR64:$src2))]>;
+}
+
 } // Defs = [PSW]
 } // isTwoAddress = 1

llvm/test/CodeGen/SystemZ/02-RetXor.ll

@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llc
+define i64 @foo(i64 %a, i64 %b) {
+entry:
+    %c = xor i64 %a, %b
+    ret i64 %c
+}

llvm/test/CodeGen/SystemZ/02-RetXorImm.ll

@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llc
+define i64 @foo(i64 %a, i64 %b) {
+entry:
+    %c = xor i64 %a, 1
+    ret i64 %c
+}