forked from OSchip/llvm-project
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4b62b5cddd
commit
a06384f3d8
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@ -27,6 +27,34 @@ define <2 x i32> @select_0_or_1_from_bool_vec(<2 x i1> %x) {
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ret <2 x i32> %add
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}
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; This is an 'andn' of the low bit.
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define i32 @flip_and_mask(i32 %x) {
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; CHECK-LABEL: @flip_and_mask(
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; CHECK-NEXT: [[SHL:%.*]] = shl i32 %x, 31
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; CHECK-NEXT: [[SHR:%.*]] = ashr exact i32 [[SHL]], 31
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; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[SHR]], 1
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; CHECK-NEXT: ret i32 [[INC]]
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;
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%shl = shl i32 %x, 31
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%shr = ashr i32 %shl, 31
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%inc = add i32 %shr, 1
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ret i32 %inc
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}
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define <2 x i8> @flip_and_mask_splat(<2 x i8> %x) {
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; CHECK-LABEL: @flip_and_mask_splat(
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; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i8> %x, <i8 7, i8 7>
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; CHECK-NEXT: [[SHR:%.*]] = ashr exact <2 x i8> [[SHL]], <i8 7, i8 7>
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; CHECK-NEXT: [[INC:%.*]] = add nsw <2 x i8> [[SHR]], <i8 1, i8 1>
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; CHECK-NEXT: ret <2 x i8> [[INC]]
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;
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%shl = shl <2 x i8> %x, <i8 7, i8 7>
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%shr = ashr <2 x i8> %shl, <i8 7, i8 7>
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%inc = add <2 x i8> %shr, <i8 1, i8 1>
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ret <2 x i8> %inc
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}
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define i32 @test1(i32 %A) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: ret i32 %A
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