forked from OSchip/llvm-project
change interface for isStride
isStride now takes a partial schedule as input. Patch from Tobias Grosser <tobias@grosser.es>. llvm-svn: 170419
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@ -152,12 +152,16 @@ public:
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/// used for one vector lane. The number of elements in the
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/// vector defines the width of the generated vector
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/// instructions.
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/// @param Schedule A map from the statement to a schedule where the
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/// innermost dimension is the dimension of the innermost
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/// loop containing the statemenet.
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/// @param P A reference to the pass this function is called from.
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/// The pass is needed to update other analysis.
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static void generate(IRBuilder<> &B, ScopStmt &Stmt,
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VectorValueMapT &GlobalMaps, __isl_keep isl_set *Domain,
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VectorValueMapT &GlobalMaps,
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__isl_keep isl_map *Schedule,
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Pass *P) {
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VectorBlockGenerator Generator(B, GlobalMaps, Stmt, Domain, P);
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VectorBlockGenerator Generator(B, GlobalMaps, Stmt, Schedule, P);
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Generator.copyBB();
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}
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@ -169,10 +173,13 @@ private:
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// all referenes to the old instructions with their recalculated values.
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VectorValueMapT &GlobalMaps;
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isl_set *Domain;
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// A map from the statement to a schedule where the innermost dimension is the
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// dimension of the innermost loop containing the statemenet.
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isl_map *Schedule;
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VectorBlockGenerator(IRBuilder<> &B, VectorValueMapT &GlobalMaps,
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ScopStmt &Stmt, __isl_keep isl_set *Domain, Pass *P);
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ScopStmt &Stmt, __isl_keep isl_map *Schedule,
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Pass *P);
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int getVectorWidth();
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@ -148,20 +148,27 @@ public:
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/// @brief Get the new access function imported from JSCOP file
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isl_map *getNewAccessRelation() const;
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/// @brief Get the stride of this memory access in the specified domain
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/// subset.
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isl_set *getStride(__isl_take const isl_set *domainSubset) const;
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/// Get the stride of this memory access in the specified Schedule. Schedule
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/// is a map from the statement to a schedule where the innermost dimension is
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/// the dimension of the innermost loop containing the statemenet.
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isl_set *getStride(__isl_take const isl_map *Schedule) const;
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/// @brief Is the stride of the access equal to a certain width.
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bool isStrideX(__isl_take const isl_set *DomainSubset, int StrideWidth) const;
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/// Is the stride of the access equal to a certain width? Schedule is a map
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/// from the statement to a schedule where the innermost dimension is the
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/// dimension of the innermost loop containing the statemenet.
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bool isStrideX(__isl_take const isl_map *Schedule, int StrideWidth) const;
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/// @brief Is consecutive memory accessed for a given
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/// statement instance set?
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bool isStrideOne(__isl_take const isl_set *domainSubset) const;
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/// Is consecutive memory accessed for a given statement instance set?
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/// Schedule is a map from the statement to a schedule where the innermost
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/// dimension is the dimension of the innermost loop containing the
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/// statemenet.
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bool isStrideOne(__isl_take const isl_map *Schedule) const;
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/// @brief Is always the same memory accessed for a given
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/// statement instance set?
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bool isStrideZero(__isl_take const isl_set *domainSubset) const;
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/// Is always the same memory accessed for a given statement instance set?
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/// Schedule is a map from the statement to a schedule where the innermost
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/// dimension is the dimension of the innermost loop containing the
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/// statemenet.
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bool isStrideZero(__isl_take const isl_map *Schedule) const;
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/// @brief Get the statement that contains this memory access.
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ScopStmt *getStatement() const { return statement; }
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@ -389,41 +389,30 @@ static isl_map *getEqualAndLarger(isl_space *setDomain) {
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return Map;
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}
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isl_set *MemoryAccess::getStride(__isl_take const isl_set *domainSubset) const {
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isl_map *accessRelation = getAccessRelation();
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isl_set *scatteringDomain = const_cast<isl_set*>(domainSubset);
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isl_map *scattering = getStatement()->getScattering();
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isl_set *MemoryAccess::getStride(__isl_take const isl_map *Schedule) const {
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isl_map *S = const_cast<isl_map*>(Schedule);
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isl_map *AccessRelation = getAccessRelation();
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isl_space *Space = isl_space_range(isl_map_get_space(S));
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isl_map *NextScatt = getEqualAndLarger(Space);
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scattering = isl_map_reverse(scattering);
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int difference = isl_map_n_in(scattering) - isl_set_n_dim(scatteringDomain);
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scattering = isl_map_project_out(scattering, isl_dim_in,
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isl_set_n_dim(scatteringDomain),
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difference);
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S = isl_map_reverse(S);
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NextScatt = isl_map_lexmin(NextScatt);
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// Remove all names of the scattering dimensions, as the names may be lost
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// anyways during the project. This leads to consistent results.
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scattering = isl_map_set_tuple_name(scattering, isl_dim_in, "");
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scatteringDomain = isl_set_set_tuple_name(scatteringDomain, "");
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NextScatt = isl_map_apply_range(NextScatt, isl_map_copy(S));
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NextScatt = isl_map_apply_range(NextScatt, isl_map_copy(AccessRelation));
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NextScatt = isl_map_apply_domain(NextScatt, S);
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NextScatt = isl_map_apply_domain(NextScatt, AccessRelation);
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isl_map *nextScatt = getEqualAndLarger(isl_set_get_space(scatteringDomain));
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nextScatt = isl_map_lexmin(nextScatt);
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scattering = isl_map_intersect_domain(scattering, scatteringDomain);
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nextScatt = isl_map_apply_range(nextScatt, isl_map_copy(scattering));
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nextScatt = isl_map_apply_range(nextScatt, isl_map_copy(accessRelation));
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nextScatt = isl_map_apply_domain(nextScatt, scattering);
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nextScatt = isl_map_apply_domain(nextScatt, accessRelation);
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return isl_map_deltas(nextScatt);
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isl_set *Deltas = isl_map_deltas(NextScatt);
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return Deltas;
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}
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bool MemoryAccess::isStrideX(__isl_take const isl_set *DomainSubset,
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bool MemoryAccess::isStrideX(__isl_take const isl_map *Schedule,
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int StrideWidth) const {
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isl_set *Stride, *StrideX;
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bool IsStrideX;
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Stride = getStride(DomainSubset);
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Stride = getStride(Schedule);
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StrideX = isl_set_universe(isl_set_get_space(Stride));
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StrideX = isl_set_fix_si(StrideX, isl_dim_set, 0, StrideWidth);
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IsStrideX = isl_set_is_equal(Stride, StrideX);
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@ -434,12 +423,12 @@ bool MemoryAccess::isStrideX(__isl_take const isl_set *DomainSubset,
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return IsStrideX;
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}
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bool MemoryAccess::isStrideZero(const isl_set *DomainSubset) const {
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return isStrideX(DomainSubset, 0);
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bool MemoryAccess::isStrideZero(const isl_map *Schedule) const {
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return isStrideX(Schedule, 0);
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}
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bool MemoryAccess::isStrideOne(const isl_set *DomainSubset) const {
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return isStrideX(DomainSubset, 1);
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bool MemoryAccess::isStrideOne(const isl_map *Schedule) const {
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return isStrideX(Schedule, 1);
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}
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void MemoryAccess::setNewAccessRelation(isl_map *newAccess) {
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@ -562,11 +562,13 @@ void BlockGenerator::copyBB(ValueMapT &GlobalMap) {
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}
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VectorBlockGenerator::VectorBlockGenerator(IRBuilder<> &B,
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VectorValueMapT &GlobalMaps, ScopStmt &Stmt, __isl_keep isl_set *Domain,
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Pass *P) : BlockGenerator(B, Stmt, P), GlobalMaps(GlobalMaps),
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Domain(Domain) {
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VectorValueMapT &GlobalMaps,
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ScopStmt &Stmt,
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__isl_keep isl_map *Schedule,
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Pass *P)
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: BlockGenerator(B, Stmt, P), GlobalMaps(GlobalMaps), Schedule(Schedule) {
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assert(GlobalMaps.size() > 1 && "Only one vector lane found");
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assert(Domain && "No statement domain provided");
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assert(Schedule && "No statement domain provided");
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}
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Value *VectorBlockGenerator::getVectorValue(const Value *Old,
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@ -675,9 +677,9 @@ void VectorBlockGenerator::generateLoad(const LoadInst *Load,
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MemoryAccess &Access = Statement.getAccessFor(Load);
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Value *NewLoad;
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if (Access.isStrideZero(isl_set_copy(Domain)))
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if (Access.isStrideZero(isl_map_copy(Schedule)))
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NewLoad = generateStrideZeroLoad(Load, ScalarMaps[0]);
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else if (Access.isStrideOne(isl_set_copy(Domain)))
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else if (Access.isStrideOne(isl_map_copy(Schedule)))
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NewLoad = generateStrideOneLoad(Load, ScalarMaps[0]);
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else
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NewLoad = generateUnknownStrideLoad(Load, ScalarMaps);
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@ -726,7 +728,7 @@ void VectorBlockGenerator::copyStore(const StoreInst *Store,
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Value *Vector = getVectorValue(Store->getValueOperand(), VectorMap,
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ScalarMaps);
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if (Access.isStrideOne(isl_set_copy(Domain))) {
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if (Access.isStrideOne(isl_map_copy(Schedule))) {
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Type *VectorPtrType = getVectorPtrTy(Pointer, VectorWidth);
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Value *NewPointer = getNewValue(Pointer, ScalarMaps[0], GlobalMaps[0]);
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@ -394,6 +394,19 @@ void ClastStmtCodeGen::codegenSubstitutions(const clast_stmt *Assignment,
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}
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}
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// Takes the cloog specific domain and translates it into a map Statement ->
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// PartialSchedule, where the PartialSchedule contains all the dimensions that
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// have been code generated up to this point.
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static __isl_give isl_map *extractPartialSchedule(ScopStmt *Statement,
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isl_set *Domain) {
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isl_map *Schedule = Statement->getScattering();
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int ScheduledDimensions = isl_set_dim(Domain, isl_dim_set);
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int UnscheduledDimensions = isl_map_dim(Schedule, isl_dim_out) - ScheduledDimensions;
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return isl_map_project_out(Schedule, isl_dim_out, ScheduledDimensions,
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UnscheduledDimensions);
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}
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void ClastStmtCodeGen::codegen(const clast_user_stmt *u,
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std::vector<Value*> *IVS , const char *iterator,
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isl_set *Domain) {
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}
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}
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VectorBlockGenerator::generate(Builder, *Statement, VectorMap, Domain, P);
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isl_map *Schedule = extractPartialSchedule(Statement, Domain);
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VectorBlockGenerator::generate(Builder, *Statement, VectorMap, Schedule, P);
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isl_map_free(Schedule);
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}
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void ClastStmtCodeGen::codegen(const clast_block *b) {
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