From 9ff9371bb7331f329681b9df831922dd2e20fdee Mon Sep 17 00:00:00 2001 From: Daniel Dunbar Date: Tue, 27 Oct 2009 17:50:21 +0000 Subject: [PATCH] Switch to using DEFINE_COMPILERRT_[PRIVATE_]FUNCTION to define function symbols inside .S files. llvm-svn: 85264 --- compiler-rt/lib/arm/adddf3vfp.S | 3 +-- compiler-rt/lib/arm/addsf3vfp.S | 3 +-- compiler-rt/lib/arm/bswapdi2.S | 3 +-- compiler-rt/lib/arm/bswapsi2.S | 3 +-- compiler-rt/lib/arm/divdf3vfp.S | 3 +-- compiler-rt/lib/arm/divsf3vfp.S | 3 +-- compiler-rt/lib/arm/eqdf2vfp.S | 3 +-- compiler-rt/lib/arm/eqsf2vfp.S | 3 +-- compiler-rt/lib/arm/extendsfdf2vfp.S | 3 +-- compiler-rt/lib/arm/fixdfsivfp.S | 3 +-- compiler-rt/lib/arm/fixsfsivfp.S | 3 +-- compiler-rt/lib/arm/fixunsdfsivfp.S | 3 +-- compiler-rt/lib/arm/fixunssfsivfp.S | 3 +-- compiler-rt/lib/arm/floatsidfvfp.S | 3 +-- compiler-rt/lib/arm/floatsisfvfp.S | 3 +-- compiler-rt/lib/arm/floatunssidfvfp.S | 3 +-- compiler-rt/lib/arm/floatunssisfvfp.S | 3 +-- compiler-rt/lib/arm/gedf2vfp.S | 3 +-- compiler-rt/lib/arm/gesf2vfp.S | 3 +-- compiler-rt/lib/arm/gtdf2vfp.S | 3 +-- compiler-rt/lib/arm/gtsf2vfp.S | 3 +-- compiler-rt/lib/arm/ledf2vfp.S | 3 +-- compiler-rt/lib/arm/lesf2vfp.S | 3 +-- compiler-rt/lib/arm/ltdf2vfp.S | 3 +-- compiler-rt/lib/arm/ltsf2vfp.S | 3 +-- compiler-rt/lib/arm/muldf3vfp.S | 3 +-- compiler-rt/lib/arm/mulsf3vfp.S | 3 +-- compiler-rt/lib/arm/nedf2vfp.S | 3 +-- compiler-rt/lib/arm/negdf2vfp.S | 3 +-- compiler-rt/lib/arm/negsf2vfp.S | 3 +-- compiler-rt/lib/arm/nesf2vfp.S | 3 +-- compiler-rt/lib/arm/subdf3vfp.S | 3 +-- compiler-rt/lib/arm/subsf3vfp.S | 3 +-- compiler-rt/lib/arm/switch.S | 16 ++++------------ compiler-rt/lib/arm/truncdfsf2vfp.S | 3 +-- compiler-rt/lib/arm/unorddf2vfp.S | 3 +-- compiler-rt/lib/arm/unordsf2vfp.S | 3 +-- compiler-rt/lib/i386/ashldi3.S | 6 ++---- compiler-rt/lib/i386/ashrdi3.S | 6 ++---- compiler-rt/lib/i386/divdi3.S | 3 +-- compiler-rt/lib/i386/floatdidf.S | 3 +-- compiler-rt/lib/i386/floatdisf.S | 3 +-- compiler-rt/lib/i386/floatdixf.S | 3 +-- compiler-rt/lib/i386/floatundidf.S | 3 +-- compiler-rt/lib/i386/floatundisf.S | 6 ++---- compiler-rt/lib/i386/floatundixf.S | 3 +-- compiler-rt/lib/i386/lshrdi3.S | 6 ++---- compiler-rt/lib/i386/moddi3.S | 3 +-- compiler-rt/lib/i386/muldi3.S | 3 +-- compiler-rt/lib/i386/udivdi3.S | 3 +-- compiler-rt/lib/i386/umoddi3.S | 3 +-- compiler-rt/lib/ppc/restFP.S | 5 ++--- compiler-rt/lib/ppc/saveFP.S | 5 ++--- compiler-rt/lib/x86_64/floatundidf.S | 3 +-- compiler-rt/lib/x86_64/floatundisf.S | 3 +-- compiler-rt/lib/x86_64/floatundixf.S | 6 ++---- 56 files changed, 66 insertions(+), 134 deletions(-) diff --git a/compiler-rt/lib/arm/adddf3vfp.S b/compiler-rt/lib/arm/adddf3vfp.S index b1f7077ab0cd..1b49daae7f45 100644 --- a/compiler-rt/lib/arm/adddf3vfp.S +++ b/compiler-rt/lib/arm/adddf3vfp.S @@ -15,8 +15,7 @@ // Adds two double precision floating point numbers using the Darwin // calling convention where double arguments are passsed in GPR pairs // - .globl ___adddf3vfp -___adddf3vfp: +DEFINE_COMPILERRT_FUNCTION(__adddf3vfp) fmdrr d6, r0, r1 // move first param from r0/r1 pair into d6 fmdrr d7, r2, r3 // move second param from r2/r3 pair into d7 faddd d6, d6, d7 diff --git a/compiler-rt/lib/arm/addsf3vfp.S b/compiler-rt/lib/arm/addsf3vfp.S index 4a4a041aabae..292d05240cb3 100644 --- a/compiler-rt/lib/arm/addsf3vfp.S +++ b/compiler-rt/lib/arm/addsf3vfp.S @@ -15,8 +15,7 @@ // Adds two single precision floating point numbers using the Darwin // calling convention where single arguments are passsed in GPRs // - .globl ___addsf3vfp -___addsf3vfp: +DEFINE_COMPILERRT_FUNCTION(__addsf3vfp) fmsr s14, r0 // move first param from r0 into float register fmsr s15, r1 // move second param from r1 into float register fadds s14, s14, s15 diff --git a/compiler-rt/lib/arm/bswapdi2.S b/compiler-rt/lib/arm/bswapdi2.S index 70c13e6b9ceb..2a3465b94b77 100644 --- a/compiler-rt/lib/arm/bswapdi2.S +++ b/compiler-rt/lib/arm/bswapdi2.S @@ -14,8 +14,7 @@ // // Reverse all the bytes in a 64-bit integer. // - .globl ___bswapdi2 -___bswapdi2: +DEFINE_COMPILERRT_FUNCTION(__bswapdi2) rev r2, r1 // reverse bytes in high 32-bits into temp2 rev r3, r0 // reverse bytes in low 32-bit into temp3 mov r0, r2 // set low 32-bits of result to temp2 diff --git a/compiler-rt/lib/arm/bswapsi2.S b/compiler-rt/lib/arm/bswapsi2.S index 8f0e1d34990f..dd9faf18c73b 100644 --- a/compiler-rt/lib/arm/bswapsi2.S +++ b/compiler-rt/lib/arm/bswapsi2.S @@ -14,7 +14,6 @@ // // Reverse all the bytes in a 32-bit integer. // - .globl ___bswapsi2 -___bswapsi2: +DEFINE_COMPILERRT_FUNCTION(__bswapsi2) rev r0, r0 // reverse bytes in parameter and put into result register bx lr diff --git a/compiler-rt/lib/arm/divdf3vfp.S b/compiler-rt/lib/arm/divdf3vfp.S index c62c61e68ba8..a809427494cb 100644 --- a/compiler-rt/lib/arm/divdf3vfp.S +++ b/compiler-rt/lib/arm/divdf3vfp.S @@ -15,8 +15,7 @@ // Divides two double precision floating point numbers using the Darwin // calling convention where double arguments are passsed in GPR pairs // - .globl ___divdf3vfp -___divdf3vfp: +DEFINE_COMPILERRT_FUNCTION(__divdf3vfp) fmdrr d6, r0, r1 // move first param from r0/r1 pair into d6 fmdrr d7, r2, r3 // move second param from r2/r3 pair into d7 fdivd d5, d6, d7 diff --git a/compiler-rt/lib/arm/divsf3vfp.S b/compiler-rt/lib/arm/divsf3vfp.S index 4bf74636a005..67b8a0c8d70f 100644 --- a/compiler-rt/lib/arm/divsf3vfp.S +++ b/compiler-rt/lib/arm/divsf3vfp.S @@ -15,8 +15,7 @@ // Divides two single precision floating point numbers using the Darwin // calling convention where single arguments are passsed like 32-bit ints. // - .globl ___divsf3vfp -___divsf3vfp: +DEFINE_COMPILERRT_FUNCTION(__divsf3vfp) fmsr s14, r0 // move first param from r0 into float register fmsr s15, r1 // move second param from r1 into float register fdivs s13, s14, s15 diff --git a/compiler-rt/lib/arm/eqdf2vfp.S b/compiler-rt/lib/arm/eqdf2vfp.S index 25cc959148e6..771d853f20f7 100644 --- a/compiler-rt/lib/arm/eqdf2vfp.S +++ b/compiler-rt/lib/arm/eqdf2vfp.S @@ -16,8 +16,7 @@ // Uses Darwin calling convention where double precision arguments are passsed // like in GPR pairs. // - .globl ___eqdf2vfp -___eqdf2vfp: +DEFINE_COMPILERRT_FUNCTION(__eqdf2vfp) fmdrr d6, r0, r1 // load r0/r1 pair in double register fmdrr d7, r2, r3 // load r2/r3 pair in double register fcmpd d6, d7 diff --git a/compiler-rt/lib/arm/eqsf2vfp.S b/compiler-rt/lib/arm/eqsf2vfp.S index a87b7674844f..bf4cd1ffde9b 100644 --- a/compiler-rt/lib/arm/eqsf2vfp.S +++ b/compiler-rt/lib/arm/eqsf2vfp.S @@ -16,8 +16,7 @@ // Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // - .globl ___eqsf2vfp -___eqsf2vfp: +DEFINE_COMPILERRT_FUNCTION(__eqsf2vfp) fmsr s14, r0 // move from GPR 0 to float register fmsr s15, r1 // move from GPR 1 to float register fcmps s14, s15 diff --git a/compiler-rt/lib/arm/extendsfdf2vfp.S b/compiler-rt/lib/arm/extendsfdf2vfp.S index ea251e2bbda8..8df97b51f5fa 100644 --- a/compiler-rt/lib/arm/extendsfdf2vfp.S +++ b/compiler-rt/lib/arm/extendsfdf2vfp.S @@ -16,8 +16,7 @@ // Uses Darwin calling convention where a single precision parameter is // passed in a GPR and a double precision result is returned in R0/R1 pair. // - .globl ___extendsfdf2vfp -___extendsfdf2vfp: +DEFINE_COMPILERRT_FUNCTION(__extendsfdf2vfp) fmsr s15, r0 // load float register from R0 fcvtds d7, s15 // convert single to double fmrrd r0, r1, d7 // return result in r0/r1 pair diff --git a/compiler-rt/lib/arm/fixdfsivfp.S b/compiler-rt/lib/arm/fixdfsivfp.S index 41788597b673..70d802748a17 100644 --- a/compiler-rt/lib/arm/fixdfsivfp.S +++ b/compiler-rt/lib/arm/fixdfsivfp.S @@ -16,8 +16,7 @@ // Uses Darwin calling convention where a double precision parameter is // passed in GPR register pair. // - .globl ___fixdfsivfp -___fixdfsivfp: +DEFINE_COMPILERRT_FUNCTION(__fixdfsivfp) fmdrr d7, r0, r1 // load double register from R0/R1 ftosizd s15, d7 // convert double to 32-bit int into s15 fmrs r0, s15 // move s15 to result register diff --git a/compiler-rt/lib/arm/fixsfsivfp.S b/compiler-rt/lib/arm/fixsfsivfp.S index d480390593de..17d016c6fb70 100644 --- a/compiler-rt/lib/arm/fixsfsivfp.S +++ b/compiler-rt/lib/arm/fixsfsivfp.S @@ -16,8 +16,7 @@ // Uses Darwin calling convention where a single precision parameter is // passed in a GPR.. // - .globl ___fixsfsivfp -___fixsfsivfp: +DEFINE_COMPILERRT_FUNCTION(__fixsfsivfp) fmsr s15, r0 // load float register from R0 ftosizs s15, s15 // convert single to 32-bit int into s15 fmrs r0, s15 // move s15 to result register diff --git a/compiler-rt/lib/arm/fixunsdfsivfp.S b/compiler-rt/lib/arm/fixunsdfsivfp.S index bd9c1b83649f..a7299f443e68 100644 --- a/compiler-rt/lib/arm/fixunsdfsivfp.S +++ b/compiler-rt/lib/arm/fixunsdfsivfp.S @@ -17,8 +17,7 @@ // Uses Darwin calling convention where a double precision parameter is // passed in GPR register pair. // - .globl ___fixunsdfsivfp -___fixunsdfsivfp: +DEFINE_COMPILERRT_FUNCTION(__fixunsdfsivfp) fmdrr d7, r0, r1 // load double register from R0/R1 ftouizd s15, d7 // convert double to 32-bit int into s15 fmrs r0, s15 // move s15 to result register diff --git a/compiler-rt/lib/arm/fixunssfsivfp.S b/compiler-rt/lib/arm/fixunssfsivfp.S index c8ce25f3a931..166a2ad3de4d 100644 --- a/compiler-rt/lib/arm/fixunssfsivfp.S +++ b/compiler-rt/lib/arm/fixunssfsivfp.S @@ -17,8 +17,7 @@ // Uses Darwin calling convention where a single precision parameter is // passed in a GPR.. // - .globl ___fixunssfsivfp -___fixunssfsivfp: +DEFINE_COMPILERRT_FUNCTION(__fixunssfsivfp) fmsr s15, r0 // load float register from R0 ftouizs s15, s15 // convert single to 32-bit unsigned into s15 fmrs r0, s15 // move s15 to result register diff --git a/compiler-rt/lib/arm/floatsidfvfp.S b/compiler-rt/lib/arm/floatsidfvfp.S index b268d04d71df..45bfa34e2df7 100644 --- a/compiler-rt/lib/arm/floatsidfvfp.S +++ b/compiler-rt/lib/arm/floatsidfvfp.S @@ -16,8 +16,7 @@ // Uses Darwin calling convention where a double precision result is // return in GPR register pair. // - .globl ___floatsidfvfp -___floatsidfvfp: +DEFINE_COMPILERRT_FUNCTION(__floatsidfvfp) fmsr s15, r0 // move int to float register s15 fsitod d7, s15 // convert 32-bit int in s15 to double in d7 fmrrd r0, r1, d7 // move d7 to result register pair r0/r1 diff --git a/compiler-rt/lib/arm/floatsisfvfp.S b/compiler-rt/lib/arm/floatsisfvfp.S index dea5a4eb53d4..1b742990d56e 100644 --- a/compiler-rt/lib/arm/floatsisfvfp.S +++ b/compiler-rt/lib/arm/floatsisfvfp.S @@ -16,8 +16,7 @@ // Uses Darwin calling convention where a single precision result is // return in a GPR.. // - .globl ___floatsisfvfp -___floatsisfvfp: +DEFINE_COMPILERRT_FUNCTION(__floatsisfvfp) fmsr s15, r0 // move int to float register s15 fsitos s15, s15 // convert 32-bit int in s15 to float in s15 fmrs r0, s15 // move s15 to result register diff --git a/compiler-rt/lib/arm/floatunssidfvfp.S b/compiler-rt/lib/arm/floatunssidfvfp.S index 077385ec0fd3..9866a66b3da3 100644 --- a/compiler-rt/lib/arm/floatunssidfvfp.S +++ b/compiler-rt/lib/arm/floatunssidfvfp.S @@ -16,8 +16,7 @@ // Uses Darwin calling convention where a double precision result is // return in GPR register pair. // - .globl ___floatunssidfvfp -___floatunssidfvfp: +DEFINE_COMPILERRT_FUNCTION(__floatunssidfvfp) fmsr s15, r0 // move int to float register s15 fuitod d7, s15 // convert 32-bit int in s15 to double in d7 fmrrd r0, r1, d7 // move d7 to result register pair r0/r1 diff --git a/compiler-rt/lib/arm/floatunssisfvfp.S b/compiler-rt/lib/arm/floatunssisfvfp.S index 3ad71942223e..065742b995df 100644 --- a/compiler-rt/lib/arm/floatunssisfvfp.S +++ b/compiler-rt/lib/arm/floatunssisfvfp.S @@ -16,8 +16,7 @@ // Uses Darwin calling convention where a single precision result is // return in a GPR.. // - .globl ___floatunssisfvfp -___floatunssisfvfp: +DEFINE_COMPILERRT_FUNCTION(__floatunssisfvfp) fmsr s15, r0 // move int to float register s15 fuitos s15, s15 // convert 32-bit int in s15 to float in s15 fmrs r0, s15 // move s15 to result register diff --git a/compiler-rt/lib/arm/gedf2vfp.S b/compiler-rt/lib/arm/gedf2vfp.S index 3f2f6c14d074..cb8c71610ef5 100644 --- a/compiler-rt/lib/arm/gedf2vfp.S +++ b/compiler-rt/lib/arm/gedf2vfp.S @@ -16,8 +16,7 @@ // Uses Darwin calling convention where double precision arguments are passsed // like in GPR pairs. // - .globl ___gedf2vfp -___gedf2vfp: +DEFINE_COMPILERRT_FUNCTION(__gedf2vfp) fmdrr d6, r0, r1 // load r0/r1 pair in double register fmdrr d7, r2, r3 // load r2/r3 pair in double register fcmpd d6, d7 diff --git a/compiler-rt/lib/arm/gesf2vfp.S b/compiler-rt/lib/arm/gesf2vfp.S index 83b2f0961e02..24b66e1b9664 100644 --- a/compiler-rt/lib/arm/gesf2vfp.S +++ b/compiler-rt/lib/arm/gesf2vfp.S @@ -16,8 +16,7 @@ // Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // - .globl ___gesf2vfp -___gesf2vfp: +DEFINE_COMPILERRT_FUNCTION(__gesf2vfp) fmsr s14, r0 // move from GPR 0 to float register fmsr s15, r1 // move from GPR 1 to float register fcmps s14, s15 diff --git a/compiler-rt/lib/arm/gtdf2vfp.S b/compiler-rt/lib/arm/gtdf2vfp.S index 2daa7c4e126c..afd6d05f40ff 100644 --- a/compiler-rt/lib/arm/gtdf2vfp.S +++ b/compiler-rt/lib/arm/gtdf2vfp.S @@ -16,8 +16,7 @@ // Uses Darwin calling convention where double precision arguments are passsed // like in GPR pairs. // - .globl ___gtdf2vfp -___gtdf2vfp: +DEFINE_COMPILERRT_FUNCTION(__gtdf2vfp) fmdrr d6, r0, r1 // load r0/r1 pair in double register fmdrr d7, r2, r3 // load r2/r3 pair in double register fcmpd d6, d7 diff --git a/compiler-rt/lib/arm/gtsf2vfp.S b/compiler-rt/lib/arm/gtsf2vfp.S index c388865082f4..a4a03c60cc7f 100644 --- a/compiler-rt/lib/arm/gtsf2vfp.S +++ b/compiler-rt/lib/arm/gtsf2vfp.S @@ -16,8 +16,7 @@ // Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // - .globl ___gtsf2vfp -___gtsf2vfp: +DEFINE_COMPILERRT_FUNCTION(__gtsf2vfp) fmsr s14, r0 // move from GPR 0 to float register fmsr s15, r1 // move from GPR 1 to float register fcmps s14, s15 diff --git a/compiler-rt/lib/arm/ledf2vfp.S b/compiler-rt/lib/arm/ledf2vfp.S index 1ab250daca2e..188dc6a7ebbc 100644 --- a/compiler-rt/lib/arm/ledf2vfp.S +++ b/compiler-rt/lib/arm/ledf2vfp.S @@ -16,8 +16,7 @@ // Uses Darwin calling convention where double precision arguments are passsed // like in GPR pairs. // - .globl ___ledf2vfp -___ledf2vfp: +DEFINE_COMPILERRT_FUNCTION(__ledf2vfp) fmdrr d6, r0, r1 // load r0/r1 pair in double register fmdrr d7, r2, r3 // load r2/r3 pair in double register fcmpd d6, d7 diff --git a/compiler-rt/lib/arm/lesf2vfp.S b/compiler-rt/lib/arm/lesf2vfp.S index 8166d4b26f07..fe3ec646243b 100644 --- a/compiler-rt/lib/arm/lesf2vfp.S +++ b/compiler-rt/lib/arm/lesf2vfp.S @@ -16,8 +16,7 @@ // Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // - .globl ___lesf2vfp -___lesf2vfp: +DEFINE_COMPILERRT_FUNCTION(__lesf2vfp) fmsr s14, r0 // move from GPR 0 to float register fmsr s15, r1 // move from GPR 1 to float register fcmps s14, s15 diff --git a/compiler-rt/lib/arm/ltdf2vfp.S b/compiler-rt/lib/arm/ltdf2vfp.S index e17406bff82f..15a799b9f10f 100644 --- a/compiler-rt/lib/arm/ltdf2vfp.S +++ b/compiler-rt/lib/arm/ltdf2vfp.S @@ -16,8 +16,7 @@ // Uses Darwin calling convention where double precision arguments are passsed // like in GPR pairs. // - .globl ___ltdf2vfp -___ltdf2vfp: +DEFINE_COMPILERRT_FUNCTION(__ltdf2vfp) fmdrr d6, r0, r1 // load r0/r1 pair in double register fmdrr d7, r2, r3 // load r2/r3 pair in double register fcmpd d6, d7 diff --git a/compiler-rt/lib/arm/ltsf2vfp.S b/compiler-rt/lib/arm/ltsf2vfp.S index f281a71a0a2b..6ae065872f8e 100644 --- a/compiler-rt/lib/arm/ltsf2vfp.S +++ b/compiler-rt/lib/arm/ltsf2vfp.S @@ -16,8 +16,7 @@ // Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // - .globl ___ltsf2vfp -___ltsf2vfp: +DEFINE_COMPILERRT_FUNCTION(__ltsf2vfp) fmsr s14, r0 // move from GPR 0 to float register fmsr s15, r1 // move from GPR 1 to float register fcmps s14, s15 diff --git a/compiler-rt/lib/arm/muldf3vfp.S b/compiler-rt/lib/arm/muldf3vfp.S index 7ae256af5944..bb0fd43b9a75 100644 --- a/compiler-rt/lib/arm/muldf3vfp.S +++ b/compiler-rt/lib/arm/muldf3vfp.S @@ -15,8 +15,7 @@ // Multiplies two double precision floating point numbers using the Darwin // calling convention where double arguments are passsed in GPR pairs // - .globl ___muldf3vfp -___muldf3vfp: +DEFINE_COMPILERRT_FUNCTION(__muldf3vfp) fmdrr d6, r0, r1 // move first param from r0/r1 pair into d6 fmdrr d7, r2, r3 // move second param from r2/r3 pair into d7 fmuld d6, d6, d7 diff --git a/compiler-rt/lib/arm/mulsf3vfp.S b/compiler-rt/lib/arm/mulsf3vfp.S index 16dbdb227f24..69396a145fb1 100644 --- a/compiler-rt/lib/arm/mulsf3vfp.S +++ b/compiler-rt/lib/arm/mulsf3vfp.S @@ -15,8 +15,7 @@ // Multiplies two single precision floating point numbers using the Darwin // calling convention where single arguments are passsed like 32-bit ints. // - .globl ___mulsf3vfp -___mulsf3vfp: +DEFINE_COMPILERRT_FUNCTION(__mulsf3vfp) fmsr s14, r0 // move first param from r0 into float register fmsr s15, r1 // move second param from r1 into float register fmuls s13, s14, s15 diff --git a/compiler-rt/lib/arm/nedf2vfp.S b/compiler-rt/lib/arm/nedf2vfp.S index a7541de143f9..a445cda2fd1b 100644 --- a/compiler-rt/lib/arm/nedf2vfp.S +++ b/compiler-rt/lib/arm/nedf2vfp.S @@ -16,8 +16,7 @@ // Uses Darwin calling convention where double precision arguments are passsed // like in GPR pairs. // - .globl ___nedf2vfp -___nedf2vfp: +DEFINE_COMPILERRT_FUNCTION(__nedf2vfp) fmdrr d6, r0, r1 // load r0/r1 pair in double register fmdrr d7, r2, r3 // load r2/r3 pair in double register fcmpd d6, d7 diff --git a/compiler-rt/lib/arm/negdf2vfp.S b/compiler-rt/lib/arm/negdf2vfp.S index bff2767bd36d..9cbfc6a4d5c4 100644 --- a/compiler-rt/lib/arm/negdf2vfp.S +++ b/compiler-rt/lib/arm/negdf2vfp.S @@ -15,7 +15,6 @@ // Returns the negation a double precision floating point numbers using the // Darwin calling convention where double arguments are passsed in GPR pairs. // - .globl ___negdf2vfp -___negdf2vfp: +DEFINE_COMPILERRT_FUNCTION(__negdf2vfp) eor r1, r1, #-2147483648 // flip sign bit on double in r0/r1 pair bx lr diff --git a/compiler-rt/lib/arm/negsf2vfp.S b/compiler-rt/lib/arm/negsf2vfp.S index 9b0ce2811d9d..6d78ef1a3487 100644 --- a/compiler-rt/lib/arm/negsf2vfp.S +++ b/compiler-rt/lib/arm/negsf2vfp.S @@ -15,7 +15,6 @@ // Returns the negation of a single precision floating point numbers using the // Darwin calling convention where single arguments are passsed like 32-bit ints // - .globl ___negsf2vfp -___negsf2vfp: +DEFINE_COMPILERRT_FUNCTION(__negsf2vfp) eor r0, r0, #-2147483648 // flip sign bit on float in r0 bx lr diff --git a/compiler-rt/lib/arm/nesf2vfp.S b/compiler-rt/lib/arm/nesf2vfp.S index ee37c1d9f6db..62d80a543f2e 100644 --- a/compiler-rt/lib/arm/nesf2vfp.S +++ b/compiler-rt/lib/arm/nesf2vfp.S @@ -16,8 +16,7 @@ // Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // - .globl ___nesf2vfp -___nesf2vfp: +DEFINE_COMPILERRT_FUNCTION(__nesf2vfp) fmsr s14, r0 // move from GPR 0 to float register fmsr s15, r1 // move from GPR 1 to float register fcmps s14, s15 diff --git a/compiler-rt/lib/arm/subdf3vfp.S b/compiler-rt/lib/arm/subdf3vfp.S index ebeca2fb94df..b9cb29e7d76b 100644 --- a/compiler-rt/lib/arm/subdf3vfp.S +++ b/compiler-rt/lib/arm/subdf3vfp.S @@ -15,8 +15,7 @@ // Returns difference between two double precision floating point numbers using // the Darwin calling convention where double arguments are passsed in GPR pairs // - .globl ___subdf3vfp -___subdf3vfp: +DEFINE_COMPILERRT_FUNCTION(__subdf3vfp) fmdrr d6, r0, r1 // move first param from r0/r1 pair into d6 fmdrr d7, r2, r3 // move second param from r2/r3 pair into d7 fsubd d6, d6, d7 diff --git a/compiler-rt/lib/arm/subsf3vfp.S b/compiler-rt/lib/arm/subsf3vfp.S index 3e9d602c7b35..b6942bd341af 100644 --- a/compiler-rt/lib/arm/subsf3vfp.S +++ b/compiler-rt/lib/arm/subsf3vfp.S @@ -16,8 +16,7 @@ // using the Darwin calling convention where single arguments are passsed // like 32-bit ints. // - .globl ___subsf3vfp -___subsf3vfp: +DEFINE_COMPILERRT_FUNCTION(__subsf3vfp) fmsr s14, r0 // move first param from r0 into float register fmsr s15, r1 // move second param from r1 into float register fsubs s14, s14, s15 diff --git a/compiler-rt/lib/arm/switch.S b/compiler-rt/lib/arm/switch.S index 7b11c4f1e624..2d949129ee62 100644 --- a/compiler-rt/lib/arm/switch.S +++ b/compiler-rt/lib/arm/switch.S @@ -29,9 +29,7 @@ // The table contains unsigned byte sized elements which are 1/2 the distance // from lr to the target label. // - .globl ___switchu8 - .private_extern ___switchu8 -___switchu8: +DEFINE_COMPILERRT_PRIVATE_FUNCTION(__switchu8) ldrb ip, [lr, #-1] // get first byte in table cmp r0, ip // compare with index ldrbcc r0, [lr, r0] // get indexed byte out of table @@ -45,9 +43,7 @@ ___switchu8: // The table contains signed byte sized elements which are 1/2 the distance // from lr to the target label. // - .globl ___switch8 - .private_extern ___switch8 -___switch8: +DEFINE_COMPILERRT_PRIVATE_FUNCTION(__switch8) ldrb ip, [lr, #-1] // get first byte in table cmp r0, ip // signed compare with index ldrsbcc r0, [lr, r0] // get indexed byte out of table @@ -60,9 +56,7 @@ ___switch8: // The table contains signed 2-byte sized elements which are 1/2 the distance // from lr to the target label. // - .globl ___switch16 - .private_extern ___switch16 -___switch16: +DEFINE_COMPILERRT_PRIVATE_FUNCTION(__switch16) ldrh ip, [lr, #-1] // get first 16-bit word in table cmp r0, ip // compare with index add r0, lr, r0, lsl #1 // compute address of element in table @@ -77,9 +71,7 @@ ___switch16: // The table contains signed 4-byte sized elements which are the distance // from lr to the target label. // - .globl ___switch32 - .private_extern ___switch32 -___switch32: +DEFINE_COMPILERRT_PRIVATE_FUNCTION(__switch32) ldr ip, [lr, #-1] // get first 32-bit word in table cmp r0, ip // compare with index add r0, lr, r0, lsl #2 // compute address of element in table diff --git a/compiler-rt/lib/arm/truncdfsf2vfp.S b/compiler-rt/lib/arm/truncdfsf2vfp.S index 0d635beab653..26f8b82b2c06 100644 --- a/compiler-rt/lib/arm/truncdfsf2vfp.S +++ b/compiler-rt/lib/arm/truncdfsf2vfp.S @@ -16,8 +16,7 @@ // Uses Darwin calling convention where a double precision parameter is // passed in a R0/R1 pair and a signle precision result is returned in R0. // - .globl ___truncdfsf2vfp -___truncdfsf2vfp: +DEFINE_COMPILERRT_FUNCTION(__truncdfsf2vfp) fmdrr d7, r0, r1 // load double from r0/r1 pair fcvtsd s15, d7 // convert double to single (trucate precision) fmrs r0, s15 // return result in r0 diff --git a/compiler-rt/lib/arm/unorddf2vfp.S b/compiler-rt/lib/arm/unorddf2vfp.S index 85968b47a76b..6b4bcb6f8f0d 100644 --- a/compiler-rt/lib/arm/unorddf2vfp.S +++ b/compiler-rt/lib/arm/unorddf2vfp.S @@ -16,8 +16,7 @@ // Uses Darwin calling convention where double precision arguments are passsed // like in GPR pairs. // - .globl ___unorddf2vfp -___unorddf2vfp: +DEFINE_COMPILERRT_FUNCTION(__unorddf2vfp) fmdrr d6, r0, r1 // load r0/r1 pair in double register fmdrr d7, r2, r3 // load r2/r3 pair in double register fcmpd d6, d7 diff --git a/compiler-rt/lib/arm/unordsf2vfp.S b/compiler-rt/lib/arm/unordsf2vfp.S index 852d4ebfb6c5..811d8cb6f8b3 100644 --- a/compiler-rt/lib/arm/unordsf2vfp.S +++ b/compiler-rt/lib/arm/unordsf2vfp.S @@ -16,8 +16,7 @@ // Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // - .globl ___unordsf2vfp -___unordsf2vfp: +DEFINE_COMPILERRT_FUNCTION(__unordsf2vfp) fmsr s14, r0 // move from GPR 0 to float register fmsr s15, r1 // move from GPR 1 to float register fcmps s14, s15 diff --git a/compiler-rt/lib/i386/ashldi3.S b/compiler-rt/lib/i386/ashldi3.S index 7a7906ba9951..af6f98bc7cf8 100644 --- a/compiler-rt/lib/i386/ashldi3.S +++ b/compiler-rt/lib/i386/ashldi3.S @@ -17,8 +17,7 @@ .text .align 4 -.globl ___ashldi3 -___ashldi3: +DEFINE_COMPILERRT_FUNCTION(__ashldi3) movd 12(%esp), %xmm2 // Load count #ifndef TRUST_CALLERS_USE_64_BIT_STORES movd 4(%esp), %xmm0 @@ -37,8 +36,7 @@ ___ashldi3: .text .align 4 -.globl ___ashldi3 -___ashldi3: +DEFINE_COMPILERRT_FUNCTION(__ashldi3) movl 12(%esp), %ecx // Load count movl 8(%esp), %edx // Load high movl 4(%esp), %eax // Load low diff --git a/compiler-rt/lib/i386/ashrdi3.S b/compiler-rt/lib/i386/ashrdi3.S index d0a4c4289ef5..346f9b1adc16 100644 --- a/compiler-rt/lib/i386/ashrdi3.S +++ b/compiler-rt/lib/i386/ashrdi3.S @@ -10,8 +10,7 @@ .text .align 4 -.globl ___ashrdi3 -___ashrdi3: +DEFINE_COMPILERRT_FUNCTION(__ashrdi3) movd 12(%esp), %xmm2 // Load count movl 8(%esp), %eax #ifndef TRUST_CALLERS_USE_64_BIT_STORES @@ -47,8 +46,7 @@ ___ashrdi3: .text .align 4 -.globl ___ashrdi3 -___ashrdi3: +DEFINE_COMPILERRT_FUNCTION(__ashrdi3) movl 12(%esp), %ecx // Load count movl 8(%esp), %edx // Load high movl 4(%esp), %eax // Load low diff --git a/compiler-rt/lib/i386/divdi3.S b/compiler-rt/lib/i386/divdi3.S index 1ce22da678fe..5ad530c34a4f 100644 --- a/compiler-rt/lib/i386/divdi3.S +++ b/compiler-rt/lib/i386/divdi3.S @@ -20,8 +20,7 @@ .text .align 4 -.globl ___divdi3 -___divdi3: +DEFINE_COMPILERRT_FUNCTION(__divdi3) /* This is currently implemented by wrapping the unsigned divide up in an absolute value, then restoring the correct sign at the end of the computation. This could diff --git a/compiler-rt/lib/i386/floatdidf.S b/compiler-rt/lib/i386/floatdidf.S index 012697b1bafd..8bf9f0dfc50c 100644 --- a/compiler-rt/lib/i386/floatdidf.S +++ b/compiler-rt/lib/i386/floatdidf.S @@ -16,8 +16,7 @@ twop32: .quad 0x41f0000000000000 .text .align 4 -.globl ___floatdidf -___floatdidf: +DEFINE_COMPILERRT_FUNCTION(__floatdidf) cvtsi2sd 8(%esp), %xmm1 movss 4(%esp), %xmm0 // low 32 bits of a calll 0f diff --git a/compiler-rt/lib/i386/floatdisf.S b/compiler-rt/lib/i386/floatdisf.S index 152a93d69cc6..741e4a6607fc 100644 --- a/compiler-rt/lib/i386/floatdisf.S +++ b/compiler-rt/lib/i386/floatdisf.S @@ -16,8 +16,7 @@ .text .align 4 -.globl ___floatdisf -___floatdisf: +DEFINE_COMPILERRT_FUNCTION(__floatdisf) #ifndef TRUST_CALLERS_USE_64_BIT_STORES movd 4(%esp), %xmm0 movd 8(%esp), %xmm1 diff --git a/compiler-rt/lib/i386/floatdixf.S b/compiler-rt/lib/i386/floatdixf.S index cd85c097cde8..10f900e289d9 100644 --- a/compiler-rt/lib/i386/floatdixf.S +++ b/compiler-rt/lib/i386/floatdixf.S @@ -16,8 +16,7 @@ .text .align 4 -.globl ___floatdixf -___floatdixf: +DEFINE_COMPILERRT_FUNCTION(__floatdixf) #ifndef TRUST_CALLERS_USE_64_BIT_STORES movd 4(%esp), %xmm0 movd 8(%esp), %xmm1 diff --git a/compiler-rt/lib/i386/floatundidf.S b/compiler-rt/lib/i386/floatundidf.S index e38e4556e2b5..6f2acdb3cd2d 100644 --- a/compiler-rt/lib/i386/floatundidf.S +++ b/compiler-rt/lib/i386/floatundidf.S @@ -28,8 +28,7 @@ twop84: .quad 0x4530000000000000 .text .align 4 -.globl ___floatundidf -___floatundidf: +DEFINE_COMPILERRT_FUNCTION(__floatundidf) movss 8(%esp), %xmm1 // high 32 bits of a movss 4(%esp), %xmm0 // low 32 bits of a calll 0f diff --git a/compiler-rt/lib/i386/floatundisf.S b/compiler-rt/lib/i386/floatundisf.S index 39f9dcf115c0..497fa290dfc7 100644 --- a/compiler-rt/lib/i386/floatundisf.S +++ b/compiler-rt/lib/i386/floatundisf.S @@ -28,8 +28,7 @@ twop64: .quad 0x0000000000000000 .text .align 4 -.globl ___floatundisf -___floatundisf: +DEFINE_COMPILERRT_FUNCTION(__floatundisf) movl 8(%esp), %eax movd 8(%esp), %xmm1 movd 4(%esp), %xmm0 @@ -65,8 +64,7 @@ twelve: .long 0x00000000 .text .align 4 -.globl ___floatundisf -___floatundisf: +DEFINE_COMPILERRT_FUNCTION(__floatundisf) movl 8(%esp), %eax movd 8(%esp), %xmm1 movd 4(%esp), %xmm0 diff --git a/compiler-rt/lib/i386/floatundixf.S b/compiler-rt/lib/i386/floatundixf.S index b8586625334f..7264f3f72ca3 100644 --- a/compiler-rt/lib/i386/floatundixf.S +++ b/compiler-rt/lib/i386/floatundixf.S @@ -18,8 +18,7 @@ twop84: .quad 0x4530000000000000 .text .align 4 -.globl ___floatundixf -___floatundixf: +DEFINE_COMPILERRT_FUNCTION(__floatundixf) calll 0f 0: popl %eax movss 8(%esp), %xmm0 // hi 32 bits of input diff --git a/compiler-rt/lib/i386/lshrdi3.S b/compiler-rt/lib/i386/lshrdi3.S index fd1fae0eea2e..74937d2d8c16 100644 --- a/compiler-rt/lib/i386/lshrdi3.S +++ b/compiler-rt/lib/i386/lshrdi3.S @@ -17,8 +17,7 @@ .text .align 4 -.globl ___lshrdi3 -___lshrdi3: +DEFINE_COMPILERRT_FUNCTION(__lshrdi3) movd 12(%esp), %xmm2 // Load count #ifndef TRUST_CALLERS_USE_64_BIT_STORES movd 4(%esp), %xmm0 @@ -37,8 +36,7 @@ ___lshrdi3: .text .align 4 -.globl ___lshrdi3 -___lshrdi3: +DEFINE_COMPILERRT_FUNCTION(__lshrdi3) movl 12(%esp), %ecx // Load count movl 8(%esp), %edx // Load high movl 4(%esp), %eax // Load low diff --git a/compiler-rt/lib/i386/moddi3.S b/compiler-rt/lib/i386/moddi3.S index bfc965147e21..85f5b3811d5c 100644 --- a/compiler-rt/lib/i386/moddi3.S +++ b/compiler-rt/lib/i386/moddi3.S @@ -21,8 +21,7 @@ .text .align 4 -.globl ___moddi3 -___moddi3: +DEFINE_COMPILERRT_FUNCTION(__moddi3) /* This is currently implemented by wrapping the unsigned modulus up in an absolute value. This could certainly be improved upon. */ diff --git a/compiler-rt/lib/i386/muldi3.S b/compiler-rt/lib/i386/muldi3.S index 262556a32c8d..5f99f6a9ea82 100644 --- a/compiler-rt/lib/i386/muldi3.S +++ b/compiler-rt/lib/i386/muldi3.S @@ -9,8 +9,7 @@ .text .align 4 -.globl ___muldi3 -___muldi3: +DEFINE_COMPILERRT_FUNCTION(__muldi3) pushl %ebx movl 16(%esp), %eax // b.lo movl 12(%esp), %ecx // a.hi diff --git a/compiler-rt/lib/i386/udivdi3.S b/compiler-rt/lib/i386/udivdi3.S index c1626aba7679..77936f858ac6 100644 --- a/compiler-rt/lib/i386/udivdi3.S +++ b/compiler-rt/lib/i386/udivdi3.S @@ -20,8 +20,7 @@ .text .align 4 -.globl ___udivdi3 -___udivdi3: +DEFINE_COMPILERRT_FUNCTION(__udivdi3) pushl %ebx movl 20(%esp), %ebx // Find the index i of the leading bit in b. diff --git a/compiler-rt/lib/i386/umoddi3.S b/compiler-rt/lib/i386/umoddi3.S index 7e4f84a9378f..3cf8aeb62b28 100644 --- a/compiler-rt/lib/i386/umoddi3.S +++ b/compiler-rt/lib/i386/umoddi3.S @@ -21,8 +21,7 @@ .text .align 4 -.globl ___umoddi3 -___umoddi3: +DEFINE_COMPILERRT_FUNCTION(__umoddi3) pushl %ebx movl 20(%esp), %ebx // Find the index i of the leading bit in b. diff --git a/compiler-rt/lib/ppc/restFP.S b/compiler-rt/lib/ppc/restFP.S index 8d27d04f8e94..ac7b29c818cc 100644 --- a/compiler-rt/lib/ppc/restFP.S +++ b/compiler-rt/lib/ppc/restFP.S @@ -19,9 +19,8 @@ // This function should never be exported by a shared library. Each linkage // unit carries its own copy of this function. // - .globl restFP - .private_extern restFP -restFP: stfd f14,-144(r1) +DEFINE_COMPILERRT_PRIVATE_FUNCTION(restFP) + stfd f14,-144(r1) stfd f15,-136(r1) stfd f16,-128(r1) stfd f17,-120(r1) diff --git a/compiler-rt/lib/ppc/saveFP.S b/compiler-rt/lib/ppc/saveFP.S index ad9b187aef12..431ecb7e6481 100644 --- a/compiler-rt/lib/ppc/saveFP.S +++ b/compiler-rt/lib/ppc/saveFP.S @@ -17,9 +17,8 @@ // This function should never be exported by a shared library. Each linkage // unit carries its own copy of this function. // - .globl saveFP - .private_extern saveFP -saveFP: stfd f14,-144(r1) +DEFINE_COMPILERRT_PRIVATE_FUNCTION(saveFP) + stfd f14,-144(r1) stfd f15,-136(r1) stfd f16,-128(r1) stfd f17,-120(r1) diff --git a/compiler-rt/lib/x86_64/floatundidf.S b/compiler-rt/lib/x86_64/floatundidf.S index fea46af841c4..419a6e1b06e7 100644 --- a/compiler-rt/lib/x86_64/floatundidf.S +++ b/compiler-rt/lib/x86_64/floatundidf.S @@ -28,8 +28,7 @@ twop84: .quad 0x4530000000000000 .text .align 4 -.globl ___floatundidf -___floatundidf: +DEFINE_COMPILERRT_FUNCTION(__floatundidf) movd %edi, %xmm0 // low 32 bits of a shrq $32, %rdi // high 32 bits of a orq REL_ADDR(twop84), %rdi // 0x1p84 + a_hi (no rounding occurs) diff --git a/compiler-rt/lib/x86_64/floatundisf.S b/compiler-rt/lib/x86_64/floatundisf.S index 4cbbf201717b..76b54ebc00d1 100644 --- a/compiler-rt/lib/x86_64/floatundisf.S +++ b/compiler-rt/lib/x86_64/floatundisf.S @@ -14,8 +14,7 @@ two: .single 2.0 .text .align 4 -.globl ___floatundisf -___floatundisf: +DEFINE_COMPILERRT_FUNCTION(__floatundisf) movq $1, %rsi testq %rdi, %rdi js 1f diff --git a/compiler-rt/lib/x86_64/floatundixf.S b/compiler-rt/lib/x86_64/floatundixf.S index 47a0ff4f5893..5f484855a23c 100644 --- a/compiler-rt/lib/x86_64/floatundixf.S +++ b/compiler-rt/lib/x86_64/floatundixf.S @@ -15,8 +15,7 @@ twop64: .quad 0x43f0000000000000 .text .align 4 -.globl ___floatundixf -___floatundixf: +DEFINE_COMPILERRT_FUNCTION(__floatundixf) movq %rdi, -8(%rsp) fildq -8(%rsp) test %rdi, %rdi @@ -44,8 +43,7 @@ twop84: .quad 0x4530000000000000 .text .align 4 -.globl ___floatundixf -___floatundixf: +DEFINE_COMPILERRT_FUNCTION(__floatundixf) movl %edi, %esi // low 32 bits of input shrq $32, %rdi // hi 32 bits of input orq REL_ADDR(twop84), %rdi // 2^84 + hi (as a double)