forked from OSchip/llvm-project
[TableGen] Dump RC.Allocatable with -register-info-debug
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@ -1717,6 +1717,7 @@ void RegisterInfoEmitter::debugDump(raw_ostream &OS) {
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OS << "\tLaneMask: " << PrintLaneMask(RC.LaneMask) << '\n';
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OS << "\tHasDisjunctSubRegs: " << RC.HasDisjunctSubRegs << '\n';
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OS << "\tCoveredBySubRegs: " << RC.CoveredBySubRegs << '\n';
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OS << "\tAllocatable: " << RC.Allocatable << '\n';
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OS << "\tRegs:";
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for (const CodeGenRegister *R : RC.getMembers()) {
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OS << " " << R->getName();
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