forked from OSchip/llvm-project
[Test] Add a test case fo a missed oppurtunity in implicit null checking
llvm-svn: 373813
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@ -432,14 +432,70 @@ define i32 @imp_null_check_gep_load_with_use_dep(i32* %x, i32 %a) {
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ret i32 %z
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ret i32 %z
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}
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}
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;; TODO: We could handle this case as we can lift the fence into the
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;; previous block before the conditional without changing behavior.
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define i32 @imp_null_check_load_fence1(i32* %x) {
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; CHECK-LABEL: imp_null_check_load_fence1:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: testq %rdi, %rdi
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; CHECK-NEXT: je LBB16_1
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: ##MEMBARRIER
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; CHECK-NEXT: movl (%rdi), %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB16_1: ## %is_null
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retq
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entry:
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%c = icmp eq i32* %x, null
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br i1 %c, label %is_null, label %not_null, !make.implicit !0
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is_null:
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ret i32 42
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not_null:
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fence acquire
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%t = load i32, i32* %x
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ret i32 %t
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}
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;; TODO: We could handle this case as we can lift the fence into the
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;; previous block before the conditional without changing behavior.
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define i32 @imp_null_check_load_fence2(i32* %x) {
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; CHECK-LABEL: imp_null_check_load_fence2:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: testq %rdi, %rdi
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; CHECK-NEXT: je LBB17_1
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: mfence
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; CHECK-NEXT: movl (%rdi), %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB17_1: ## %is_null
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retq
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entry:
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%c = icmp eq i32* %x, null
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br i1 %c, label %is_null, label %not_null, !make.implicit !0
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is_null:
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ret i32 42
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not_null:
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fence seq_cst
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%t = load i32, i32* %x
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ret i32 %t
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}
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define void @imp_null_check_store(i32* %x) {
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define void @imp_null_check_store(i32* %x) {
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; CHECK-LABEL: imp_null_check_store:
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; CHECK-LABEL: imp_null_check_store:
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; CHECK: ## %bb.0: ## %entry
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: Ltmp14:
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; CHECK-NEXT: Ltmp14:
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; CHECK-NEXT: movl $1, (%rdi) ## on-fault: LBB16_1
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; CHECK-NEXT: movl $1, (%rdi) ## on-fault: LBB18_1
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: retq
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB16_1: ## %is_null
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; CHECK-NEXT: LBB18_1: ## %is_null
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; CHECK-NEXT: retq
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; CHECK-NEXT: retq
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entry:
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entry:
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@ -459,10 +515,10 @@ define void @imp_null_check_unordered_store(i32* %x) {
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; CHECK-LABEL: imp_null_check_unordered_store:
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; CHECK-LABEL: imp_null_check_unordered_store:
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; CHECK: ## %bb.0: ## %entry
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: Ltmp15:
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; CHECK-NEXT: Ltmp15:
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; CHECK-NEXT: movl $1, (%rdi) ## on-fault: LBB17_1
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; CHECK-NEXT: movl $1, (%rdi) ## on-fault: LBB19_1
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: retq
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB17_1: ## %is_null
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; CHECK-NEXT: LBB19_1: ## %is_null
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; CHECK-NEXT: retq
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; CHECK-NEXT: retq
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entry:
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entry:
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@ -481,10 +537,10 @@ define i32 @imp_null_check_neg_gep_load(i32* %x) {
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; CHECK-LABEL: imp_null_check_neg_gep_load:
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; CHECK-LABEL: imp_null_check_neg_gep_load:
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; CHECK: ## %bb.0: ## %entry
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: Ltmp16:
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; CHECK-NEXT: Ltmp16:
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; CHECK-NEXT: movl -128(%rdi), %eax ## on-fault: LBB18_1
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; CHECK-NEXT: movl -128(%rdi), %eax ## on-fault: LBB20_1
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: ## %bb.2: ## %not_null
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; CHECK-NEXT: retq
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; CHECK-NEXT: retq
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; CHECK-NEXT: LBB18_1: ## %is_null
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; CHECK-NEXT: LBB20_1: ## %is_null
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: retq
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