forked from OSchip/llvm-project
parent
ad75510453
commit
9f87d75060
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@ -502,6 +502,10 @@ public:
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return composeSubRegIndicesImpl(a, b);
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}
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/// Debugging helper: dump register in human readable form to dbgs() stream.
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static void dumpReg(unsigned Reg, unsigned SubRegIndex = 0,
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const TargetRegisterInfo* TRI = nullptr);
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protected:
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/// Overridden by TableGen in targets that have sub-registers.
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virtual unsigned composeSubRegIndicesImpl(unsigned, unsigned) const {
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@ -16,6 +16,7 @@
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/VirtRegMap.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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@ -293,3 +294,11 @@ TargetRegisterInfo::getRegAllocationHints(unsigned VirtReg,
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// All clear, tell the register allocator to prefer this register.
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Hints.push_back(Phys);
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}
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#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
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void
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TargetRegisterInfo::dumpReg(unsigned Reg, unsigned SubRegIndex,
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const TargetRegisterInfo *TRI) {
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dbgs() << PrintReg(Reg, TRI, SubRegIndex) << "\n";
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}
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#endif
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