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finegrainify namespacification, fix 80col prob 

llvm-svn: 11445
This commit is contained in:
Chris Lattner 2004-02-14 06:00:36 +00:00
parent 0c48a03374
commit 9f75a55329
3 changed files with 5 additions and 14 deletions
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4
llvm/lib/Target/X86/InstSelectSimple.cpp
View File

@ -1257,7 +1257,7 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
switch (Align & 3) { switch (Align & 3) {
case 2: // WORD aligned case 2: // WORD aligned
if (ConstantInt *I = dyn_cast<ConstantInt>(CI.getOperand(3))) { if (ConstantInt *I = dyn_cast<ConstantInt>(CI.getOperand(3))) {
CountReg = getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/2)); CountReg =getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/2));
} else { } else {
CountReg = makeAnotherReg(Type::IntTy); CountReg = makeAnotherReg(Type::IntTy);
BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(1); BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(1);
@ -1267,7 +1267,7 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
break; break;
case 0: // DWORD aligned case 0: // DWORD aligned
if (ConstantInt *I = dyn_cast<ConstantInt>(CI.getOperand(3))) { if (ConstantInt *I = dyn_cast<ConstantInt>(CI.getOperand(3))) {
CountReg = getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/4)); CountReg =getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/4));
} else { } else {
CountReg = makeAnotherReg(Type::IntTy); CountReg = makeAnotherReg(Type::IntTy);
BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(2); BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(2);

7
llvm/lib/Target/X86/Printer.cpp
View File

@ -28,8 +28,7 @@
#include "Support/Statistic.h" #include "Support/Statistic.h"
#include "Support/StringExtras.h" #include "Support/StringExtras.h"
#include "Support/CommandLine.h" #include "Support/CommandLine.h"
using namespace llvm;
namespace llvm {
namespace { namespace {
Statistic<> EmittedInsts("asm-printer", "Number of machine instrs printed"); Statistic<> EmittedInsts("asm-printer", "Number of machine instrs printed");
@ -91,7 +90,7 @@ namespace {
/// using the given target machine description. This should work /// using the given target machine description. This should work
/// regardless of whether the function is in SSA form. /// regardless of whether the function is in SSA form.
/// ///
FunctionPass *createX86CodePrinterPass(std::ostream &o,TargetMachine &tm){ FunctionPass *llvm::createX86CodePrinterPass(std::ostream &o,TargetMachine &tm){
return new Printer(o, tm); return new Printer(o, tm);
} }
@ -946,5 +945,3 @@ bool Printer::doFinalization(Module &M) {
delete Mang; delete Mang;
return false; // success return false; // success
} }
} // End llvm namespace

8
llvm/lib/Target/X86/X86RegisterInfo.cpp
View File

@ -26,7 +26,7 @@
#include "Support/CommandLine.h" #include "Support/CommandLine.h"
#include "Support/STLExtras.h" #include "Support/STLExtras.h"
namespace llvm { using namespace llvm;
namespace { namespace {
cl::opt<bool> cl::opt<bool>
@ -253,12 +253,8 @@ int X86RegisterInfo::emitEpilogue(MachineFunction &MF,
return MBB.size() - oldSize; return MBB.size() - oldSize;
} }
} // End llvm namespace
#include "X86GenRegisterInfo.inc" #include "X86GenRegisterInfo.inc"
namespace llvm {
const TargetRegisterClass* const TargetRegisterClass*
X86RegisterInfo::getRegClassForType(const Type* Ty) const { X86RegisterInfo::getRegClassForType(const Type* Ty) const {
switch (Ty->getPrimitiveID()) { switch (Ty->getPrimitiveID()) {
@ -278,5 +274,3 @@ X86RegisterInfo::getRegClassForType(const Type* Ty) const {
case Type::DoubleTyID: return &RFPInstance; case Type::DoubleTyID: return &RFPInstance;
} }
} }
} // End llvm namespace