forked from OSchip/llvm-project
[x86] Add some mayLoad/hasSideEffects flags. Remove one that was already covered by a pattern.
llvm-svn: 226562
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21de0ae3d4
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@ -1212,6 +1212,7 @@ multiclass avx512_cmp_scalar<RegisterClass RC, X86MemOperand x86memop,
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def rri_alt : AVX512Ii8<0xC2, MRMSrcReg,
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(outs VK1:$dst), (ins RC:$src1, RC:$src2, i8imm:$cc),
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asm_alt, [], IIC_SSE_ALU_F32S_RR>, EVEX_4V;
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let mayLoad = 1 in
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def rmi_alt : AVX512Ii8<0xC2, MRMSrcMem,
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(outs VK1:$dst), (ins RC:$src1, x86memop:$src2, i8imm:$cc),
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asm_alt, [], IIC_SSE_ALU_F32P_RM>, EVEX_4V;
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@ -1406,6 +1407,7 @@ multiclass avx512_icmp_cc<bits<8> opc, string Suffix, SDNode OpNode,
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!strconcat("vpcmp", Suffix, "\t{$cc, $src2, $src1, $dst|",
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"$dst, $src1, $src2, $cc}"),
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[], IIC_SSE_ALU_F32P_RR>, EVEX_4V;
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let mayLoad = 1 in
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def rmi_alt : AVX512AIi8<opc, MRMSrcMem,
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(outs _.KRC:$dst), (ins _.RC:$src1, _.MemOp:$src2, i8imm:$cc),
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!strconcat("vpcmp", Suffix, "\t{$cc, $src2, $src1, $dst|",
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@ -1418,6 +1420,7 @@ multiclass avx512_icmp_cc<bits<8> opc, string Suffix, SDNode OpNode,
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"\t{$cc, $src2, $src1, $dst {${mask}}|",
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"$dst {${mask}}, $src1, $src2, $cc}"),
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[], IIC_SSE_ALU_F32P_RR>, EVEX_4V, EVEX_K;
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let mayLoad = 1 in
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def rmik_alt : AVX512AIi8<opc, MRMSrcMem,
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(outs _.KRC:$dst), (ins _.KRCWM:$mask, _.RC:$src1, _.MemOp:$src2,
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i8imm:$cc),
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@ -1431,7 +1434,6 @@ multiclass avx512_icmp_cc<bits<8> opc, string Suffix, SDNode OpNode,
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multiclass avx512_icmp_cc_rmb<bits<8> opc, string Suffix, SDNode OpNode,
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X86VectorVTInfo _> :
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avx512_icmp_cc<opc, Suffix, OpNode, _> {
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let mayLoad = 1 in {
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def rmib : AVX512AIi8<opc, MRMSrcMem,
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(outs _.KRC:$dst), (ins _.RC:$src1, _.ScalarMemOp:$src2,
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AVXCC:$cc),
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@ -1453,10 +1455,9 @@ multiclass avx512_icmp_cc_rmb<bits<8> opc, string Suffix, SDNode OpNode,
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(X86VBroadcast (_.ScalarLdFrag addr:$src2)),
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imm:$cc)))],
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IIC_SSE_ALU_F32P_RM>, EVEX_4V, EVEX_K, EVEX_B;
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}
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// Accept explicit immediate argument form instead of comparison code.
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let isAsmParserOnly = 1, hasSideEffects = 0 in {
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let isAsmParserOnly = 1, hasSideEffects = 0, mayLoad = 1 in {
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def rmib_alt : AVX512AIi8<opc, MRMSrcMem,
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(outs _.KRC:$dst), (ins _.RC:$src1, _.ScalarMemOp:$src2,
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i8imm:$cc),
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@ -1528,6 +1529,7 @@ multiclass avx512_cmp_packed<RegisterClass KRC, RegisterClass RC,
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!strconcat("vcmp${cc}", suffix,
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"\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
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[(set KRC:$dst, (X86cmpm (vt RC:$src1), (vt RC:$src2), imm:$cc))], d>;
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let hasSideEffects = 0 in
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def rrib: AVX512PIi8<0xC2, MRMSrcReg,
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(outs KRC:$dst), (ins RC:$src1, RC:$src2, AVXCC:$cc),
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!strconcat("vcmp${cc}", suffix,
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@ -1546,6 +1548,7 @@ multiclass avx512_cmp_packed<RegisterClass KRC, RegisterClass RC,
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(outs KRC:$dst), (ins RC:$src1, RC:$src2, i8imm:$cc),
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!strconcat("vcmp", suffix,
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"\t{$cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc}"), [], d>;
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let mayLoad = 1 in
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def rmi_alt : AVX512PIi8<0xC2, MRMSrcMem,
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(outs KRC:$dst), (ins RC:$src1, x86memop:$src2, i8imm:$cc),
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!strconcat("vcmp", suffix,
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@ -2504,6 +2504,7 @@ multiclass sse12_cmp_packed<RegisterClass RC, X86MemOperand x86memop,
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def rri_alt : PIi8<0xC2, MRMSrcReg,
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(outs RC:$dst), (ins RC:$src1, RC:$src2, i8imm:$cc),
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asm_alt, [], itins.rr, d>, Sched<[WriteFAdd]>;
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let mayLoad = 1 in
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def rmi_alt : PIi8<0xC2, MRMSrcMem,
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(outs RC:$dst), (ins RC:$src1, x86memop:$src2, i8imm:$cc),
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asm_alt, [], itins.rm, d>,
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